| 2003 | 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), Architectures, Methods and Tools, 3-5 September 2003, Belek-Antalya, Turkey |
| 2003 | A Communication Model Based on an n-Dimensional Torus Architecture Using Deadlock-Free Wormhole Routing. Philip K. F. Hölzenspies, Erik Schepers, Wouter Bach, Mischa Jonker, Bart Sikkes, Gerard J. M. Smit, Paul J. M. Havinga |
| 2003 | A Constructive Algorithm with Look-Ahead for Mapping and Scheduling of Task Graphs with Conditional Edges. Winthir Brunnbauer, Thomas Wild, Jürgen Foag, Nuria Pazos |
| 2003 | A Development and Simulation Environment for a Floating Point Operations FPGA Based Accelerator. Marco Bera, Giovanni Danese, Ivo De Lotto, Francesco Leporati, Alvaro Spelgatti |
| 2003 | A Dynamically Reconfigurable Accelerator for Operations over Boolean and Ternary Vectors. Valery Sklyarov, Iouliia Skliarova, Arnaldo S. R. Oliveira, António de Brito Ferrari |
| 2003 | A Fast Additive Normalization Method for Exponential Computation. Chichyang Chen, Rui-Lin Chen, Ming-Hwa Sheu |
| 2003 | A Methodology for Designing Communication Architectures for Multiprocessor SoCs. Václav Dvorák, Vladimír Kutálek |
| 2003 | A New Algorithm for High-Speed Projection in Point Rendering Applications. Margarita Amor, Montserrat Bóo, Ángel del Río, Michael Wand, Wolfgang Straßer |
| 2003 | A Novel Specification Model for IP-based Design. Stephan Klaus, Sorin A. Huss |
| 2003 | A Power Reduction Scheme for Data Buses by Dynamic Detection of Active Bits. Masanori Muroyama, Akihiko Hyodo, Takanori Okuma, Hiroto Yasuura |
| 2003 | A Quadruple Precision and Dual Double Precision Floating-Point Multiplier. Ahmet Akkas, Michael J. Schulte |
| 2003 | A Real Time, Low Latency, FPGA Implementation of the 2-D Discrete Wavelet Transformation for Streaming Image Applications. Oguz Benderli, Yusuf Çagatay Tekmen, A. Neslin Ismailoglu |
| 2003 | A Scheduling and Partitioning Scheme for Low Power Circuit Operating at Multiple Voltages. Ling Wang, Henry Selvaraj |
| 2003 | A System-on-Chip Implementation of the IEEE 802.11a MAC Layer. Goran Panic, Daniel Dietterle, Zoran Stamenkovic, Klaus Tittelbach-Helmrich |
| 2003 | A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture. Tang Lei, Shashi Kumar |
| 2003 | A VLIW Architecture for Logarithmic Arithmetic. Mark G. Arnold |
| 2003 | A methodology for the design of AHB bus master wrappers. Marc Bertola, Guy Bois |
| 2003 | An Application of Functional Decomposition in ROM-Based FSM Implementation in FPGA Devices. Mariusz Rawski, Henry Selvaraj, Tadeusz Luba |
| 2003 | An Efficient Implementation of Fair Load Balancing over Multi-CPU SOC Architectures. George Kornaros, Theofanis Orphanoudakis, Nicholaos Zervos |
| 2003 | An Iterative Improvement Co-synthesis Algorithm for Optimization of SOPC Architecture with Dynamically Reconfigurable FPGAs. Radoslaw Czarnecki, Stanislaw Deniziak, Krzysztof Sapiecha |
| 2003 | Analytical Bounds on the Threads in IXP1200 Network Processor. S. T. G. S. Ramakrishna, H. S. Jamadagni |
| 2003 | Back-End Dynamic Resource Allocation Heuristics for Power-Aware High-Performance Clustered Architectures. Amirali Baniasadi |
| 2003 | Back-Traced Deductive-Parallel Fault Simulation for Digital Systems. Vladimir Hahanov, Raimund Ubar, Stanley Hyduke |
| 2003 | CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors. Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Ismail Kadayif |
| 2003 | Causality Constraints for Processor Architectures with Sub-Word Parallelism. Rainer Schaffer, Renate Merker, Francky Catthoor |
| 2003 | Compiler-Directed Management of Instruction Accesses. Guilin Chen, Guangyu Chen, Ismail Kadayif, Wei Zhang, Mahmut T. Kandemir, Ibrahim Kolcu, Ugur Sezer |
| 2003 | Concurrent Operation Scheduling and Unit Allocation with an Evolutionary Technique. Gregor Papa, Jurij Silc |
| 2003 | Customizable Embedded Processor Architectures. Peter Petrov, Alex Orailoglu |
| 2003 | DYNORA: A New Caching Technique. P. Srivatsan, P. B. Sudarshan, P. P. Bhaskaran |
| 2003 | Design Tools and Reusable Libraries for FPGA-Based Digital Circuits. Valery Sklyarov, Iouliia Skliarova, Pedro Almeida, Manuel Almeida |
| 2003 | Design and FPGA Implementation of a Video Scalar with on-chip reduced memory utilization. Seetharaman Ramachandran, S. Srinivasan |
| 2003 | Distance-aware L2 Cache Organizations for Scalable Multiprocessor Systems. Sung Woo Chung, Hyong-Shik Kim, Chu Shik Jhon |
| 2003 | Distributing SoC Simulations over a Network of Computers. Jouni Riihimäki, Väinö Helminen, Kimmo Kuusilinna, Timo D. Hämäläinen |
| 2003 | Eccentric SoC Architectures as the Future Norm. Gordon J. Brebner |
| 2003 | Estimating the Utilization of Embedded FPGA Co-Processor. Yang Qu, Juha-Pekka Soininen |
| 2003 | Exact Numerical Processing. Juan Manuel García Chamizo, Jerónimo Mora Pascual, Higinio Mora Mora |
| 2003 | Exploring Storage Organization in ASIP Synthesis. Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar |
| 2003 | FC-Min: A Fast Multi-Output Boolean Minimizer. Petr Fiser, Jan Hlavicka, Hana Kubátová |
| 2003 | Fast Heuristics for the Edge Coloring of Large Graphs. Mario Hilgemeier, Nicole Drechsler, Rolf Drechsler |
| 2003 | Framed Complexity Analysis in SystemC for Multi-level Design Space Exploration. Armin Wellig, Julien Zory |
| 2003 | HW/SW Codesign Incorporating Edge Delays Using Dynamic Programming. Karthikeyan Bhasyam, Kia Bazargan |
| 2003 | Hierarchical Constraint Conscious RT-level Test Generation. Ozgur Sinanoglu, Alex Orailoglu |
| 2003 | Information-driven Library-based Circuit Synthesis. Lech Józwiak, Szymon Bieganski, Artur Chojnacki |
| 2003 | Low-power Branch Target Buffer for Application-Specific Embedded Processors. Peter Petrov, Alex Orailoglu |
| 2003 | Modelling and Simulation of a Digital IC System Using SimulPet: Application to a Speech Coding Communication IC. Raquel Fernández-Ramos, Jorge Romero-Sánchez, Francisco J. Ríos-Gómez, José F. Martín-Canales |
| 2003 | Multi Component Digital Circuit Optimization by Solving FSM Equations. Nina Yevtushenko, Svetlana Zharikova, Maria Vetrova |
| 2003 | Multiple Voltage and Frequency Scheduling for Power Minimization. Bharath Radhakrishnan, Muthukumar Venkatesan |
| 2003 | NOAH, a tool for argument reduction, serial and parallel decomposition of decision tables. Michal Pleban, Hubert Niewiadomski, Piotr Buciak, Henry Selvaraj, Piotr Sapiecha, Tadeusz Luba |
| 2003 | NoCs: A new Contract between Hardware and Software. Axel Jantsch |
| 2003 | Operating Region Modelling of Deep-submicron CMOS Buffers Driving Global Scope Inductive Interconnects. Gregorio Cappuccino |
| 2003 | Power/Area Analysis and Optimization of a DS-SS receiver for an Integrated Sensor Microsystem. Nizamettin Aydin, Tughrul Arslan, David R. S. Cumming |
| 2003 | RDSP: A RISC DSP based on Residue Number System. Ricardo Chaves, Leonel Sousa |
| 2003 | Reconfigurable Randomized K-way Graph Partitioning. Fatih Kocan |
| 2003 | Reversible Logic Synthesis for Minimization of Full-Adder Circuit. Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Ahsan Raja Chowdhury, Syed Mostahed Ali Chowdhury |
| 2003 | Scheduling and Assignment for Real-time Embedded Systems with Resource Contention. Loïc Pontani, Denis Dupont |
| 2003 | Sensor Platform Design for Automotive Applications. Marco De Marinis, Luca Fanucci, A. Giambastiani, Alessandro Renieri, Alessandro Rocchi, Christian Rosadini, Claudio Sicilia, Daniele Sicilia |
| 2003 | Stochastic Reconfigurable Hardware for Neural Networks. Nadia Nedjah, Luiza de Macedo Mourelle |
| 2003 | Successful Prototyping of a Real-Time Hardware Based Terrain Navigation Correlator Algorithm. Filip Traugott, Kim Andersson, Andreas Löfgren, Lennart Lindh |
| 2003 | T&D-Bench+ - A Software Environment for Modeling and Simulation of State-of-the-Art Processors. Sandro Neves Soares, Flávio Rech Wagner |
| 2003 | Temperature Influence on Power Consumption and Time Delay. Adam Golda, Andrzej Kos |
| 2003 | Test scheduling for embedded systems. Zdenek Kotásek, Daniel Mika, Josef Strnadel |
| 2003 | Testable Design Verification Using Petri Nets. Richard Ruzicka |
| 2003 | The Application of Formal Verification to SPW Designs. Behzad Akbarpour, Sofiène Tahar |
| 2003 | Towards the Digitally Named World -Challenges for New Social Infrastructures based on Information Technologies. Hiroto Yasuura |
| 2003 | Understanding Video Pixel Processing Applications for Flexible Implementations. Om Prakash Gangwal, Johan G. W. M. Janssen, Selliah Rathnam, Erwin B. Bellers, Marc Duranton |
| 2003 | Unified Dual Data Caches. Ben H. H. Juurlink |
| 2003 | Variations on Truncated Multiplication. James E. Stine, Oliver M. Duverne |