| 2021 | 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2021, Vienna, Austria, April 7-9, 2021 Muhammad Shafique, Andreas Steininger, Lukás Sekanina, Milos Krstic, Goran Stojanovic, Vojtech Mrazek |
| 2021 | A Benchmark Suite of RT-level Hardware Trojans for Pipelined Microprocessor Cores. Aleksa Damljanovic, Annachiara Ruospo, Ernesto Sánchez, Giovanni Squillero |
| 2021 | A Model-Based Framework to Assess the Reliability of Safety-Critical Applications. Lucas Matana Luza, Annachiara Ruospo, Alberto Bosio, Ernesto Sánchez, Luigi Dilillo |
| 2021 | A Parameterizable Chisel Generator of Numerically Controlled Oscillators for Direct Digital Synthesis. Vukan D. Damnjanovic, Marija L. Petrovic, Vladimir M. Milovanovic |
| 2021 | Accelerated Analysis of Simulation Dumps through Parallelization on Multicore Architectures. Davide Appello, Paolo Bernardi, Andrea Calabrese, Stefano Littardi, Giorgio Pollaccia, Stefano Quer, Vincenzo Tancorre, Roberto Ugioli |
| 2021 | AdequateDL: Approximating Deep Learning Accelerators. Olivier Sentieys, Silviu-Ioan Filip, David Briand, David Novo, Etienne Dupuis, Ian O'Connor, Alberto Bosio |
| 2021 | An Open-source Library of Large Integer Polynomial Multipliers. Malik Imran, Zain Ul Abideen, Samuel Pagliarini |
| 2021 | Analysis of State Corruption caused by Permanent Faults in WCHB-based Quasi Delay-Insensitive Pipelines. Raghda El Shehaby, Andreas Steininger |
| 2021 | Approximate Multipliers for Optimal Utilization of FPGA Resources. Christoph Niemann, Michael Rethfeldt, Dirk Timmermann |
| 2021 | Behavioral Model of Dot-Product Engine Implemented with 1T1R Memristor Crossbar Including Assessment. Jianan Wen, Markus Ulbricht, Eduardo Pérez, Xin Fan, Milos Krstic |
| 2021 | CLD: An Accurate, Cost-Effective and Scalable Run-Time Cache Leakage Detector. Ameer Shalabi, Tara Ghasempouri, Peeter Ellervee, Jaan Raik |
| 2021 | Design and Implementation Strategy of Adaptive Processor-Based Systems for Error Resilient and Power-Efficient Operation. Mitko Veleski, Michael Hübner, Milos Krstic, Rolf Kraemer |
| 2021 | Development of On-Chip Calibration for Hybrid Pixel Detectors. Pawel Skrzypiec, Robert Szczygiel |
| 2021 | EKV MOS Transistor Model For Ultra Low-Voltage Bulk-Driven IC Design. Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Michal Sovcik, Viera Stopjaková |
| 2021 | Efficient Acceleration of Decision Tree Algorithms for Encrypted Network Traffic Analysis. Roman Vrána, Jan Korenek |
| 2021 | Efficient Neural Network Approximation via Bayesian Reasoning. Alessandro Savino, Marcello Traiola, Stefano Di Carlo, Alberto Bosio |
| 2021 | Embedded Test Instrument for Intermittent Resistive Fault Detection at Chip Level and Its Reuse at Board Level. Hassan Ebrahimi, Hans G. Kerkhoff |
| 2021 | Emerging Technologies: Challenges and Opportunities for Logic Synthesis. Alberto Bosio, Mayeul Cantan, Cédric Marchand, Ian O'Connor, Petr Fiser, Arnaud Poittevin, Marcello Traiola |
| 2021 | Enhanced Reliability of Fully Differential Difference Amplifier Through On-chip Digital Calibration. David Maljar, Michal Sovcík, Daniel Arbet, Viera Stopjaková |
| 2021 | Fully-integrated SPAD active quenching/resetting circuit in high-voltage 0.35-μ m CMOS for reaching PDP saturation at 650 nm. Alija Dervic, Saman Kohneh Poushi, Horst Zimmermann |
| 2021 | HEIST: A Hardware Signal Fault Injection Methodology Enabling Feasible Software Robustness Testing. Martin Skriver, Anders Stengaard Sørensen, Ulrik Pagh Schultz |
| 2021 | High-speed stateful packet classifier based on TSS algorithm optimized for off-chip memories. Michal Orsák, Tomás Benes |
| 2021 | Logic Resynthesis of Majority-Based Circuits by Top-Down Decomposition. Siang-Yun Lee, Heinz Riener, Giovanni De Micheli |
| 2021 | On the Functional Test of Special Function Units in GPUs. Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Matteo Sonza Reorda |
| 2021 | PolyAdd: Polynomial Formal Verification of Adder Circuits. Rolf Drechsler |
| 2021 | Predictive Fault Grouping based on Faulty AC Matrices. Nicola Dall'Ora, Sadia Azam, Enrico Fraccaroli, André Alberts, Franco Fummi |
| 2021 | Prevention and Detection Methods of Systematic Failures in the Implementation of SoC Safety Mechanisms not Covered by Regular Functional Tests. Denis Dutey, Stephane Martin, Anne Merlande, Om Ranjan |
| 2021 | Q-Learning-based Routing Algorithm for 3D Network-on-Chips. Nurettin Bölücü, Suleyman Tosun |
| 2021 | Synthesis of approximate circuits for LUT-based FPGAs. Zdenek Vasícek |
| 2021 | Test and Verification Environment and Methodology for Vernier Time-to-Digital Converter Pixel Array. Lukasz A. Kadlubowski, Piotr Kmon |
| 2021 | Tutorial: Silicon Systems for Wireless LAN. Zoran Stamenkovic, Hassen Aziza, Ernesto Sánchez, Alberto Bosio |
| 2021 | Using Model Checker to Analyze and Test Digital Circuits with Regard to Delay Faults. Josef Strnadel |