| 2018 | 2.4 GHz LC-VCO with Improved Robustness against PVT Using FD-SOI Body Biasing Technique. Szymon Reszewicz, Krzysztof Siwiec, Witold A. Pleskacz |
| 2018 | 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2018, Budapest, Hungary, April 25-27, 2018 |
| 2018 | A Methodology to Verify Digital IP's within Mixed-Signal Systems. Navaneetha Channiganathota Manjappa, Anselm Breitenreiter, Markus Ulbricht, Milos Krstic |
| 2018 | A Novel TFET 8T-SRAM Cell with Improved Noise Margin and Stability. Seyed Hamid Fani, Ali Peiravi, Hooman Farkhani, Farshad Moradi |
| 2018 | A Rare Event Based Yield Estimation Methodology for Analog Circuits. Izel Cagin Odabasi, Mustafa Berke Yelten, Engin Afacan, I. Faik Baskaya, Ali Emre Pusane, Günhan Dündar |
| 2018 | An Evolutionary Technique for Reducing the Duration of Reconfigurable Scan Network Test. Riccardo Cantoro, Luigi San Paolo, Matteo Sonza Reorda, Giovanni Squillero |
| 2018 | An Integrated Phase Shifting Frequency Synthesizer for Active Electronically Scanned Arrays. Giulio D'Amato, Giovanni Piccinni, Gianfranco Avitabile, Giuseppe Coviello, Claudio Talarico |
| 2018 | Augmenting All Solution SAT Solving for Circuits with Structural Information. Abraham Temesgen Tibebu, Görschwin Fey |
| 2018 | Constraint-Based Pattern Retargeting for Reducing Localized Power Activity During Testing. Harshad Dhotre, Stephan Eggersglüß, Rolf Drechsler, Mehdi Dehbashi, Ulrike Pfannkuchen |
| 2018 | Contribution to Automated Generating of System Power-Management Specification. Dominik Macko |
| 2018 | Design and Performance Analysis of Ultra-Low Voltage Rail-to-Rail Comparator in 130 nm CMOS Technology. Lukás Nagy, Daniel Arbet, Martin Kovác, Miroslav Potocný, Viera Stopjaková |
| 2018 | Design of Low-Bit Robust Analog-to-Digital Converters for Signals with Gaussian Distribution. Milan R. Dincic, Zoran H. Peric, Dragan B. Denic, Zoran Stamenkovic |
| 2018 | Flip-Flop SEUs Mitigation through Partial Hardening of Internal Latch and Adjustment of Clock Duty Cycle. Yuanqing Li, Anselm Breitenreiter, Marko S. Andjelkovic, Oliver Schrape, Milos Krstic |
| 2018 | Heap Queue: A Novel Efficient Hardware Architecture of MIN/MAX Queues for Real-Time Systems. Lukás Kohútka, Viera Stopjaková |
| 2018 | Heuristic for Page-Based Incremental Reprogramming of Wireless Sensor Nodes. Kai Lehniger, Stefan Weidling, Mario Schölzel |
| 2018 | Integrated Sensors for Early Breast Cancer Diagnostics. Omar Farag, Mariam Mohamed, Mohamed A. Abd El-Ghany, Klaus Hofmann |
| 2018 | Intermittent Resistance Fault Detection at Board Level. Hassan Ebrahimi, Hans G. Kerkhoff |
| 2018 | Modeling and Accelerated Mixed-Signal Simulation of a Control System. Sara Divanbeigi, Felix Winkler, Martin Bergen, Markus Olbrich |
| 2018 | Natural Language Based Power Domain Partitioning. David Lemma, Daniel Große, Rolf Drechsler |
| 2018 | Nonlinear Binary Codes and Their Utilization for Test. Ondreg Novak |
| 2018 | On the Comparison of Different ATPG Approaches for Approximate Integrated Circuits. Marcello Traiola, Arnaud Virazel, Patrick Girard, Mario Barbareschi, Alberto Bosio |
| 2018 | QoSinNoC: Analysis of QoS-Aware NoC Architectures for Mixed-Criticality Applications. Serhiy Avramenko, Siavoosh Payandeh Azad, Stefano Esposito, Behrad Niazmand, Massimo Violante, Jaan Raik, Maksim Jenihhin |
| 2018 | Reliability-Aware Multi-Vth Domain Digital Design Assessment. Theodor Hillebrand, Ludwig Karsthof, Steffen Paul, Dagmar Peters-Drolshagen |
| 2018 | Replication-Based Deterministic Testing of 2-Dimensional Arrays with Highly Interrelated Cells. Siavoosh Payandeh Azad, Adeboye Stephen Oyeniran, Raimund Ubar |
| 2018 | Self Vth-Compensating CMOS On-Chip Rectifier for Inductively Powered Implantable Medical Devices. Miroslav Potocný, Viera Stopjaková, Martin Kovác |
| 2018 | Software-Level TMR Approach for On-Board Data Processing in Space Applications. Karl Janson, Carl Johann Treudler, Thomas Hollstein, Jaan Raik, Maksim Jenihhin, Görschwin Fey |
| 2018 | Superpixel Accelerator for Computer Vision Applications on Arria 10 SoC. Amila Akagic, Emir Buza, Razija Turcinhodzic, Hana Haseljic, Hiroyuki Noda, Hideharu Amano |
| 2018 | Synthesis of Finite State Machines on Memristor Crossbars. Umberto Ferrandino, Marcello Traiola, Mario Barbareschi, Antonino Mazzeo, Petr Fiser, Alberto Bosio |
| 2018 | Tuning Stochastic Space Compaction to Faster-than-at-Speed Test. Alexander Sprenger, Sybille Hellebrand |
| 2018 | Two-Stage Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Michal Sovcik |
| 2018 | Using a Duplex Time-to-Digital Converter for Metastability Characterization of an FPGA. Florian Huemer, Thomas Polzer, Andreas Steininger |