DDECS C

67 papers

YearTitle / Authors
201417th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014
2014A 120V high voltage DAC array for a tunable antenna in communication system.
Jing Ning, Klaus Hofmann
2014A 64-MHz∼640-MHz 64-phase clock generator.
Hong-Yi Huang, Jen-Chieh Liu, Shi-Jia Sun, Cheng-Hao Fu, Kuo-Hsing Cheng
2014A design of an area-efficient 10-GHz phase-locked loop for source-synchronous, multi-channel links in 90-nm CMOS technology.
Woo-Rham Bae, Deog-Kyoon Jeong, Byoung-Joo Yoo
2014A double-path intra prediction architecture for the hardware H.265/HEVC encoder.
Andrzej Abramowski, Grzegorz Pastuszak
2014A layout based customized testing technique for total microfluidic operations in digital microfluidic biochips.
Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta
2014A low supply voltage synchronous mirror delay with quadrature phase output.
Yo-Hao Tu, Kuo-Hsing Cheng, Chih-Hsun Hsu, Hong-Yi Huang
2014A new architecture for minimum mean square error sorted QR decomposition for MIMO wireless communication systems.
Victor Tomashevich, Christina Gimmler-Dumont, Christian Fesl, Norbert Wehn, Ilia Polian
2014A novel impedance calculation method and its time efficiency evaluation.
Juraj Brenkus, Viera Stopjaková, Daniel Arbet, Gábor Gyepes, Libor Majer
2014A study on fast pipelined pseudo-random number generator based on chaotic logistic map.
Pawel Dabal, Ryszard Pelka
2014A unified CMOS inverter model for planar and FinFET nanoscale technologies.
Panagiotis Chaourani, Spyridon Nikolaidis
2014ADCs in deep submicron technologies for ASICs of pixel architecture.
Piotr Otfinowski, Pawel Grybos, Robert Szczygiel, Piotr Maj
2014An approach towards selection of the oscillation frequency for oscillation test of analog ICs.
Martin Kovác, Daniel Arbet, Gabriel Nagy, Viera Stopjaková
2014An efficient hardware architecture for inter-prediction in H.264/AVC encoders.
Nam-Khanh Dang, Xuan-Tu Tran, Alain Merirot
2014An intra-cell defect grading tool.
Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, Arnaud Virazel, S. Bernabovi, Paolo Bernardi
2014Analysis of current conveyor non-idealities for implementation as integrator in delta sigma modulators.
Harish Balasubramaniam, Klaus Hofmann
2014Automatic and reliable electrical characterization of MOSFETs.
Zoran Stamenkovic, N. D. Vasovic, Goran S. Ristic
2014Automatically connecting hardware blocks via light-weight matching techniques.
Jan Malburg, Niklas Krafczyk, Görschwin Fey
2014BuildMaster: Efficient ASIP architecture exploration through compilation and simulation result caching.
Roel Jordans, Erkan Diken, Lech Józwiak, Henk Corporaal
2014Burst-pulse Generator based on transmission line toward sub-MMW.
Parit Kanjanavirojkul, Nguyen Ngoc Mai Khanh, Toru Nakura, Kunihiro Asada
2014CRC based hashing in FPGA using DSP blocks.
Tomás Závodník, Lukas Kekely, Viktor Pus
2014Case study: BISR for a processor multiplier.
Andrej Kincel, Marcel Baláz
2014Combining fault tolerance and self repair at minimum cost in power and hardware.
Tobias Koal, Mario Schölzel, Heinrich Theodor Vierhaus
2014Customer return detection with features selection.
Domenico Bertoncelli, Pasquale Caianiello
2014Dedicated hardware architecture for object tracking preprocessing implemented in FPGA.
Peter Malík
2014Design methodology of configurable high performance packet parser for FPGA.
Viktor Pus, Lukas Kekely, Jan Korenek
2014Designing of Test Pattern Generators for stimulation of crosstalk faults in bus-type connections.
Tomasz Garbolino
2014Development of 3D space partitioning and design rule check for smart system solutions.
Stefano Pettazzi, Andrew Plews, Anatoly Rudenko, Ahmed Nejim
2014Efficient VHDL implementation of symbol synchronization for software radio based on FPGA.
Pavel Fiala, Richard Linhart
2014Emulation based fault injection on UHF RFID transponder.
Omar Abdelmalek, David Hély, Vincent Beroulle
2014Evolutionary design of approximate multipliers under different error metrics.
Zdenek Vasícek, Lukás Sekanina
2014FPGA architectures of the quantization and the dequantization for video encoders.
Grzegorz Pastuszak
2014FPGA design of the computation unit for the semi-global stereo matching algorithm.
Mikolaj Roszkowski, Grzegorz Pastuszak
2014Fast lookup for dynamic packet filtering in FPGA.
Lukas Kekely, Martin Zádník, Jirí Matousek, Jan Korenek
2014Fast time-parallel C-based event-driven RTL simulation.
Tariq Bashir Ahmad, Maciej J. Ciesielski
2014Generic built-in self-repair architectures for SoC logic cores.
Marcel Baláz, Stefan Kristofík, Mária Fischerová
2014Generic partial dynamic reconfiguration controller for transient and permanent fault mitigation in fault tolerant systems implemented into FPGA.
Lukas Miculka, Zdenek Kotásek
2014Heuristic algorithm of two-level minimization of fuzzy logic functions.
Andrzej Wielgus
2014High throughput architecture for the Advanced Encryption Standard Algorithm.
Salma Hesham, Mohamed A. Abd El Ghany, Klaus Hofmann
2014Low latency book handling in FPGA for high frequency trading.
Milan Dvorak, Jan Korenek
2014Lower bounds of the size of Shared Structurally Synthesized BDDs.
Raimund Ubar, Dmitri Mironov
2014Mismatch effects and their correction in large area ASICs.
Piotr Maj
2014Modeling and analysis of cracked through silicon via (TSV) interconnections.
Vasileios Gerakis, Christina Avdikou, Alexandros Liolios, Alkis A. Hatzopoulos
2014Modeling timing constraints for automatic generation of embedded test instruments.
Steffen Ostendorff, Jorge H. Meza Escobar, Heinz-Dietrich Wuttke, Thomas Sasse, Sebastian Richter
2014Multistage low ripple charge pump.
Andrzej Grodzicki, Witold A. Pleskacz
2014Numerical and theoretical analysis on voltage and time domain dynamic range of scaled CMOS circuits.
Kevin Ngari Muriithi, Toru Nakura, Kunihiro Asada
2014On NFA-split architecture optimizations.
Vlastimil Kosar, Jan Korenek
2014On the in-field test of Branch Prediction Units using the correlated predictor mechanism.
Marco Gaudesi, S. Saleem, Ernesto Sánchez, Matteo Sonza Reorda, E. Tanowe
2014Online test vector insertion: A concurrent built-in self-testing (CBIST) approach for asynchronous logic.
Jürgen Maier, Andreas Steininger
2014Online testing of many-core systems in the Dark Silicon era.
Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen
2014Optimizing DD-based synthesis of reversible circuits using negative control lines.
Eleonora Schönborn, Kamalika Datta, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
2014Path delay test in the presence of multi-aggressor crosstalk, power supply noise and ground bounce.
Anu Asokan, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel
2014Protecting combinational logic in pipelined microprocessor cores against transient and permanent faults.
Imran Wali, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri
2014Quality assurance in memory built-in self-test tools.
Albert Au, Artur Pogiel, Janusz Rajski, Piotr Sydow, Jerzy Tyszer, Justyna Zawada
2014Reliable execution of statechart-generated correct embedded software under soft errors.
Ronaldo Rodrigues Ferreira, Thomas Klotz, Thilo Vörtler, Jean da Rolt, Gabriel L. Nazar, Álvaro Freitas Moreira, Luigi Carro, Karsten Einwich
2014Self-managing power management unit.
Dominik Macko, Katarína Jelemenská
2014SiP design flow and 3D DRC for MEMS.
A. Mehdaoui, J. Pagazani, G. Schropfer, Gaëlle Lissorgues
2014Sources of bias in EDA tools and its influence.
Petr Fiser, Jan Schmidt, Jiri Balcarek
2014Stabilization methods for integrated high voltage charge pumps.
Lufei Shen, Ferdinand Keil, Klaus Hofmann
2014Studying DAC capacitor-array degradation in charge-redistribution SAR ADCs.
Muhammad Aamir Khan, Hans G. Kerkhoff
2014System design for enhanced forward-engineering possibilities of safety critical embedded systems.
Martin Krammer, Michael Karner, Anton Fuchs
2014Test and diagnosis of power switches.
Miroslav Valka, Alberto Bosio, Luigi Dilillo, Aida Todri, Arnaud Virazel, Patrick Girard, P. Debaud, S. Guilhot
2014Test data compression based on reuse and bit-flipping of parts of dictionary entries.
Panagiotis Sismanoglou, Dimitris Nikolos
2014Test-data compression with low number of channels and short test time.
Ondrej Novák, Jiri Jenícek, Martin Rozkovec
2014The LSI implementation of a memory based field programmable device for MCU peripherals.
Tetsuya Matsumura, Naoya Okada, Yoshifumi Kawamura, Koji Nii, Kazutami Arimoto, Hiroshi Makino, Yoshio Matsuda
2014Timing-aware ATPG for critical paths with multiple TSVs.
Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel
2014Verifying robust frequency domain properties of non linear oscillators using SMT.
Hafiz ul Asad, Kevin D. Jones, Frédéric Surre