DDECS C

85 papers

YearTitle / Authors
20123D integration: Opportunities, design challenges and approaches.
Uwe Knöchel
2012A 1V, low power, high-gain, 3 - 11 GHz double-balanced CMOS sub-harmonic mixer.
Rouhollah Feghhi, Sasan Naseh
2012A 512 kb SRAM in 65nm CMOS with divided bitline and novel two-stage sensing technique.
Xiang Zheng, Ming Liu, Hong Chen, Huamin Cao, Cong Wang, Zhiqiang Gao
2012A SBST strategy to test microprocessors' Branch Target Buffer.
Paolo Bernardi, Lyl M. Ciganda, Michelangelo Grosso, Ernesto Sánchez, Matteo Sonza Reorda
2012A gigabit fully integrated plastic optical fiber receiver for a RC-LED source.
Mohamed Atef, Robert Swoboda, Horst Zimmermann
2012A low phase noise Ka-band voltage controlled oscillator using 0.15 µm GaAs pHEMT technology.
Hsuan-Ling Kao, S. P. Shih, Chih-Sheng Yeh, Li-Chun Chang
2012A low voltage sigma delta modulator for temperature sensor.
Yi-Hsiang Juan, Ching-Hsing Luo, Hong-Yi Huang
2012A low-overhead monitoring ring interconnect for MPSoC parameter optimization.
Abdelmajid Bouajila, Abdallah Lakhtel, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf
2012A new SAT-based ATPG for generating highly compacted test sets.
Stephan Eggersglüß, Rene Krenz-Baath, Andreas Glowatz, Friedrich Hapke, Rolf Drechsler
2012A new analog output buffer for data driver of active matrix displays using low-temperature polycrystalline silicon thin-film transistors.
Ilias Pappas, Stilianos Siskos, Alkis A. Hatzopoulos
2012A simulation framework for 3-dimension Networks-on-chip with different vertical channel density configurations.
Haoyuan Ying, Ashok Jaiswal, Mohamed A. Abd El-Ghany, Thomas Hollstein, Klaus Hofmann
2012A three-dimensional DRAM using floating body cell in FDSOI devices.
Xuelian Liu, Aamir Zia, Mitchell R. LeRoy, Srikumar Raman, Ryan Clarke, Russell P. Kraft, John F. McDonald
2012A user-level library for fault tolerance on shared memory multicore systems.
Hamid Mushtaq, Zaid Al-Ars, Koen Bertels
2012AGATE - towards designing a low-power chip multithreading processor for mobile software defined radio systems.
Krzysztof Marcinek, Witold A. Pleskacz
2012Adaptive voltage scaling by in-situ delay monitoring for an image processing circuit.
Martin Wirnshofer, Leonhard Heiß, Anil Narayan Kakade, Nasim Pour Aryan, Georg Georgakos, Doris Schmitt-Landsiedel
2012An adaptive self-test routine for in-field diagnosis of permanent faults in simple RISC cores.
Mario Schölzel, Tobias Koal, Heinrich Theodor Vierhaus
2012An automated infrastructure for real-time monitoring of multi-core Systems-on-Chip.
George Kornaros, Ioannis Christoforakis, Maria Astrinaki
2012An evaluation of the application dependent FPGA test method.
Martin Rozkovec, Jiri Jenícek, Ondrej Novák
2012Application of IDDT test towards increasing SRAM reliability in nanometer technologies.
Gábor Gyepes, Daniel Arbet, Juraj Brenkus, Viera Stopjaková
2012Asynchronous circuit design: From basics to practical applications.
Eckhard Grass, Milos Krstic, Xin Fan, Steffen Zeidler
2012Auto-calibration techniques in built-in jitter measurement circuit.
Chih-Ping Cheng, Jen-Chieh Liu, Kuo-Hsing Cheng
2012Automated debugging from pre-silicon to post-silicon.
Mehdi Dehbashi, Görschwin Fey
2012Automated synthesis and design-error repair of systems.
Georg Hofferek
2012Automatic integration of hardware descriptions into system-level models.
Ralph Görgen, Jan-Hendrik Oetjens, Wolfgang Nebel
2012BTI impact on logical gates in nano-scale CMOS technology.
Seyab Khan, Said Hamdioui, Halil Kukner, Praveen Raghavan, Francky Catthoor
2012Bounded model checking of Contiki applications.
Thilo Vörtler, Steffen Rülke, Petra Hofstedt
2012CDMA technique for Network-on-Chip.
Ahmed A. El Badry, Mohamed A. Abd El-Ghany
2012CIVA: Custom instruction vulnerability analysis framework.
Ali Azarpeyvand, Mostafa E. Salehi, Seid Mehdi Fakhraie
2012Combining on-line fault detection and logic self repair.
Tobias Koal, Markus Ulbricht, Heinrich Theodor Vierhaus
2012Complementary edge alignment and digital output signal speed-up CMOS positive feedback latches.
Vladimir M. Milovanovic, Horst Zimmermann
2012Current sensing completion detection in dual-rail asynchronous systems.
Lukás Nagy, Viera Stopjaková
2012D&T Presenter - electronic interactive system for design and test education.
Matej Hlatký, Valter Martinek, Elena Gramatová
2012Design and implementation of high-performance high-valency ling adders.
Taskin Koçak, Preeti Patil
2012Design methodology for fault tolerant ASICs.
Vladimir Petrovic, Marko Ilic, Günter Schoof, Zoran Stamenkovic
2012Design techniques for increasing performance and resource utilization of reconfigurable soft CPUs.
Alexander Wold, Dirk Koch, Jim Tørresen
2012Developing a new phase noise estimation technique based on time varying model.
Saber Izadpanah Tous, E. Mohamadi, M. Mousavi, R. Darvish Khalil Abadi, Ehsan Kargaran, Hooman Nabovati
2012Differential evolutionary optimization algorithm applied to ESD MOSFET model fitting problem.
Tomas Napravnik, Vlastimil Kote, Vladimir Molata, Jiri Jakovenko
2012Digital-driven formal analog verification for asynchronously feed-backed circuitries.
Gürkan Uygur, Sebastian Sattler
2012Effective RT-level software-based self-testing of embedded processor cores.
Parisa Kabiri, Zainalabedin Navabi
2012Efficient digital design for automotive mixed-signal ASICs using simulink.
Andreas Mauderer, Marvin Freier, Jan-Hendrik Oetjens, Wolfgang Rosenstiel
2012Efficient link-level error resilience in 3D NoCs.
Vladimir Pasca, Saif-Ur Rehman, Lorena Anghel, Mounir Benabdenbi
2012Evaluation of susceptibility of FPGA-based circuits to fault injection attacks based on clock glitching.
Jakub Korczyc, Andrzej Krasniewski
2012Fault management in an IEEE P1687 (IJTAG) environment.
Erik Larsson, Konstantin Sibin
2012Generation of SystemC/TLM code from UML/MARTE sequence diagrams for verification.
Emad Samuel Malki Ebeid, Davide Quaglia, Franco Fummi
2012Generation of non-overlapping clock signals without using a feedback loop.
Ronald Spilka, Gerald Hilber, Andreas Rauchenecker, Dominik Gruber, Michael Sams, Timm Ostermann
2012Genetic method for compressed skewed-load delay test generation.
Roland Dobai, Marcel Baláz
2012HLS-DoNoC: High-level simulator for dynamically organizational NoCs.
Liang Guang, Ethiopia Nigussie, Juha Plosila, Jouni Isoaho, Hannu Tenhunen
2012High speed FPGA implementation of hough transform for real-time applications.
Liberis Voudouris, Spiridon Nikolaidis, Abdoul Rjoub
2012IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2012, Tallinn, Estonia, April 18-20, 2012
Jaan Raik, Viera Stopjaková, Heinrich Theodor Vierhaus, Witold A. Pleskacz, Raimund Ubar, Helena Kruus, Maksim Jenihhin
2012Improving the iterative power of resynthesis.
Petr Fiser, Jan Schmidt
2012LC-VCO design automation tool for nanometer CMOS technology.
Krzysztof Siwiec, Tomasz Borejko, Witold A. Pleskacz
2012Lightweight benchmarking of platforms for network traffic processing.
Pavol Korcek, Martin Zádník
2012Lightweight cipher resistivity against brute-force attack: Analysis of PRESENT.
Jan Pospisil, Martin Novotný
2012Low power balun Design for 1.575 GHz in 90 nm CMOS rechnology.
Jacek Gradzki
2012Low power scan by partitioning and scan hold.
Efi Arvaniti, Yiorgos Tsiatouhas
2012Low-area boundary BIST architecture for mesh-like network-on-chip.
Jaan Raik, Vineeth Govind
2012Monitoring-driven HW/SW interrupt overload prevention for embedded real-time systems.
Josef Strnadel
2012Multiple stuck-at-fault detection theorem.
Raimund Ubar, Sergei Kostin, Jaan Raik
2012Multisine signal generation method for a bioimpedance measurement device.
Maksim Gorev, Vadim Pesonen, Peeter Ellervee
2012NAND/NOR gate polymorphism in low temperature environment.
Richard Ruzicka, Václav Simek
2012OBIST strategy versus parametric test - Efficiency in covering catastrophic faults in active analog filters.
Daniel Arbet, Gábor Gyepes, Juraj Brenkus, Viera Stopjaková
2012On test time reduction using pattern overlapping, broadcasting and on-chip decompression.
Martin Chloupek, Ondrej Novák, Jiri Jenícek
2012On the use of assertions for embedded-software dynamic verification.
Giuseppe Di Guglielmo, Luigi Di Guglielmo, Franco Fummi, Graziano Pravadelli
2012On-chip aging sensor to monitor NBTI effect in nano-scale SRAM.
Arthur Ceratti, Thiago Copetti, Letícia Maria Bolzani Poehls, Fabian Vargas
2012On-line test of embedded systems: Which role for functional test?
Matteo Sonza Reorda
2012Online self-checking and correction for crosstalk-induced timing errors on VLSI interconnects.
Ping-Liang Lai, Der-Chen Huang
2012Optimised Power Supply Unit Design.
Martin Pospisilik, Milan Adamek
2012Power constraint testing for multi-clock domain SoCs using concurrent hybrid BIST.
M. H. Haghbayan, Saeed Safari, Zainalabedin Navabi
2012Radiation-tolerant combinational gates - an implementation based comparison.
Varadan Savulimedu Veeravalli, Andreas Steininger
2012Reconfigurable time interval measurement circuit incorporating a programmable gain time difference amplifier.
Ahmed Naif M. Alahmadi, Gordon Russell, Alex Yakovlev
2012Reduction of complex safety models based on Markov chains.
Martin Kohlík, Hana Kubátová
2012Reliability challenges in avionics due to silicon aging.
Behzad Mesgarzadeh, Ingemar Söderquist, Atila Alvandpour
2012Security properties of oscillator rings in true random number generators.
Knut Wold, Slobodan Petrovic
2012Selective redundancy to improve reliability and to slow down delay degradation due to gate oxide breakdown.
Hagen Sämrow, Claas Cornelius, Philipp Gorski, Andreas Tockhorn, Dirk Timmermann
2012Synthesis of Petri nets into FPGA with operation flexible memories.
Arkadiusz Bukowiec, Marian Adamski
2012System side-channel leakage emulation for HW/SW security coverification of MPSoCs.
Armin Krieg, Johannes Grinschgl, Christian Steger, Reinhold Weiss, Holger Bock, Josef Haid
2012TSV based 3D stacked ICs: Opportunities and challenges.
Said Hamdioui
2012Temperature and on-chip crosstalk measurement using ring oscillators in FPGA.
Martin Gag, Tim Wegner, Ansgar Waschki, Dirk Timmermann
2012Test and configuration architecture of a sub-THz CMOS detector array.
Péter Földesy, Domonkos Gergelyi, Csaba Fuzy, Gergely Károlyi
2012Test platform for fault tolerant systems design properties verification.
Martin Straka, Lukas Miculka, Jan Kastil, Zdenek Kotásek
2012The architecture and the technology characterization of an FPGA-based customizable Application-Specific Vector Processor.
Jaroslav Sykora, Lukas Kohout, Roman Bartosinski, Leos Kafka, Martin Danek, Petr Honzík
2012The design of dependable flexible multi-sensory System-on-Chips for security applications.
Hans G. Kerkhoff, Yong Zhao
2012VARMA - VARiability modelling and analysis tool.
Gordon Russell, Frank P. Burns, Alex Yakovlev
2012VHDLVisualizer: HDL model visualization with simulation-based verification.
Dominik Macko, Katarína Jelemenská
2012Vertical Slit Transistor based Integrated Circuits (VeSTICs).
Andrzej Pfitzner