DDECS C

92 papers

YearTitle / Authors
201013th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010, Vienna, Austria, April 14-16, 2010
Elena Gramatová, Zdenek Kotásek, Andreas Steininger, Heinrich Theodor Vierhaus, Horst Zimmermann
2010A 0.4 V bulk-input pseudo amplifier in 90nm CMOS technology.
Arash Ahmadpour
2010A 12-bit fully differential 2MS/s successive approximation analog-to-digital converter with reduced power consumption.
Milos Davidovic, Gerald Zach, Horst Zimmermann
2010A 3-5GHz UWB CMOS receiver with digital control technique.
Bo Han, Mengmeng Liu, Ning Ge
2010A 65nm embedded low power SRAM compiler.
Sheng Wu, Xiang Zheng, Zhiqiang Gao, Xiangqing He
2010A Build-In Self-Test technique for RF Mixers.
Lambros Dermentzoglou, Angela Arapoyanni, Yiorgos Tsiatouhas
2010A better-than-worst-case robustness measure.
Stefan Frehse, Görschwin Fey, Rolf Drechsler
2010A comparison of low voltage LNA architectures designed for multistandard GNSS in two 90 nm CMOS technologies.
Jacek Gradzki, Tomasz Borejko, Witold A. Pleskacz
2010A deterministic approach for hardware fault injection in asynchronous QDI logic.
Werner Friesenbichler, Thomas Panhofer, Andreas Steininger
2010A fault-tolerant and congestion-aware routing algorithm for Networks-on-Chip.
Mojtaba Valinataj, Siamak Mohammadi, Juha Plosila, Pasi Liljeberg
2010A hardware accelerated framework for the generation of design validation programs for SMT processors.
Danilo Ravotto, Ernesto Sánchez, Matteo Sonza Reorda
2010A low phase noise 20 GHz voltage control oscillator using 0.18-μm CMOS technology.
Chia-Ming Yang, Hsuan-Ling Kao, Y. C. Chang, M. T. Chen, H. M. Chang, C. H. Wu
2010A low power low voltage mixer for 2.4GHz applications in CMOS-90nm technology.
Alberto Villegas, Diego Vázquez, Adoración Rueda
2010A mixer-filter combination of a direct conversion receiver for DVB-H applications in 65nm CMOS.
Heimo Uhrmann, Lukas Dörrer, Franz Kuttner, Kurt Schweiger, Horst Zimmermann
2010A novel SRAM-based FPGA architecture for defect and fault tolerance of configurable logic blocks.
Farid Lahrach, Abderrazek Abdaoui, Abderrahim Doumar, Eric Châtelet
2010A software-based self-test and hardware reconfiguration solution for VLIW processors.
Tobias Koal, Heinrich Theodor Vierhaus
2010A synthesis method to propagate false path information from RTL to gate level.
Satoshi Ohtake, Hiroshi Iwata, Hideo Fujiwara
2010A time-to-digital converter using multi-phase-sampling and time amplifier for all digital phase-locked loop.
Kuo-Hsing Cheng, Chang-Chien Hu, Jen-Chieh Liu, Hong-Yi Huang
2010Advanced embedded memory testing: Reducing the defect per million level at lower test cost.
Said Hamdioui, Ad J. van de Goor
2010An integrated low power buck converter with a comparator controlled low-side switch.
Reinhard Enne, Horst Zimmermann
2010Analysis of power consumption and transition fault coverage for LOS and LOC testing schemes.
Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Junxia Ma, Wei Zhao, Mohammad Tehranipoor, Xiaoqing Wen
2010Asynchronous design, Quo Vadis?
Alex Yakovlev
2010Automated SEU fault emulation using partial FPGA reconfiguration.
Uros Legat, Anton Biasizzo, Franc Novak
2010Automated simulation-based verification of power requirements for Systems-on-Chips.
Christoph Trummer, Christoph M. Kirchsteiger, Christian Steger, Reinhold Weiss, Markus Pistauer, Damian Dalton
2010Blind image deconvolution algorithm on NVIDIA CUDA platform.
Tomas Mazanec, Antonin Hermanek, Jan Kamenický
2010Buffer-ring-based all-digital on-chip monitor for PMOS and NMOS process variability and aging effects.
Tetsuya Iizuka, Toru Nakura, Kunihiro Asada
2010Built-in Clock Domain Crossing (CDC) test and diagnosis in GALS systems.
Carlos Leong, Pedro Machado, Vasco Bexiga, João Paulo Teixeira, Isabel C. Teixeira, José C. Silva, Pedro Lousã, João Varela
2010Characterization of randomness sources in ring oscillator-based true random number generators in FPGAs.
Boyan Valtchanov, Viktor Fischer, Alain Aubert, Florent Bernard
2010Combined matched filter and arbitrary interpolator for symbol timing synchronization in SDR receivers.
Mehmood-ur-Rehman Awan, Peter Koch
2010Combining de-stressing and self repair for long-term dependable systems.
Tobias Koal, Heinrich Theodor Vierhaus
2010Comparison of jitter decomposition methods for BER analysis of high-speed serial links.
Stefan Erb, Wolfgang Pribyl
2010Computation reduction for statistical analysis of the effect of nano-CMOS variability on asynchronous circuits.
Zheng Xie, Doug A. Edwards
2010Constraint-based test pattern generation at the Register-Transfer Level.
Taavi Viilukas, Jaan Raik, Maksim Jenihhin, Raimund Ubar, Anna Krivenko
2010Cumulative embedded memory failure bitmap display & analysis.
Nicola Campanelli, Tamas Kerekes, Paolo Bernardi, Mauricio de Carvalho, Alessandro Panariti, Matteo Sonza Reorda, Davide Appello, Mario Barone
2010Current Sensing Completion Detection in deep sub-micron technologies.
Lukás Nagy, Viera Stopjaková
2010Data compression in hardware - The Burrows-Wheeler approach.
Sebastian Arming, Roman Fenkhuber, Thomas Handl
2010Decoupling capacitance study and optimization method for high-performance VLSIs.
Qing K. Zhu, Joe Yong, Tom Mozdzen
2010Design - Time configurable processor basic structure.
Filip Adamec, Tomas Fryza
2010Design of a single layer programmable Structured ASIC library.
Thomas C. P. Chau, David W. L. Wu, Yanqing Ai, Brian P. W. Chan, Sam M. H. Ho, Oscar K. L. Lau, Steve C. L. Yuen, Kong-Pang Pun, Oliver C. S. Choy, Philip Heng Wai Leong
2010Developing reconfigurable FIFOs to optimize power/performance of Voltage/Frequency Island-based networks-on-chip.
Amir-Mohammad Rahmani, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen
2010Efficient mapping of nondeterministic automata to FPGA for fast regular expression matching.
Jan Korenek, Vlastimil Kosar
2010Enhancing pipelined processor architectures with fast autonomous recovery of transient faults.
Marcus Jeitler, Jakob Lechner, Andreas Steininger
2010Ensuring high testability without degrading security: Embedded tutorial on "test and security".
Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2010Evaluation of Radix-2 and Radix-4 FFT processing on a reconfigurable platform.
Waqar Hussain, Fabio Garzia, Jari Nurmi
2010Evaluation of transition untestable faults using a multi-cycle capture test generation method.
Masayoshi Yoshimura, Hiroshi Ogawa, Toshinori Hosokawa, Koji Yamazaki
2010Evolutionary circuit design: Tutorial.
Lukás Sekanina
2010Exploration of the FlexRay signal integrity using a combined prototyping and simulation approach.
Martin Krammer, Federico Clazzer, Eric Armengaud, Michael Karner, Christian Steger, Reinhold Weiss
2010Fault diagnosis of crosstalk induced glitches and delay faults.
Shehzad Hasan, Ajoy Kumar Palit, Walter Anheier
2010Formal verification meets robustness checking - Techniques and challenges.
Rolf Drechsler, Görschwin Fey
2010Hardware accelerated pattern matching based on Deterministic Finite Automata with perfect hashing.
Jan Kastil, Jan Korenek
2010Highly linear down-conversion mixer in 65nm CMOS for a high supply voltage of 2.5V.
Kurt Schweiger, Horst Zimmermann
2010How to reduce size of a signature-based diagnostic dictionary used for testing of connections.
Tomasz Garbolino, Krzysztof Gucwa, Andrzej Hlawiczka
2010Instruction reliability analysis for embedded processors.
Ali Azarpeyvand, Mostafa E. Salehi, Farshad Firouzi, Amir Yazdanbakhsh, Sied Mehdi Fakhraie
2010Instruction set extensions for multi-threading in LEON3.
Martin Danek, Leos Kafka, Lukas Kohout, Jaroslav Sykora
2010Intelligent IGBT driver concept for three-phase electric drive diagnostics.
Bohumil Klima, Jan Knobloch, Martin Pochyla
2010Low-cost fault tolerance on the ALU in simple pipelined processors.
Nguyen Minh Huu, Bruno Robisson, Michel Agoyan, Nathalie Drach
2010Low-cost, customized and flexible SRAM MBIST engine.
Ad J. van de Goor, Christian Jung, Said Hamdioui, Georgi Gaydadjiev
2010Memory elements based on minority-3 gates and inverters implemented in 90 nm CMOS.
Snorre Aunet, Amir Hasanbegovic
2010Memory optimizations for packet classification algorithms in FPGA.
Viktor Pus, Juraj Blaho, Jan Korenek
2010Modeling temperature distribution in Networks-on-Chip using RC-circuits.
Andreas Tockhorn, Claas Cornelius, Hagen Sämrow, Dirk Timmermann
2010Modern fault tolerant architectures based on partial dynamic reconfiguration in FPGAs.
Martin Straka, Jan Kastil, Zdenek Kotásek
2010NoGap
Wenbiao Zhou, Per Karlström, Dake Liu
2010Noise determination of a current conveyor in an inverting voltage amplifier configuration.
Stylianos Siskos
2010Non-disjoint decomposition of logic functions in Reed-Muller spectral domain.
Edward Hrynkiewicz, Stefan Kolodzinski
2010On analysis of fabricated polymorphic circuits.
Václav Simek, Richard Ruzicka, Lukás Sekanina
2010On logic synthesis of conventionally hard to synthesize circuits using genetic programming.
Petr Fiser, Jan Schmidt, Zdenek Vasícek, Lukás Sekanina
2010On the mitigation of SET broadening effects in integrated circuits.
Luca Sterpone, Niccolò Battezzati
2010Partitioning methods for unicast/multicast traffic in 3D NoC architecture.
Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Hannu Tenhunen
2010Receiver synchronization in video streaming with short latency over asynchronous networks.
Jiri Halak, Sven Ubik, Petr Zejdl
2010Reconfigurable hardware objects for image processing on FPGAs.
Jan Kloub, Petr Honzík, Martin Danek
2010Reduction of power dissipation through parallel optimization of test vector and scan register sequences.
Zdenek Kotásek, Jaroslav Skarvada, Josef Strnadel
2010SREEP: Shift Register Equivalents Enumeration and Synthesis Program for secure scan design.
Katsuya Fujiwara, Hideo Fujiwara, Marie Engelene J. Obien, Hideo Tamamoto
2010Safety features of SoCs: How can they be re-used?
Davide Appello
2010Self-Adaptive mechanism for cache memory reliability improvement.
Liviu Agnola, Mircea Vladutiu, Mihai Udrescu
2010Self-repairing and tuning reconfigurable electronics for space.
Didier Keymeulen
2010Simulation-based sensitivity and worst-case analyses of automotive electronics.
Monica Rafaila, Christian Decker, Christoph Grimm, Georg Pelz
2010Software-based self-repair of statically scheduled superscalar data paths.
Mario Schölzel
2010Synthesis of asynchronous monitors for critical electronic systems.
Alexandre Porcher, Katell Morin-Allory, Laurent Fesquet
2010Synthesizing multiplier in reversible logic.
Sebastian Offermann, Robert Wille, Gerhard W. Dueck, Rolf Drechsler
2010Synthesizing simulators for model checking microcontroller binary code.
Dominique Gückel, Bastian Schlich, Jörg Brauer, Stefan Kowalewski
2010SystemC-AMS SDF model synthesis for exploration of heterogeneous architectures.
Andreas Popp, Andreas Herrholz, Kim Grüttner, Yannick Le Moullec, Peter Koch, Wolfgang Nebel
2010Test pattern generation for the combinational representation of asynchronous circuits.
Roland Dobai, Elena Gramatová
2010Testing analog electronic circuits using N-terminal network.
Piotr Kyziol, Jerzy Rutkowski, Damian Grzechca
2010The novel approach to wideband RFIC receivers in standard CMOS process.
Libor Majer, Viera Stopjaková
2010Theorem proving techniques for the formal verification of NoC communications with non-minimal adaptive routing.
Amr Helmy, Laurence Pierre, Axel Jantsch
2010Tree-model based mapping for energy-efficient and low-latency Network-on-Chip.
Bo Yang, Thomas Canhao Xu, Tero Säntti, Juha Plosila
2010Ultra low-voltage bidirectional current mirror using clocked semi-floating-gate transistors.
Yngvar Berg
2010Using a CISC microcontroller to test embedded memories.
Ad J. van de Goor, Said Hamdioui, Georgi Gaydadjiev
2010Utilizing the Bulk-driven technique in analog circuit design.
Fabian Khateb, Dalibor Biolek, Nabhan Khatib, Jiri Vavra
2010Versatile sub-bandgap reference IP core.
Tomás Urban, Ondrej Subrt, Pravoslav Martínek
2010Window optimization of reversible and quantum circuits.
Mathias Soeken, Robert Wille, Gerhard W. Dueck, Rolf Drechsler
2010Wrapper design for a CDMA bus in SOC.
Tatjana R. Nikolic, Mile K. Stojcev, Zoran Stamenkovic