DDECS C

74 papers

YearTitle / Authors
2008A Cost Effective BIST Second-Order Sigma-Delta-Modulator.
Hao-Chiao Hong, Sheng-Chuan Liang, Hong-Chin Song
2008A Dual-Threaded Architecture for Interval Arithmetic Coprocessor with Shared Floating Point Units.
Virgil E. Petcu, Alexandru Amaricai, Mircea Vladutiu
2008A Low Leakage Non-Volatile Memory Voltage Pulse Generator for RFID Applications.
Marco Bucci, Raimondo Luzzi, Santos Torres Vargas
2008A New Design Technique for Weakly Indicating Function Blocks.
P. Balasubramanian, David A. Edwards
2008A Partial Scan Based Test Generation for Asynchronous Circuits.
Dilip P. Vasudevan, Aristides Efthymiou
2008A Resistorless Voltage Reference Source for 90 nm CMOS Technology with Low Sensitivity to Process and Temperature Variations.
Tomasz Borejko, Witold A. Pleskacz
2008A Spread-Spectrum Clock Generator Using Fractional PLL Controlled Delta-Sigma Modulator for Serial-ATA III.
Kuo-Hsing Cheng, Cheng-Liang Hung, Chih-Hsien Chang, Yu-Lung Lo, Wei-Bin Yang, Jiunn-Way Miaw
2008A System-On-Chip for Wireless Body Area Sensor Network Node.
Zoran Stamenkovic, Goran Panic, Günter Schoof
2008A Trapezoidal Approach to Corner Stitching Data Structures for Arbitrary Routing Angles.
Thomas Jambor, Daniel Zaum, Markus Olbrich, Erich Barke
2008A novel method for test and calibration of capacitive accelerometers with a fully electrical setup.
Norbert Dumas, Florence Azaïs, Frédérick Mailly, Andrew Richardson, Pascal Nouet
2008Ad-Hoc Translations to Close Verilog Semantics Gap.
Christian Haufe, Frank Rogin
2008An Integrated Input Encoding and Symbolic Functional Decomposition for LUT-Based FPGAs.
Stanislaw Deniziak, Mariusz Wisniewski
2008Analysis of Applicability of Partial Runtime Reconfiguration in Fault Emulator in Xilinx FPGAs.
Leos Kafka
2008Analysis of the influence of intermittent faults in a microcontroller.
Joaquin Gracia, Luis J. Saiz, Juan Carlos Baraza, Daniel Gil, Pedro J. Gil
2008Boolean Formalisation of the PMC Model for Faulty Units Diagnosis in Regular Multi-Processor Systems.
Miroslav Manik, Elena Gramatová
2008Built-In Current Monitor for IDDQ Testing in CMOS 90 nm Technology.
Marcin J. Beresinski, Tomasz Borejko, Witold A. Pleskacz, Viera Stopjaková
2008Calculating the fault coverage for dual neighboring faults using single stuck-at fault patterns.
Jan Schat
2008Calculation of LFSR Seed and Polynomial Pair for BIST Applications.
Artur Jutman, Anton Tsertov, Raimund Ubar
2008Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip.
Zhonghai Lu, Lei Xia, Axel Jantsch
2008Code Coverage Analysis using High-Level Decision Diagrams.
Jaan Raik, Uljana Reinsalu, Raimund Ubar, Maksim Jenihhin, Peeter Ellervee
2008Computation of a nonlinear squashing function in digital neural networks.
Vladimir Havel, Karel K. Vlcek
2008Concurrent Error Detection for Combinational Logic Blocks Implemented with Embedded Memory Blocks of FPGAs.
Andrzej Krasniewski
2008Continuous-Time Common-Mode Feedback Circuit for Applications with Large Output Swing and High Output Impedance.
Weixun Yan, Horst Zimmermann
2008Controllable Local Clock Signal Generator for Deep Submicron GALS Architectures.
Artur L. Sobczyk, Arkadiusz W. Luczyk, Witold A. Pleskacz
2008Cryptographic System on a Chip based on Actel ARM7 Soft-Core with Embedded True Random Number Generator.
Milos Drutarovský, Michal Varchola
2008Deep-Submicron MOS Transistor Matching: A Case Study.
Dimitar P. Dimitrov
2008Design and Simulation of Runtime Reconfigurable Systems.
Thilo Pionteck, Carsten Albrecht, Roman Koch, Torben Brix, Erik Maehle
2008Design of Erasure Codes for Digital Multimedia Transmitting.
Konstantin V. Shinkarenko, Karel K. Vlcek
2008Design of Time-to-Digital Converter Output Interface.
Marek Miskowicz
2008Diagnosis of Realistic Defects Based on the X-Fault Model.
Ilia Polian, Kohei Miyase, Yusuke Nakamura, Seiji Kajihara, Piet Engelke, Bernd Becker, Stefan Spinner, Xiaoqing Wen
2008Efficient Allocation of Verification Resources using Revision History Information.
José Augusto Miranda Nacif, Thiago S. F. Silva, Andréa Iabrudi Tavares, Antônio Otávio Fernandes, Claudionor José Nunes Coelho Jr.
2008Efficient Estimation of Die-Level Process Parameter Variations via the EM-Algorithm.
Amir Zjajo, Shaji Krishnan, José Pineda de Gyvez
2008Evaluation of the Iddq Signature in devices with Gauss-distributed background current.
Jan Schat
2008Excitation optimization in fault diagnosis of analog electronic circuits.
Lukas Chruszczyk, Jerzy Rutkowski
2008Experimental Analog Circuit for Parametric Test Methods Efficiency Evaluation.
Juraj Brenkus, Viera Stopjaková, Jozef Mihálov
2008Fast Boolean Minimizer for Completely Specified Functions.
Petr Fiser, Pemysl Rucký, Irena Vanová
2008Gain reduction by gate-leakage currents in regulated cascodes.
Franz Schlögl, Kerstin Schneider-Hornstein, Horst Zimmermann
2008IP-based Systematic Design of Power-and Matching-limited Circuits.
David Smola, Ludk Pantucek
2008Implementation of Dynamically Reconfigurable Test Architecture for FPGA Circuits.
Martin Rozkovec
2008Improving Circuit Security against Power Analysis Attacks with Subthreshold Operation.
Håvard Pedersen Alstad, Snorre Aunet
2008Improving Fault Tolerance by Using Reconfigurable Asynchronous Circuits.
Werner Friesenbichler, Thomas Panhofer, Martin Delvai
2008Incremental SAT Instance Generation for SAT-based ATPG.
Daniel Tille, Rolf Drechsler
2008Interconnect Faults Identification and Localization Using Modified Ring LFSRs.
Andrzej Hlawiczka, Krzysztof Gucwa, Tomasz Garbolino, Michal Kopec
2008Low-Voltage Low-Power Highly Linear Down-Sampling Mixer in 65nm Digital CMOS Technology.
Kurt Schweiger, Horst Zimmermann
2008MPEG-based Performance Comparison between Network-on-Chip and AMBA MPSoC.
Rishad A. Shafik, Paul M. Rosinger, Bashir M. Al-Hashimi
2008Mapping of 40 MHz MIMO SDM-OFDM Baseband Processing on Multi-Processor SDR Platform.
Martin Palkovic, Hans Cappelle, Miguel Glassee, Bruno Bougard, Liesbet Van der Perre
2008Mixed-Signal DFT for fully testable ASIC.
Frantisek Reznicek
2008Modeling and observing the jitter in ring oscillators implemented in FPGAs.
Boyan Valtchanov, Alain Aubert, Florent Bernard, Viktor Fischer
2008NetCOPE: Platform for Rapid Development of Network Applications.
Tomás Martínek, Martin Kosek
2008Network Probe for Flexible Flow Monitoring.
Martin Zádník, Jan Korenek, Petr Kobierský, Ondrej Lengál
2008Novel Hardware Implementation of Adaptive Median Filters.
Zdenek Vasícek, Lukás Sekanina
2008On Minimizing RTOS Aperiodic Tasks Server Energy Consumption.
Karel Dudácek
2008On-chip Integration of Magnetic Force Sensing Current Monitors.
Martin Donoval, Martin Daricek, Viera Stopjaková, Juraj Marek
2008Optimal Backgrounds Selection for Multi Run Memory Testing.
Ireneusz Mrozek, Vyacheslav N. Yarmolik
2008Portable Measurement Equipment for Continuous Biomedical Monitoring using Microelectrodes.
Libor Majer, Viera Stopjaková
2008Probabilistic Model Checking and Reliability of Results.
Ralf Wimmer, Alexander Kortus, Marc Herbstritt, Bernd Becker
2008Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), Bratislava, Slovakia, April 16-18, 2008
Bernd Straube, Milos Drutarovský, Michel Renovell, Peter Gramata, Mária Fischerová
2008Process Tolerant Design Using Thermal and Power-Supply Tolerance in Pipeline Based Circuits.
Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira
2008Rapid Prototyping of NoC Architectures from a SystemC Specification.
Stanislaw Deniziak, Robert Tomaszewski
2008Reduction of Test Vectors Volume by Means of Gate-Level Reconfiguration.
Lukás Starecek, Lukás Sekanina, Zdenek Kotásek
2008SoC Symbolic Simulation: a case study on delay fault testing.
Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Paolo Bernardi
2008SoCECT: System on Chip Embedded Core Test.
Michael Higgins, Ciaran MacNamee, Brendan Mullane
2008Software-Based Self-Test Strategy for Data Cache Memories Embedded in SoCs.
Wilson J. Pérez H., Jaime Velasco-Medina, Danilo Ravotto, Edgar E. Sánchez, Matteo Sonza Reorda
2008Temperature-Aware Task Mapping for Energy Optimization with Dynamic Voltage Scaling.
Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
2008Testing an Emergency Luminaire Circuit Using a Fault Dictionary Approach.
Dimitrios K. Konstantinou, Michael G. Dimopoulos, Dimitris K. Papakostas, Alkis A. Hatzopoulos, Alexios Spyronasios
2008The Guiding Light for Chip Testing.
Sandip Kundu
2008The HDL and FE Thermal Modeling of Heterogeneous Systems.
Grzegorz Janczyk, Tomasz Bieniek
2008The Influence of Global Parametric Faults on Analogue Electronic Circuits Time Domain Response Features.
Piotr Jantos, Damian Grzechca, Tomasz Golonek, Jerzy Rutkowski
2008The Quest for Test: Will Redundancy Cover All?
Hans A. R. Manhaeve
2008The Wall Ahead is Made of Rubber.
Krisztián Flautner
2008Three Subthreshold Flip-Flop Cells Characterized in 90 nm and 65 nm CMOS Technology.
Håvard Pedersen Alstad, Snorre Aunet
2008Various MDCT implementations in 0.35µm CMOS.
Peter Malík, Marcel Baláz, Martin Simlastík, Arkadiusz W. Luczyk, Witold A. Pleskacz
2008Virtual Testing Environment for A/D Converters in Verilog-A and Maple Platform.
Ondrej Subrt, Petr Struhovský, Pravoslav Martínek, Jirí Hospodka
2008Web-Based Framework for Parallel Distributed Test.
Eero Ivask, Jaan Raik, Raimund Ubar