DATE A

322 papers

YearTitle / Authors
20112D and 3D integration with organic and silicon electronics.
Clinton K. Landrock, Badr Omrane, Yindar Chuo, Bozena Kaminska, Jeydmer Aristizabal
20113D Embedded multi-core: Some perspectives.
Fabien Clermidy, Florian Darve, Denis Dutoit, Walid Lafi, Pascal Vivet
20113D-ICML: A 3D bipolar ReRAM design with interleaved complementary memory layers.
Yi-Chung Chen, Hai Li, Yiran Chen, Robinson E. Pino
2011A 0.964mW digital hearing aid system.
Peng Qiao, Henk Corporaal, Menno Lindwer
2011A 3D reconfigurable platform for 4G telecom applications.
Walid Lafi, Didier Lattard, Ahmed Amine Jerraya
2011A UML 2-based hardware-software co-design framework for body sensor network applications.
Zhenxin Sun, Chi-Tsai Yeh, Weng-Fai Wong
2011A block-diagonal structured model reduction scheme for power grid networks.
Zheng Zhang, Xiang Hu, Chung-Kuan Cheng, Ngai Wong
2011A circuit technology platform for medical data acquisition and communication: Outline of a collaboration project within the Swiss Nano-Tera.ch Initiative.
Qiuting Huang, Catherine Dehollain, Christian C. Enz, Thomas Burger
2011A clock-gating based capture power droop reduction methodology for at-speed scan testing.
Bo Yang, Amit Sanghani, Shantanu Sarangi, Chunsheng Liu
2011A confidence-driven model for error-resilient computing.
Chia-Hsiang Chen, Yejoong Kim, Zhengya Zhang, David T. Blaauw, Dennis Sylvester, Helia Naeimi, Sumeet Sandhu
2011A cost-effective substantial-impact-filter based method to tolerate voltage emergencies.
Songjun Pan, Yu Hu, Xing Hu, Xiaowei Li
2011A delay-insensitive bus-invert code and hardware support for robust asynchronous global communication.
Melinda Y. Agyekum, Steven M. Nowick
2011A distributed and self-calibrating model-predictive controller for energy and thermal management of high-performance multicores.
Andrea Bartolini, Matteo Cacciari, Andrea Tilli, Luca Benini
2011A fault-tolerant deadlock-free adaptive routing for on chip interconnects.
Fabien Chaix, Dimiter Avresky, Nacer-Eddine Zergainoh, Michael Nicolaidis
2011A flexible high throughput multi-ASIP architecture for LDPC and turbo decoding.
Purushotham Murugappa, Rachid Al-Khayat, Amer Baghdadi, Michel Jézéquel
2011A fully-synthesizable single-cycle interconnection network for Shared-L1 processor clusters.
Abbas Rahimi, Igor Loi, Mohammad Reza Kakoee, Luca Benini
2011A global postsynthesis optimization method for combinational circuits.
Zdenek Vasícek, Lukás Sekanina
2011A high-level analytical model for application specific CMP design exploration.
Andrew Cassidy, Kai Yu, Haolang Zhou, Andreas G. Andreou
2011A high-performance parallel implementation of the Chambolle algorithm.
Abdulkadir Akin, Ivan Beretta, A. A. Nacci, Vincenzo Rana, Marco D. Santambrogio, David Atienza
2011A low complexity stopping criterion for reducing power consumption in turbo decoders.
Pallavi Reddy, Fabien Clermidy, Amer Baghdadi, Michel Jézéquel
2011A low-power VLIW processor for 3GPP-LTE complex numbers processing.
Christian Bernard, Fabien Clermidy
2011A method for fast jitter tolerance analysis of high-speed PLLs.
Stefan Erb, Wolfgang Pribyl
2011A multi-objective decision-theoretic exploration algorithm for platform-based design.
Giovanni Beltrame, Gabriela Nicolescu
2011A new architecture for power network in 3D IC.
Hsien-Te Chen, Hong-Long Lin, Zicheng Wang, TingTing Hwang
2011A new circuit simplification method for error tolerant applications.
Doochul Shin, Sandeep K. Gupta
2011A new distributed event-driven gate-level HDL simulation by accurate prediction.
Dusung Kim, Maciej J. Ciesielski, Seiyang Yang
2011A new method for automated generation of compensation networks - The EDA Designer Finger.
Ralf Sommer, Dominik Krausse, Eckhard Hennig, Eric Schaefer, C. Sporrer
2011A new reconfigurable clock-gating technique for low power SRAM-based FPGAs.
Luca Sterpone, Luigi Carro, Debora Matos, Stephan Wong, F. Fakhar
2011A new reversible design of BCD adder.
Himanshu Thapliyal, N. Ranganathan
2011A novel TSV topology for many-tier 3D power-delivery networks.
Michael B. Healy, Sung Kyu Lim
2011A novel tag access scheme for low power L2 cache.
Hyunsun Park, Sungjoo Yoo, Sunggu Lee
2011A parallel Hamiltonian eigensolver for passivity characterization and enforcement of large interconnect macromodels.
Luca Gobbato, Alessandro Chinea, Stefano Grivet-Talocia
2011A quantitative analysis of performance benefits of 3D die stacking on mobile and embedded SoC.
Dongki Kim, Sungjoo Yoo, Sunggu Lee, Jung Ho Ahn, Hyunuk Jung
2011A real-time compressed sensing-based personal electrocardiogram monitoring system.
Karim Kanoun, Hossein Mamaghanian, Nadia Khaled, David Atienza
2011A reconfigurable, pipelined, conflict directed jumping search SAT solver.
Mona Safar, M. Watheq El-Kharashi, Mohamed Shalan, Ashraf Salem
2011A reconfiguration approach for fault-tolerant FlexRay networks.
Kay Klobedanz, Andreas König, Wolfgang Müller
2011A rule-based static dataflow clustering algorithm for efficient embedded software synthesis.
Joachim Falk, Christian Zebelein, Christian Haubelt, Jürgen Teich
2011A scaled random walk solver for fast power grid analysis.
Baktash Boghrati, Sachin S. Sapatnekar
2011A sensor fusion algorithm for an integrated angular position estimation with inertial measurement units.
Simone Sabatelli, Francesco Sechi, Luca Fanucci, Alessandro Rocchi
2011A shared-variable-based synchronization approach to efficient cache coherence simulation for multi-core systems.
Cheng-Yang Fu, Meng-Huan Wu, Ren-Song Tsay
2011A specialized low-cost vectorized loop buffer for embedded processors.
Libo Huang, Zhiying Wang, Li Shen, Hongyi Lu, Nong Xiao, Cong Liu
2011A symbolic technique for automated characterization of the uniqueness and similarity of analog circuit design features.
Cristian Ferent, Alex Doboli
2011A true power detector for RF PA built-in calibration and testing.
Pedro Fonseca da Mota, José Machado da Silva
2011A unified methodology for pre-silicon verification and post-silicon validation.
Allon Adir, Shady Copty, Shimon Landa, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann
2011A workflow for runtime adaptive task allocation on heterogeneous MPSoCs.
Jia Huang, Andreas Raabe, Christian Buckl, Alois C. Knoll
2011Abstract state machines as an intermediate representation for high-level synthesis.
Rohit Sinha, Hiren D. Patel
2011Accelerated simulation of tunable vibration energy harvesting systems using a linearised state-space technique.
Leran Wang, Tom J. Kazmierski, Bashir M. Al-Hashimi, Alex S. Weddell, Geoff V. Merrett, Ivo Netali Ayala-Garcia
2011Achieving composability in NoC-based MPSoCs through QoS management at software level.
Everton Carara, Gabriel Marchesan Almeida, Gilles Sassatelli, Fernando Gehm Moraes
2011Adaptive test optimization through real time learning of test effectiveness.
Baris Arslan, Alex Orailoglu
2011Adaptive voltage over-scaling for resilient applications.
Philipp Klaus Krause, Ilia Polian
2011Aging-aware timing analysis and optimization considering path sensitization.
Kai-Chiang Wu, Diana Marculescu
2011An FPGA bridge preserving traffic quality of service for on-chip network-based systems.
Ashkan Beyranvand Nejad, Matias Escudero Martinez, Kees Goossens
2011An LOCV-based static timing analysis considering spatial correlations of power supply variations.
Susumu Kobayashi, Kenichi Horiuchi
2011An algorithm to improve accuracy of criticality in statistical static timing analysis.
Shuji Tsukiyama, Masahiro Fukui
2011An all-digital built-in self-test technique for transfer function characterization of RF PLLs.
Ping-Ying Wang, Hsiu-Ming Chang, Kwang-Ting Cheng
2011An analytical compact model for estimation of stress in multiple Through-Silicon Via configurations.
Geert Eneman, J. Cho, V. Moroz, Dragomir Milojevic, M. Choi, Kristin De Meyer, Abdelkarim Mercha, Eric Beyne, Thomas Hoffmann, Geert Van der Plas
2011An antenna-filter codesign for cardiac implants.
Emeric de Foucauld, Jean-Baptiste David, Christophe Delaveaud, Pascal Ciais
2011An approach for dynamic selection of synthesis transformations based on Markov Decision Processes.
Tobias Welp, Andreas Kuehlmann
2011An approach to improve accuracy of source-level TLMs of embedded software.
Zhonglei Wang, Kun Lu, Andreas Herkersdorf
2011An area-efficient multi-level single-track pipeline template.
Pankaj Golani, Peter A. Beerel
2011An automated data structure migration concept - From CAN to Ethernet/IP in automotive embedded systems (CANoverIP).
Andreas Kern, Thilo Streichert, Jürgen Teich
2011An effective multi-source energy harvester for low power applications.
Davide Carli, Davide Brunelli, Luca Benini, Massimiliano Ruggeri
2011An efficient Quantum-Dot Cellular Automata adder.
Francesco Bruschi, Francesco Perini, Vincenzo Rana, Donatella Sciuto
2011An efficient algorithm for multi-domain clock skew scheduling.
Yanling Zhi, Wai-Shing Luk, Hai Zhou, Changhao Yan, Hengliang Zhu, Xuan Zeng
2011An efficient and scalable STA tool with direct path estimation and exhaustive sensitization vector exploration for optimal delay computation.
Salvador Barceló, Xavier Gili, Sebastià A. Bota, Jaume Segura
2011An efficient mask optimization method based on homotopy continuation technique.
Frank Liu, Xiaokang Shi
2011An efficient on-line task allocation algorithm for QoS and energy efficiency in multicore multimedia platforms.
Francesco Paterna, Andrea Acquaviva, Alberto Caprara, Francesco Papariello, Giuseppe Desoli, Luca Benini
2011An electrical test method for MEMS convective accelerometers: Development and evaluation.
Ahmed Amine Rekik, Florence Azaïs, Norbert Dumas, Frédérick Mailly, Pascal Nouet
2011An endurance-enhanced Flash Translation Layer via reuse for NAND flash memory storage systems.
Yi Wang, Duo Liu, Zhiwei Qin, Zili Shao
2011An energy-efficient 3D CMP design with fine-grained voltage scaling.
Jishen Zhao, Xiangyu Dong, Yuan Xie
2011An energy-efficient 64-QAM MIMO detector for emerging wireless standards.
Nariman Moezzi Madani, Thorlindur Thorolfsson, Joseph Crop, Patrick Chiang, W. Rhett Davis
2011An extension to SystemC-A to support mixed-technology systems with distributed components.
Chenxu Zhao, Tom J. Kazmierski
2011An integrated platform for advanced diagnostics.
Giovanni De Micheli, Sara S. Ghoreishizadeh, Cristina Boero, Francesco Valgimigli, Sandro Carrara
2011Analog circuit reliability in sub-32 nanometer CMOS: Analysis and mitigation.
Georges G. E. Gielen, Elie Maricau, Pieter De Wit
2011Analytical heat transfer model for thermal through-silicon vias.
Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2011Analytical model for SRAM dynamic write-ability degradation due to gate oxide breakdown.
Vikas Chandra, Robert C. Aitken
2011Architectural exploration of 3D FPGAs towards a better balance between area and delay.
Chia-I Chen, Bau-Cheng Lee, Juinn-Dar Huang
2011Architecture and FPGA-implementation of a high throughput K
Nils Heidmann, Till Wiegand, Steffen Paul
2011Architectures and modeling of predictable memory controllers for improved system integration.
Benny Akesson, Kees Goossens
2011Architectures for online error detection and recovery in multicore processors.
Dimitris Gizopoulos, Mihalis Psarakis, Sarita V. Adve, Pradeep Ramachandran, Siva Kumar Sastry Hari, Daniel J. Sorin, Albert Meixner, Arijit Biswas, Xavier Vera
2011Arithmetic logic units with high error detection rates to counteract fault attacks.
Marcel Medwed, Stefan Mangard
2011As-Robust-As-Possible test generation in the presence of small delay defects using pseudo-Boolean optimization.
Stephan Eggersglüß, Rolf Drechsler
2011Automated constraint-driven topology synthesis for analog circuits.
Oliver Mitea, Markus Meissner, Lars Hedrich, P. Jores
2011Automated construction of fast and accurate system-level models for wireless sensor networks.
Lan S. Bai, Robert P. Dick, Pai H. Chou, Peter A. Dinda
2011Automated debugging of SystemVerilog assertions.
Brian Keng, Sean Safarpour, Andreas G. Veneris
2011Battery-supercapacitor hybrid system for high-rate pulsed load applications.
Donghwa Shin, Younghyun Kim, Jaeam Seo, Naehyuck Chang, Yanzhi Wang, Massoud Pedram
2011Beyond UPF & CPF: Low-power design and verification.
Barry M. Pangrle, John Biggs, Cristophe Clavel, Olivier Domerego, Knut M. Just
2011Biologically-inspired massively-parallel architectures - Computing beyond a million processors.
Stephen B. Furber
2011Black-box leakage power modeling for cell library and SRAM compiler.
Chun-Kai Tseng, Shi-Yu Huang, Chia-Chien Weng, Shan-Chien Fang, Ji-Jan Chen
2011Buffering implications for the design space of streaming MEMS storage.
Mohammed G. Khatib, Leon Abelmann
2011Building real-time HDTV applications in FPGAs using processors, AXI interfaces and high level synthesis tools.
Kees A. Vissers, Stephen Neuendorffer, Juanjo Noguera
2011Built-in generation of functional broadside tests.
Irith Pomeranz
2011CARAT: Context-aware runtime adaptive task migration for multi core architectures.
Janmartin Jahn, Mohammad Abdullah Al Faruque, Jörg Henkel
2011Case study: Alleviating hotspots and improving chip reliability via carbon nanotube thermal interface.
Wei Zhang, Jiale Huang, Shengqi Yang, Pallav Gupta
2011Challenges in designing high speed memory subsystem for mobile applications.
Tsunwai Gary Yip, Philip Yeung, Ming Li, Deborah Dressler
2011Characterization of an Intelligent Power Switch for LED driving with control of wiring parasitics effects.
Giuseppe Pasetti, Nico Costantino, Francesco Tinfena, Riccardo Serventi, Paolo D'Abramo, Sergio Saponara, Luca Fanucci
2011Circuit and DFT techniques for robust and low cost qualification of a mixed-signal SoC with integrated power management system.
Lakshmanan Balasubramanian, Puneet Sabbarwal, Rajesh Kumar Mittal, Prakash Narayanan, Ranjit Kumar Dash, Anand Devendra Kudari, Srikanth Manian, Sudhir Polarouthu, Harikrishna Parthasarathy, Ravi C. Vijayaraghavan, Sachin Turkewadikar
2011Clause simplification through dominator analysis.
HyoJung Han, HoonSang Jin, Fabio Somenzi
2011Clock gating optimization with delay-matching.
Shih-Jung Hsu, Rung-Bin Lin
2011Compiling SyncCharts to Synchronous C.
Claus Traulsen, T. Amende, Reinhard von Hanxleden
2011Component-based design for the future.
Edward A. Lee, Alberto L. Sangiovanni-Vincentelli
2011Composing heterogeneous components for system-wide performance analysis.
Simon Perathoner, Kai Lampka, Lothar Thiele
2011Controlled timing-error acceptance for low energy IDCT design.
Ku He, Andreas Gerstlauer, Michael Orshansky
2011Coordinate strip-mining and kernel fusion to lower power consumption on GPU.
Guibin Wang
2011Correlating inline data with final test outcomes in analog/RF devices.
Nathan Kupp, Mustapha Slamani, Yiorgos Makris
2011Correlating models and silicon for improved parametric yield.
Rob Aitken, Greg Yeric, David Flynn
2011Cost-efficient fault-tolerant decoder for hybrid nanoelectronic memories.
Nor Zaidi Haron, Said Hamdioui
2011Counterexample-guided SMT-driven optimal buffer sizing.
Bryan A. Brady, Daniel E. Holcomb, Sanjit A. Seshia
2011Cross-layer optimized placement and routing for FPGA soft error mitigation.
Keheng Huang, Yu Hu, Xiaowei Li
2011Cycle-count-accurate processor modeling for fast and accurate system-level simulation.
Chen Kang Lo, Li-Chun Chen, Meng-Huan Wu, Ren-Song Tsay
2011DOM: A Data-dependency-Oriented Modeling approach for efficient simulation of OS preemptive scheduling.
Peng-Chih Wang, Meng-Huan Wu, Ren-Song Tsay
2011Data-oriented performance analysis of SHA-3 candidates on FPGA accelerated computers.
Zhimin Chen, Xu Guo, Ambuj Sinha, Patrick Schaumont
2011Decision ordering based property decomposition for functional test generation.
Mingsong Chen, Prabhat Mishra
2011Demand code paging for NAND flash in MMU-less embedded systems.
José Baiocchi, Bruce R. Childers
2011Depth-directed hardware object detection.
Christos Kyrkou, Christos Ttofis, Theocharis Theocharides
2011Design automation for IEEE P1687.
Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson, Erik Larsson
2011Design implications of memristor-based RRAM cross-point structures.
Cong Xu, Xiangyu Dong, Norman P. Jouppi, Yuan Xie
2011Design of voltage-scalable meta-functions for approximate computing.
Debabrata Mohapatra, Vinay K. Chippa, Anand Raghunathan, Kaushik Roy
2011Design space exploration for 3D-stacked DRAMs.
Christian Weis, Norbert Wehn, Igor Loi, Luca Benini
2011Design, Automation and Test in Europe, DATE 2011, Grenoble, France, March 14-18, 2011
2011Design-for-test methodology for non-scan at-speed testing.
Mainak Banga, Nikhil P. Rahagude, Michael S. Hsiao
2011Determining the minimal number of lines for large reversible circuits.
Robert Wille, Oliver Keszöcze, Rolf Drechsler
2011Developing an integrated verification and debug methodology.
Akitoshi Matsuda, Tohru Ishihara
2011Diagnosing scan chain timing faults through statistical feature analysis of scan images.
Mingjing Chen, Alex Orailoglu
2011Distributed hardware matcher framework for SoC survivability.
Ilya Wagner, Shih-Lien Lu
2011DynOAA - Dynamic offset adaptation algorithm for improving response times of CAN systems.
Tobias Ziermann, Jürgen Teich, Zoran Salcic
2011Dynamic applications on reconfigurable systems: From UML model design to FPGAs implementation.
Jorgiano Vidal, Florent de Lamotte, Guy Gogniat, Jean-Philippe Diguet, Sébastien Guillet
2011Dynamic thermal management in 3D multi-core architecture through run-time adaptation.
Fazal Hameed, Mohammad Abdullah Al Faruque, Jörg Henkel
2011Dynamic write limited minimum operating voltage for nanoscale SRAMs.
Satyanand Nalam, Vikas Chandra, Robert C. Aitken, Benton H. Calhoun
2011E-RoC: Embedded RAIDs-on-Chip for low power distributed dynamically managed reliable memories.
Luis Angel D. Bathen, Nikil D. Dutt
2011Early chip planning cockpit.
Jeonghee Shin, John A. Darringer, Guojie Luo, Alan J. Weger, Charles L. Johnson
2011Efficient RC power grid verification using node elimination.
Ankit Goyal, Farid N. Najm
2011Efficient parameter variation sampling for architecture simulations.
Feng Lu, Russ Joseph, Goce Trajcevski, Song Liu
2011Efficient validation input generation in RTL by hybridized source code analysis.
Lingyi Liu, Shobha Vasudevan
2011Eliminating data invalidation in debugging multiple-clock chips.
Jianliang Gao, Yinhe Han, Xiaowei Li
2011Eliminating speed penalty in ECC protected memories.
Michael Nicolaidis, Thierry Bonnoit, Nacer-Eddine Zergainoh
2011Embedded software debug and test: Needs and requirements for innovations in debugging.
Markus Winterholer
2011Embedded tutorial: Addressing critical power management verification issues in low power designs.
Bhanu Kapoor, Knut M. Just
2011Empirical design bugs prediction for verification.
Qi Guo, Tianshi Chen, Haihua Shen, Yunji Chen, Yue Wu, Weiwu Hu
2011Enabling improved power management in multicore processors through clustered DVFS.
T. Kolpe, Antonia Zhai, Sachin S. Sapatnekar
2011Energy analysis methods and tools for modelling and Optimizing monitoring tyre systems.
Alberto Bonanno, Alberto Bocca, Marco Sabatini
2011Energy parsimonious circuit design through probabilistic pruning.
Lingamneni Avinash, Christian C. Enz, Jean-Luc Nagel, Krishna V. Palem, Christian Piguet
2011Energy-efficient scheduling of real-time tasks on cluster-based multicores.
Fanxin Kong, Wang Yi, Qingxu Deng
2011Energy-modulated computing.
Alex Yakovlev
2011Enhancement of simple electro-magnetic attacks by pre-characterization in frequency domain and demodulation techniques.
Olivier Meynard, Denis Réal, Florent Flament, Sylvain Guilley, Naofumi Homma, Jean-Luc Danger
2011Ensuring correctness of analog circuits in presence of noise and process variations using pattern matching.
Rajeev Narayanan, Mohamed H. Zaki, Sofiène Tahar
2011Entering the path towards terabit/s wireless links.
Gerhard P. Fettweis, Falko Guderian, Stefan Krone
2011Error correcting code analysis for cache memory high reliability and performance.
Daniele Rossi, N. Timoncini, M. Spica, Cecilia Metra
2011Error prediction based on concurrent self-test and reduced slack time.
Valentin Gherman, J. Massas, Samuel Evain, Stéphane Chevobbe, Yannick Bonhomme
2011Evaluating energy consumption of homogeneous MPSoCs using spare tiles.
Alexandre M. Amory, Luciano Ost, César A. M. Marcon, Fernando Gehm Moraes, Marcelo Lubaszewski
2011Evaluating the potential of graphics processors for high performance embedded computing.
Shuai Mu, Chenxi Wang, Ming Liu, Dongdong Li, Maohua Zhu, Xiaoliang Chen, Xiang Xie, Yangdong Deng
2011Exploiting Network-on-Chip structural redundancy for a cooperative and scalable built-in self-test architecture.
Alessandro Strano, Crispín Gómez Requena, Daniele Ludovici, Michele Favalli, María Engracia Gómez, Davide Bertozzi
2011FARM: Fault-aware resource management in NoC-based multiprocessor platforms.
Chen-Ling Chou, Radu Marculescu
2011Fast Start-up for Spartan-6 FPGAs using Dynamic Partial Reconfiguration.
Joachim Meyer, Juanjo Noguera, Michael Hübner, Lars Braun, Oliver Sander, R. M. Gil, Rodney Stewart, Jürgen Becker
2011Fast and accurate resource conflict simulation for performance analysis of multi-core systems.
Stefan Stattelmann, Oliver Bringmann, Wolfgang Rosenstiel
2011Fast and accurate transaction-level model of a wormhole network-on-chip with priority preemptive virtual channel arbitration.
Leandro Soares Indrusiak, Osmar Marchi dos Santos
2011Fast statistical analysis of RC nets subject to manufacturing variabilities.
Yu Bi, Kees-Jan van der Kolk, Jorge Fernandez Villena, Luís Miguel Silveira, Nick van der Meijs
2011Fault grading of software-based self-test procedures for dependable automotive applications.
Paolo Bernardi, Michelangelo Grosso, Ernesto Sánchez, Oscar Ballan
2011Feedback based droop mitigation.
Salvatore Pontarelli, Marco Ottavi, Adelio Salsano, Kamran Zarrineh
2011Fine-grain OpenMP runtime support with explicit communication hardware primitives.
Pranav Tendulkar, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Dimitrios S. Nikolopoulos, Manolis Katevenis
2011Flex memory: Exploiting and managing abundant off-chip optical bandwidth.
Ying Wang, Lei Zhang, Yinhe Han, Huawei Li, Xiaowei Li
2011FlexRay switch scheduling - A networking concept for electric vehicles.
Martin Lukasiewycz, Samarjit Chakraborty, Paul Milbredt
2011Floorplanning exploration and performance evaluation of a new Network-on-Chip.
Licheng Xue, Weixing Ji, Qi Zuo, Yang Zhang
2011Flow-based partitioning and position constraints in VLSI placement.
Markus Struzyna
2011Formal reset recovery slack calculation at the register transfer level.
Chih-Neng Chung, Chia-Wei Chang, Kai-Hui Chang, Sy-Yen Kuo
2011Formal specification and systematic model-driven testing of embedded automotive systems.
Sebastian Siegl, Kai-Steffen Hielscher, Reinhard German, Christian Berger
2011Frugal but flexible multicore topologies in support of resource variation-driven adaptivity.
Chengmo Yang, Alex Orailoglu
2011Gemma in April: A matrix-like parallel programming architecture on OpenCL.
Tianji Wu, Di Wu, Yu Wang, Xiaorui Zhang, Hong Luo, Ningyi Xu, Huazhong Yang
2011Generator based approach for analog circuit and layout design and optimization.
Achim Graupner, Roland Jancke, Reimund Wittmann
2011Global optimization of integrated transformers for high frequency microwave circuits using a Gaussian process based surrogate model.
Bo Liu, Ying He, Patrick Reynaert, Georges G. E. Gielen
2011Guaranteed service virtual channel allocation in NoCs for run-time task scheduling.
Markus Winter, Gerhard P. Fettweis
2011High-temperature (>500°C) reconfigurable computing using silicon carbide NEMS switches.
Xinmu Wang, Seetharam Narasimhan, Aswin Raghav Krishna, Francis G. Wolff, Srihari Rajgopal, Te-Hao Lee, Mehran Mehregany, Swarup Bhunia
2011Host-compiled multicore RTOS simulator for embedded real-time software development.
Parisa Razaghi, Andreas Gerstlauer
2011Hyper-graph based partitioning to reduce DFT cost for pre-bond 3D-IC testing.
Amit Kumar, Sudhakar M. Reddy, Irith Pomeranz, Bernd Becker
2011HypoEnergy. Hybrid supercapacitor-battery power-supply optimization for Energy efficiency.
Azalia Mirhoseini, Farinaz Koushanfar
2011I
Jonghee W. Yoon, Jongeun Lee, Jaewan Jung, Sanghyun Park, Yongjoo Kim, Yunheung Paek, Doosan Cho
2011Impact of process variation on endurance algorithms for wear-prone memories.
Alexandre Peixoto Ferreira, Santiago Bock, Bruce R. Childers, Rami G. Melhem, Daniel Mossé
2011Improving the efficiency of a hardware transactional memory on an NoC-based MPSoC.
Leonardo Kunz, Gustavo Girão, Flávio Rech Wagner
2011Integrated circuit white space redistribution for temperature optimization.
Yuankai Chen, Hai Zhou, Robert P. Dick
2011Integration of orthogonal QBF solving techniques.
Sven Reimer, Florian Pigorsch, Christoph Scholl, Bernd Becker
2011Interconnect-fault-resilient delay-insensitive asynchronous communication link based on current-flow monitoring.
Naoya Onizawa, Atsushi Matsumoto, Takahiro Hanyu
2011Intermediate representations for controllers in chip generators.
Kyle Kelley, Megan Wachs, Andrew Danowitz, P. Stevenson, Stephen Richardson, Mark Horowitz
2011Interpolation sequences revisited.
Gianpiero Cabodi, Sergio Nocco, Stefano Quer
2011LOEDAR: A low cost error detection and recovery scheme for ECC.
Kun Ma, Kaijie Wu
2011Leakage aware energy minimization for real-time systems under the maximum temperature constraint.
Huang Huang, Gang Quan
2011Logic synthesis and physical design: Quo vadis?
Giovanni De Micheli
2011Loop distribution for K-loops on Reconfigurable Architectures.
Ozana Silvia Dragomir, Koen Bertels
2011Low power interconnects for SIMD computers.
Mark Woh, Sudhir Satpathy, Ronald G. Dreslinski, Danny Kershaw, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge
2011Low-cost fault detection method for ECC using Montgomery powering ladder.
Dusko Karaklajic, Junfeng Fan, Jörn-Marc Schmidt, Ingrid Verbauwhede
2011Low-power smart industrial control.
Attila Bilgic, Vincent Pichot, Michael Gerding, Felix Bruns
2011MARC II: A parametrized speculative multi-ported memory subsystem for reconfigurable computers.
Holger Lange, Thorsten Wink, Andreas Koch
2011MLP aware heterogeneous memory system.
Sujay Phadke, Satish Narayanasamy
2011Mathematical approach based on a "Design of Experiment" to simulate process variations.
Eric Remond, Eric Nercessian, Christophe Bernicot, Rayan Mina
2011Methods and tools for component-based system design.
Joseph Sifakis
2011Minority-Game-based resource allocation for run-time reconfigurable multi-core processors.
Muhammad Shafique, Lars Bauer, Waheed Ahmed, Jörg Henkel
2011Modeling manufacturing process variation for design and test.
Sandip Kundu, Aswin Sreedhar
2011Modelling circuit performance variations due to statistical variability: Monte Carlo static timing analysis.
Michael Merrett, Plamen Asenov, Yangang Wang, Mark Zwolinski, Dave Reid, Campbell Millar, Scott Roy, Zhenyu Liu, Stephen B. Furber, Asen Asenov
2011Moving to Green ICT: From stand-alone power-aware IC design to an integrated approach to energy efficient design for heterogeneous electronic systems.
Salvatore Rinaudo, Giuliana Gangemi, Andrea Calimera, Alberto Macii, Massimo Poncino
2011Multi-granularity thermal evaluation of 3D MPSoC architectures.
Alain Fourmigue, Giovanni Beltrame, Gabriela Nicolescu, El Mostapha Aboulhamid, Ian O'Connor
2011Multi-level attacks: An emerging security concern for cryptographic hardware.
Subidh Ali, Rajat Subhra Chakraborty, Debdeep Mukhopadhyay, Swarup Bhunia
2011Multi-level pipelined parallel hardware architecture for high throughput motion and disparity estimation in Multiview Video Coding.
Bruno Zatt, Muhammad Shafique, Sergio Bampi, Jörg Henkel
2011Multi-objective Tabu Search based topology generation technique for application-specific Network-on-Chip architectures.
Anita Tino, Gul N. Khan
2011Multidimensional parametric test set optimization of wafer probe data for predicting in field failures and setting tighter test limits.
Dragoljub Gagi Drmanac, Nik Sumikawa, LeRoy Winemberg, Li-C. Wang, Magdy S. Abadir
2011NoC-MPU: A secure architecture for flexible co-hosting on shared memory MPSoCs.
Joël Porquet, Alain Greiner, Christian Schwarz
2011Obstacle-aware multiple-source rectilinear Steiner tree with electromigration and IR-drop avoidance.
Jin-Tai Yan, Zhi-Wei Chen
2011On design of test structures for lithographic process corner identification.
Aswin Sreedhar, Sandip Kundu
2011On diagnosis of multiple faults using compacted responses.
Jing Ye, Yu Hu, Xiaowei Li
2011On multiplexed signal tracing for post-silicon debug.
Xiao Liu, Qiang Xu
2011On routing fixed escaped boundary pins for high speed boards.
Tsung-Ying Tsai, Ren-Jie Lee, Ching-Yu Chin, Chung-Yi Kuan, Hung-Ming Chen, Yoji Kajitani
2011On testing prebond dies with incomplete clock networks in a 3D IC using DLLs.
Michael Buttrick, Sandip Kundu
2011On the efficacy of NBTI mitigation techniques.
Tuck-Boon Chan, John Sartori, Puneet Gupta, Rakesh Kumar
2011Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology.
Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin
2011Optimal scheduling of switched FlexRay networks.
Thijs Schenkelaars, Bart Vermeulen, Kees Goossens
2011Optimisation of mutually exclusive arithmetic sum-of-products.
Theo Drane, George A. Constantinides
2011Optimization of stateful hardware acceleration in hybrid architectures.
Xiaotao Chang, Yike Ma, Hubertus Franke, Kun Wang, Rui Hou, Hao Yu, Terry Nelms
2011Optimized model checking of multiple properties.
Gianpiero Cabodi, Sergio Nocco
2011Panel and embedded tutorial - Logic synthesis and place and route: After 20 years of engagement, wedding in view?
Marco Casale-Rossi, Antun Domic
2011Panel: What does the power industry need from the EDA industry and what is the EDA industry doing about it?
P. K. Wright
2011Parallel accelerators for GlimmerHMM bioinformatics algorithm.
Nafsika Chrysanthou, Grigorios Chrysos, Euripides Sotiriades, Ioannis Papaefstathiou
2011Parallelization of while loops in nested loop programs for shared-memory multiprocessor systems.
Stefan J. Geuns, Marco Jan Gerrit Bekooij, Tjerk Bijlsma, Henk Corporaal
2011Partitioned cache architectures for reduced NBTI-induced aging.
Andrea Calimera, Mirko Loghi, Enrico Macii, Massimo Poncino
2011Physically unclonable functions for embeded security based on lithographic variation.
Aswin Sreedhar, Sandip Kundu
2011Pipeline schedule synthesis for real-time streaming tasks with inter/intra-instance precedence constraints.
Yi-Sheng Chiu, Chi-Sheng Shih, Shih-Hao Hung
2011Power management trends in portable consumer applications.
Jess Brown
2011Power management verification experiences in Wireless SoCs.
Bhanu Kapoor, Alan Hunter, Prapanna Tiwari
2011Power optimization in heterogenous datapaths.
Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, José M. Mendías, Román Hermida
2011Power reduction via near-optimal library-based cell-size selection.
Mohammad Rahman, Hiran Tennakoon, Carl Sechen
2011Power-driven global routing for multi-supply voltage domains.
Tai-Hsuan Wu, Azadeh Davoodi, Jeff T. Linderoth
2011Powering and communicating with mm-size implants.
Jan M. Rabaey, Michael Mark, David Chen, Christopher Sutardja, Chongxuan Tang, Suraj Gowda, Mark Wagner, Dan Werthimer
2011Precise WCET calculation in highly variant real-time systems.
Pascal Montag, Sebastian Altmeyer
2011Predicting bus contention effects on energy and performance in multi-processor SoCs.
Sandro Penolazzi, Ingo Sander, Ahmed Hemani
2011Priority division: A high-speed shared-memory bus arbitration with bounded latency.
Hardik Shah, Andreas Raabe, Alois C. Knoll
2011Proactive recovery for BTI in high-k SRAM cells.
Lin Li, Youtao Zhang, Jun Yang
2011Pruning infeasible paths for tight WCRT analysis of synchronous programs.
Sidharta Andalam, Partha S. Roop, Alain Girault
2011Pseudo circuit model for representing uncertainty in waveforms.
Ashish Nigam, Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs
2011RON: An on-chip ring oscillator network for hardware Trojan detection.
Xuehui Zhang, Mohammad Tehranipoor
2011Re-engineering cyber-physical control applications for hybrid communication protocols.
Dip Goswami, Reinhard Schneider, Samarjit Chakraborty
2011Real-time wireless communication in automotive applications.
Rainer Matischek, Thomas Herndl, Christoph Grimm, Jan Haase
2011Realistic performance-constrained pipelining in high-level synthesis.
Alex Kondratyev, Luciano Lavagno, Mike Meyer, Yosinori Watanabe
2011Redressing timing issues for speed-independent circuits in deep submicron age.
Yu Li, Terrence S. T. Mak, Alex Yakovlev
2011Reducing the cost of redundant execution in safety-critical systems using relaxed dedication.
Brett H. Meyer, Nishant J. George, Benton H. Calhoun, John C. Lach, Kevin Skadron
2011Register allocation for simultaneous reduction of energy and peak temperature on registers.
Tiantian Liu, Alex Orailoglu, Chun Jason Xue, Minming Li
2011ReliNoC: A reliable network for priority-based on-chip communication.
Mohammad Reza Kakoee, Valeria Bertacco, Luca Benini
2011Reliability-aware thermal management for hard real-time applications on multi-core processors.
Vinay Hanumaiah, Sarma B. K. Vrudhula
2011Reliability-driven don't care assignment for logic synthesis.
Andrew Zukoski, Mihir R. Choudhury, Kartik Mohanram
2011Resynchronization of Cyclo-Static Dataflow graphs.
Joost P. H. M. Hausmans, Marco Jan Gerrit Bekooij, Henk Corporaal
2011Robust 6T Si tunneling transistor SRAM design.
Xuebei Yang, Kartik Mohanram
2011Robustness analysis of 6T SRAMs in memory retention mode under PVT variations.
Elena I. Vatajelu, Joan Figueras
2011Run-time deadlock detection in networks-on-chip using coupled transitive closure networks.
Ra'ed Al-Dujaily, Terrence S. T. Mak, Fei Xia, Alexandre Yakovlev, Maurizio Palesi
2011SAMURAI: An accurate method for modelling and simulating non-stationary Random Telegraph Noise in SRAMs.
Aadithya V. Karthik, Alper Demir, Sriramkumar Venugopalan, Jaijeet S. Roychowdhury
2011SAT-based fault coverage evaluation in the presence of unknown values.
Michael A. Kochte, Hans-Joachim Wunderlich
2011SHARC: A streaming model for FPGA accelerators and its application to Saliency.
Srinidhi Kestur, Dharav Dantara, Vijaykrishnan Narayanan
2011STABLE: A new QF-BV SMT solver for hard verification problems combining Boolean reasoning with computer algebra.
Evgeny Pavlenko, Markus Wedler, Dominik Stoffel, Wolfgang Kunz, Alexander Dreyer, Frank Seelisch, Gert-Martin Greuel
2011ScTMR: A scan chain-based error recovery technique for TMR systems in safety-critical applications.
Mojtaba Ebrahimi, Seyed Ghassem Miremadi, Hossein Asadi
2011Scalable hybrid verification for embedded software.
Jörg Behrend, Djones Lettnin, Patrick Heckeler, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel
2011Scalable packet classification via GPU metaprogramming.
Kang Kang, Yangdong Steve Deng
2011Scratchpad memory optimizations for digital signal processing applications.
Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte
2011Sensor networks on the car: State of the art and future challenges.
Leandro D'Orazio, Filippo Visintainer, Marco Darin
2011Simplified programming of faulty sensor networks via code transformation and run-time interval computation.
Lan S. Bai, Robert P. Dick, Peter A. Dinda, Pai H. Chou
2011Simulation based tuning of system specification.
Yaseen Zaidi, Christoph Grimm, Jan Haase
2011Slack-aware scheduling on Coarse Grained Reconfigurable Arrays.
Giovanni Ansaloni, Laura Pozzi, Kazuyuki Tanimura, Nikil D. Dutt
2011Smart devices panel session - Integrating the real world interfaces.
Ahmed Jerraya, John Goodacre
2011Smart imagers of the future.
Antoine Dupret, Michaël Tchagaspanian, Arnaud Verdant, Laurent Alacoque, Arnaud Peizerat
2011Smart systems at ST.
Carmelo Papa
2011SoC infrastructures for predictable system integration.
Pieter van der Wolf, Jeroen Geuzebroek
2011Soft error rate estimation of digital circuits in the presence of Multiple Event Transients (METs).
Mahdi Fazeli, Seyed Nematollah Ahmadian, Seyed Ghassem Miremadi, Hossein Asadi, Mehdi Baradaran Tahoori
2011Solid state photodetectors for nuclear medical imaging applications.
Massimo Mazzillo, Pier Giorgio Fallica, Elisa Ficarra, A. Messina, Mario Francesco Romeo, Roberto Zafalon
2011Speeding Up MPSoC virtual platform simulation by Ultra Synchronization Checking Method.
Yu-Fu Yeh, Chung-Yang Huang, Chi-An Wu, Hsin-Cheng Lin
2011Speeding-up SIMD instructions dynamic binary translation in embedded processor simulation.
Luc Michel, Nicolas Fournel, Frédéric Pétrot
2011Stability optimization of embedded 8T SRAMs using Word-Line Voltage modulation.
Bartomeu Alorda, Gabriel Torrens, Sebastià A. Bota, Jaume Segura
2011Stage number optimization for switched capacitor power converters in micro-scale energy harvesting.
Chao Lu, Sang Phill Park, Vijay Raghunathan, Kaushik Roy
2011State of the art verification methodologies in 2015.
Allan Crone, Oliver Bringmann, C. Chevallaz, B. Dickman, Volkan Esen, Michael Rohleder
2011Statistical aspects of NBTI/PBTI and impact on SRAM yield.
Asen Asenov, Andrew R. Brown, Binjie Cheng
2011Statistical thermal evaluation and mitigation techniques for 3D Chip-Multiprocessors in the presence of process variations.
Da-Cheng Juan, Siddharth Garg, Diana Marculescu
2011Steiner tree based rotary clock routing with bounded skew and capacitive load balancing.
Jianchao Lu, Vinayak Honkote, Xin Chen, Baris Taskin
2011Stochastic circuit reliability analysis.
Elie Maricau, Georges G. E. Gielen
2011Strategies for initial sizing and operating point analysis of analog circuits.
Volker Boos, Jacek Nowak, Matthias Sylvester, Stephan Henker, Sebastian Höppner, Heiko Grimm, Dominik Krausse, Ralf Sommer
2011Sub-clock power-gating technique for minimising leakage power during active mode.
Jatin N. Mistry, Bashir M. Al-Hashimi, David Flynn, Stephen Hill
2011Supporting non-contiguous processor allocation in mesh-based CMPs using virtual point-to-point links.
Marjan Asadinia, Mehdi Modarressi, Arash Tavakkol, Hamid Sarbazi-Azad
2011Sustainability through massively integrated computing: Are we ready to break the energy efficiency wall for single-chip platforms?
Partha Pratim Pande, Fabien Clermidy, Diego Puschini, Imen Mansouri, Paul Bogdan, Radu Marculescu, Amlan Ganguly
2011System level techniques to improve reliability in high power microcontrollers for automotive applications.
Andrea Acquaviva, Massimo Poncino, Marco Otella, Michele Sciolla
2011System-assisted analog mixed-signal design.
Naresh R. Shanbhag, Andrew C. Singer
2011System-level energy-efficient scheduling for hard real-time embedded systems.
Linwei Niu
2011System-level modeling of a mixed-signal System on Chip for Wireless Sensor Networks.
Gilmar S. Beserra, José Edil G. de Medeiros, Arthur M. Sampaio, José Camargo da Costa
2011System-level power estimation methodology using cycle- and bit-accurate TLM.
Miltos D. Grammatikakis, Stratos Politis, Jean-Pierre Schoellkopf, Constantin Papadas
2011Systematic design of a programmable low-noise CMOS neural interface for cell activity recording.
Carolina Mora Lopez, Silke Musa, Carmen Bartic, Robert Puers, Georges G. E. Gielen, Wolfgang Eberle
2011Targeting code diversity with run-time adjustable issue-slots in a chip multiprocessor.
Fakhar Anjam, Muhammad Faisal Nadeem, Stephan Wong
2011Temporal parallel simulation: A fast gate-level HDL simulation using higher level models.
Dusung Kim, Maciej J. Ciesielski, Kyuho Shim, Seiyang Yang
2011Test time reduction in analogue/mixed-signal devices by defect oriented testing: An industrial example.
Hamidreza Hashempour, Jos Dohmen, Bratislav Tasic, Bram Kruseman, Camelia Hora, Maikel van Beurden, Yizi Xing
2011Testing of high-speed DACs using PRBS generation with "Alternate-Bit-Tapping".
Mohit Singh, Mahendra Sakare, Shalabh Gupta
2011The potential of reconfigurable hardware for HPC cryptanalysis of SHA-1.
Alessandro Cilardo
2011Theoretical modeling of the Itoh-Tsujii Inversion algorithm for enhanced performance on k-LUT based FPGAs.
Sujoy Sinha Roy, Chester Rebeiro, Debdeep Mukhopadhyay
2011Thermal-aware on-line task allocation for 3D multi-core processor throughput optimization.
Chiao-Ling Lung, Yi-Lun Ho, Ding-Ming Kwai, Shih-Chieh Chang
2011Time redundant parity for low-cost transient error detection.
David J. Palframan, Nam Sung Kim, Mikko H. Lipasti
2011Timing error statistics for energy-efficient robust DSP systems.
Rami A. Abdallah, Yu-Hung Lee, Naresh R. Shanbhag
2011Timing variation-aware custom instruction extension technique.
Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram
2011Timing-constrained I/O buffer placement for flip-chip designs.
Zhi-Wei Chen, Jin-Tai Yan
2011Topologically homogeneous power-performance heterogeneous multicore systems.
Koushik Chakraborty, Sanghamitra Roy
2011Towards coverage closure: Using GoldMine assertions for generating design validation stimulus.
Lingyi Liu, David Sheridan, William Tuohy, Shobha Vasudevan
2011Towards energy efficient hybrid on-chip Scratch Pad Memory with non-volatile memory.
Jingtong Hu, Chun Jason Xue, Qingfeng Zhuge, Wei-Che Tseng, Edwin Hsing-Mean Sha
2011Towards thermally-aware design of 3D MPSoCs with inter-tier cooling.
Mohamed M. Sabry, Arvind Sridhar, David Atienza, Yuksel Temiz, Yusuf Leblebici, S. Szczukiewicz, Navid Borhani, John Richard Thome, Thomas Brunschwiler, Bruno Michel
2011Transition-Time-Relation based capture-safety checking for at-speed scan test generation.
Kohei Miyase, Xiaoqing Wen, Masao Aso, Hiroshi Furukawa, Yuta Yamato, Seiji Kajihara
2011Trigonometric method to handle realistic error probabilities in logic circuits.
Chien-Chih Yu, John P. Hayes
2011Two methods for 24 Gbps test signal synthesis.
David C. Keezer, Carl Edward Gray
2011Ultra low-power photovoltaic MPPT technique for indoor and outdoor wireless sensor nodes.
Alex S. Weddell, Geoff V. Merrett, Bashir M. Al-Hashimi
2011Understanding the role of buildings in a smart microgrid.
Yuvraj Agarwal, Thomas Weng, Rajesh K. Gupta
2011Using contract-based component specifications for virtual integration testing and architecture design.
Werner Damm, Hardi Hungar, Bernhard Josko, Thomas Peikenkamp, Ingo Stierand
2011VANDAL: A tool for the design specification of nanophotonic networks.
Gilbert Hendry, Johnnie Chan, Luca P. Carloni, Keren Bergman
2011VESPA: Variability emulation for System-on-Chip performance analysis.
Vivek Joy Kozhikkottu, Rangharajan Venkatesan, Anand Raghunathan, Sujit Dey
2011Variability aware modeling for yield enhancement of SRAM and logic.
Miguel Miranda, Paul Zuber, Petr Dobrovolný, Philippe Roussel
2011Variability-aware duty cycle scheduling in long running embedded sensing systems.
Lucas Francisco Wanner, Rahul Balani, Sadaf Zahedi, Charwak Apte, Puneet Gupta, Mani B. Srivastava
2011Variation aware dynamic power management for chip multiprocessor architectures.
Mohammad Ghasemazar, Massoud Pedram
2011Verifying dynamic aspects of UML models.
Mathias Soeken, Robert Wille, Rolf Drechsler
2011Virtual Manycore platforms: Moving towards 100+ processor cores.
Rainer Leupers, Lieven Eeckhout, Grant Martin, Frank Schirrmeister, Nigel P. Topham, Xiaotao Chen
2011Waste-aware dilution and mixing of biochemical samples with digital microfluidic biochips.
Sudip Roy, Bhargab B. Bhattacharya, Krishnendu Chakrabarty
2011When to stop verification?: Statistical trade-off between expected loss and simulation cost.
Sumit Kumar Jha, Christopher James Langmead, Swarup Mohalik, S. Ramesh
2011Wireless communication and energy harvesting in automobiles.
Stefan Mahlknecht, Tom J. Kazmierski, Christoph Grimm, Leran Wang
2011Wireless innovations for smartphones.
Hannu Kauppinen
2011Worst-case temperature analysis for real-time systems.
Devendra Rai, Hoeseok Yang, Iuliana Bacivarov, Jian-Jia Chen, Lothar Thiele
2011X-SENSE: Sensing in extreme environments.
Jan Beutel, Bernhard Buchli, Federico Ferrari, Matthias Keller, Marco Zimmerling, Lothar Thiele
2011jTLM: An experimentation framework for the simulation of transaction-level models of Systems-on-Chip.
Giovanni Funchal, Matthieu Moy
2011mRTS: Run-time system for reconfigurable processors with multi-grained instruction-set extensions.
Waheed Ahmed, Muhammad Shafique, Lars Bauer, Jörg Henkel