DATE A

350 papers

YearTitle / Authors
20103D-integration of silicon devices: A key technology for sophisticated products.
Armin Klumpp, Peter Ramm, Robert Wieland
2010A 14 bit, 280 kS/s cyclic ADC with 100 dB SFDR.
Thomas Froehlich, Vivek Sharma, Markus Bingesser
2010A 150Mbit/s 3GPP LTE Turbo code decoder.
Matthias May, Thomas Ilnseher, Norbert Wehn, Wolfgang Raab
2010A GPU based implementation of Center-Surround Distribution Distance for feature extraction and matching.
Aditi Rathi, Michael DeBole, Weina Ge, Robert T. Collins, Narayanan Vijaykrishnan
2010A HMMER hardware accelerator using divergences.
Juan Fernando Eusse Giraldo, Nahri Moreano, Ricardo Pezzuol Jacobi, Alba Cristina Magalhaes Alves de Melo
2010A High-Voltage Low-Power DC-DC buck regulator for automotive applications.
Giuseppe Pasetti, Luca Fanucci, Riccardo Serventi
2010A Smart Space application to dynamically relate medical and environmental information.
Fabio Vergari, Sara Bartolini, Federico Spadini, Alfredo D'Elia, Guido Zamagni, Luca Roffia, Tullio Salmon Cinotti
2010A black box method for stability analysis of arbitrary SRAM cell structures.
Michael Wieckowski, Dennis Sylvester, David T. Blaauw, Vikas Chandra, Sachin Idgunji, Cezary Pietrzyk, Robert C. Aitken
2010A compact digital amplitude modulator in 90nm CMOS.
Vincenzo Chironi, Björn Debaillie, Andrea Baschirotto, Jan Craninckx, Mark Ingels
2010A flexible UWB Transmitter for breast cancer detection imaging systems.
Massimo Cutrupi, Marco Crepaldi, Mario R. Casu, Mariagrazia Graziano
2010A fully-asynchronous low-power framework for GALS NoC integration.
Yvain Thonnart, Pascal Vivet, Fabien Clermidy
2010A general mathematical model of probabilistic ripple-carry adders.
Mark S. K. Lau, Keck Voon Ling, Yun-Chung Chu, Arun Bhanu
2010A general method to make multi-clock system deterministic.
Menghao Su, Yunji Chen, Xiang Gao
2010A generalized control-flow-aware pattern recognition algorithm for behavioral synthesis.
Jason Cong, Hui Huang, Wei Jiang
2010A low cost multi-standard near-optimal soft-output sphere decoder: Algorithm and architecture.
Özgün Paker, Sebastian Eckert, Andreas Bury
2010A low-area flexible MIMO detector for WiFi/WiMAX standards.
Nariman Moezzi Madani, Thorlindur Thorolfsson, William Rhett Davis
2010A memory- and time-efficient on-chip TCAM minimizer for IP lookup.
Heeyeol Yu
2010A method for design of impulse bursts noise filters optimized for FPGA implementations.
Zdenek Vasícek, Lukás Sekanina, Michal Bidlo
2010A method to remove deadlocks in Networks-on-Chips with Wormhole flow control.
Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2010A methodology for propagating design tolerances to shape tolerances for use in manufacturing.
Shayak Banerjee, Kanak B. Agarwal, Chin Ngai Sze, Sani R. Nassif, Michael Orshansky
2010A methodology for the characterization of process variation in NoC links.
Carles Hernández, Federico Silla, José Duato
2010A modeling method by eliminating execution traces for performance evaluation.
Kouichi Ono, Manabu Toyota, Ryo Kawahara, Yoshifumi Sakamoto, Takeo Nakada, Naoaki Fukuoka
2010A new approach for adaptive failure diagnostics based on emulation test.
Steffen Ostendorff, Heinz-Dietrich Wuttke, Jörg Sachße, S. Köhler
2010A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs.
Luca Sterpone, Niccolò Battezzati
2010A new quaternary FPGA based on a voltage-mode multi-valued circuit.
Cristiano Lazzari, Paulo F. Flores, José Monteiro, Luigi Carro
2010A nondestructive self-reference scheme for Spin-Transfer Torque Random Access Memory (STT-RAM).
Yiran Chen, Hai Li, Xiaobin Wang, Wenzhong Zhu, Wei Xu, Tong Zhang
2010A portable multi-pitch e-drum based on printed flexible pressure sensors.
Chun-Ming Lo, Tsung-Ching Huang, Cheng-Yi Chiang, Johnson Hou, Kwang-Ting Cheng
2010A power optimization method for CMOS Op-Amps using sub-space based geometric programming.
Wei Gao, Richard Hornsey
2010A proposal for real-time interfaces in SPEEDS.
Purandar Bhaduri, Ingo Stierand
2010A rapid prototyping system for error-resilient multi-processor systems-on-chip.
Matthias May, Norbert Wehn, Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Daniel Ziener, Jürgen Teich
2010A reconfigurable cache memory with heterogeneous banks.
Domingo Benitez, Juan C. Moure, Dolores Rexachs, Emilio Luque
2010A reconfigurable hardware for one bit transform based multiple reference frame Motion Estimation.
Abdulkadir Akin, Gokhan Sayilar, Ilker Hamzaoglu
2010A reconfigurable multiprocessor architecture for a reliable face recognition implementation.
Antonino Tumeo, Francesco Regazzoni, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto
2010A resilience roadmap.
Sani R. Nassif, Nikil Mehta, Yu Cao
2010A robust ADC code hit counting technique.
Jiun-Lang Huang, Kuo-Yu Chou, Ming-Huan Lu, Xuan-Lun Huang
2010A software update service with self-protection capabilities.
Moritz Neukirchner, Steffen Stein, Harald Schrom, Rolf Ernst
2010A special-purpose compiler for look-up table and code generation for function evaluation.
Yuanrui Zhang, Lanping Deng, Praveen Yedlapalli, Sai Prashanth Muralidhara, Hui Zhao, Mahmut T. Kandemir, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun
2010A systematic approach to the test of combined HW/SW systems.
Alexander Krupp, Wolfgang Müller
2010AUTOSAR and the automotive tool chain.
Stefan Voget
2010AUTOSAR basic software for complex control units.
Dirk Diekhoff
2010AVGS-Mux style: A novel technology and device independent technique for reducing power and compensating process variations in FPGA fabrics.
Bahman Kheradmand Boroujeni, Christian Piguet, Yusuf Leblebici
2010Accelerating Lightpath setup via broadcasting in binary-tree waveguide in Optical NoCs.
Binzhang Fu, Yinhe Han, Huawei Li, Xiaowei Li
2010Accurate timed RTOS model for transaction level modeling.
Yonghyun Hwang, Gunar Schirner, Samar Abdi, Daniel D. Gajski
2010Adapting to adaptive testing.
Erik Jan Marinissen, Adit D. Singh, Dan Glotter, Marco Esposito, John M. Carulli Jr., Amit Nahar, Kenneth M. Butler, Davide Appello, Chris Portelli
2010AgeSim: A simulation framework for evaluating the lifetime reliability of processor-based SoCs.
Lin Huang, Qiang Xu
2010Aging-resilient design of pipelined architectures using novel detection and correction circuits.
Hamed F. Dadgour, Kaustav Banerjee
2010Algorithms to maximize yield and enhance yield/area of pipeline circuitry by insertion of switches and redundant modules.
Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta
2010All things are connected.
Alberto L. Sangiovanni-Vincentelli
2010Always energy-optimal microscopic wireless systems.
Jan M. Rabaey
2010An 11.6-19.3mW 0.375-13.6GHz CMOS frequency synthesizer with rail-to-rail operation.
Arnd Geis, Pierluigi Nuzzo, Julien Ryckaert, Yves Rolain, Gerd Vandersteen, Jan Craninckx
2010An HVS-based Adaptive Computational Complexity Reduction Scheme for H.264/AVC video encoder using Prognostic Early Mode Exclusion.
Muhammad Shafique, Bastian Molkenthin, Jörg Henkel
2010An RDL-configurable 3D memory tier to replace on-chip SRAM.
Marco Facchini, Paul Marchal, Francky Catthoor, Wim Dehaene
2010An abstraction-guided simulation approach using Markov models for microprocessor verification.
Tao Zhang, Tao Lv, Xiaowei Li
2010An accurate and efficient yield optimization method for analog circuits based on computing budget allocation and memetic search technique.
Bo Liu, Francisco V. Fernández, Georges G. E. Gielen
2010An accurate system architecture refinement methodology with mixed abstraction-level virtual platform.
Zhe-Mao Hsu, Jen-Chieh Yeh, I-Yao Chuang
2010An active vision system for fall detection and posture recognition in elderly healthcare.
Giovanni Diraco, Alessandro Leone, Pietro Siciliano
2010An adaptive code rate EDAC scheme for random access memory.
Ching-Yi Chen, Cheng-Wen Wu
2010An analytical method for evaluating Network-on-Chip performance.
Sahar Foroutan, Yvain Thonnart, Richard Hersemeule, Ahmed Jerraya
2010An architecture for self-organization in pervasive systems.
Aly A. Syed, Johan Lukkien, Roxana Frunza
2010An automatic test generation framework for digitally-assisted adaptive equalizers in high-speed serial links.
Mohamed Abbas, Kwang-Ting Cheng, Yasuo Furukawa, Satoshi Komatsu, Kunihiro Asada
2010An efficient and complete approach for throughput-maximal SDF allocation and scheduling on multi-core platforms.
Alessio Bonfietti, Luca Benini, Michele Lombardi, Michela Milano
2010An efficient distributed memory interface for many-core platform with 3D stacked DRAM.
Igor Loi, Luca Benini
2010An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits.
Xiaoda Pan, Fan Yang, Xuan Zeng, Yangfeng Su
2010An embedded platform for privacy-friendly road charging applications.
Josep Balasch, Ingrid Verbauwhede, Bart Preneel
2010An embedded wide-range and high-resolution CLOCK jitter measurement circuit.
Yu Lee, Ching-Yuan Yang, Nai-Chen Daniel Cheng, Ji-Jan Chen
2010An error-correcting unordered code and hardware support for robust asynchronous global communication.
Melinda Y. Agyekum, Steven M. Nowick
2010An evaluation of a slice fault aware tool chain.
Adwait Gupte, Phillip H. Jones
2010An high voltage CMOS voltage regulator for automotive alternators with programmable functionalities and full reverse polarity capability.
Luca Fanucci, Giuseppe Pasetti, Paolo D'Abramo, Riccardo Serventi, Francesco Tinfena, Pierre Chassard, L. Labiste, Pierre Tisserand
2010An industrial design space exploration framework for supporting run-time resource management on multi-core systems.
Giovanni Mariani, Prabhat Avasare, Geert Vanmeerbeeck, Chantal Ykman-Couvreur, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria
2010An integrated framework for joint design space exploration of microarchitecture and circuits.
Omid Azizi, Aqeel Mahesri, John P. Stevenson, Sanjay J. Patel, Mark Horowitz
2010An on-chip clock generation scheme for faster-than-at-speed delay testing.
Songwei Pei, Huawei Li, Xiaowei Li
2010Analog circuit test based on a digital signature.
Alvaro Gómez, Ricard Sanahuja, Luz Balado, Joan Figueras
2010Analytical model for TDDB-based performance degradation in combinational logic.
Mihir R. Choudhury, Vikas Chandra, Kartik Mohanram, Robert C. Aitken
2010Application-specific memory performance of a heterogeneous reconfigurable architecture.
Sean Whitty, Henning Sahlbach, Brady Hurlburt, Rolf Ernst, Wolfram Putzke-Röming
2010Approximate logic synthesis for error tolerant applications.
Doochul Shin, Sandeep K. Gupta
2010Are we there yet? Has IP block assembly become as easy as LEGO?
Bryon Moyer, Joachim Kunkel, John Cornish, Chris Rowen, Eshel Haritan, Yankin Tanurhan
2010Assertion-based verification of RTOS properties.
Marcio Ferreira da Silva Oliveira, Henning Zabel, Wolfgang Müller
2010Automated bottleneck-driven design-space exploration of media processing systems.
Yang Yang, Marc Geilen, Twan Basten, Sander Stuijk, Henk Corporaal
2010Automatic generation of software TLM in multiple abstraction layers for efficient HW/SW co-simulation.
Meng-Huan Wu, Wen-Chuan Lee, Chen-Yu Chuang, Ren-Song Tsay
2010Automatic microarchitectural pipelining.
Marc Galceran Oms, Jordi Cortadella, Dmitry Bufistov, Michael Kishinevsky
2010Automatic pipelining from transactional datapath specifications.
Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-Lien Lu
2010Automatic workload generation for system-level exploration based on modified GCC compiler.
Jari Kreku, Kari Tiensyrjä, Geert Vanmeerbeeck
2010BACH 2 : Bounded reachability checker for compositional linear hybrid systems.
Lei Bu, You Li, Linzhang Wang, Xin Chen, Xuandong Li
2010BCDL: A high speed balanced DPL for FPGA with global precharge and no early evaluation.
Maxime Nassar, Shivam Bhasin, Jean-Luc Danger, Guillaume Duc, Sylvain Guilley
2010BISD: Scan-based Built-In self-diagnosis.
Melanie Elm, Hans-Joachim Wunderlich
2010Behavioral level dual-vth design for reduced leakage power with thermal awareness.
Junbo Yu, Qiang Zhou, Gang Qu, Jinian Bian
2010Bitstream processing for embedded systems using C++ metaprogramming.
Reimund Klemm, Gerhard P. Fettweis
2010Block-level bayesian diagnosis of analogue electronic circuits.
Shaji Krishnan, Klaas D. Doornbos, Rudi Brand, Hans G. Kerkhoff
2010Bounding the shared resource load for the performance analysis of multiprocessor systems.
Simon Schliecker, Mircea Negrean, Rolf Ernst
2010COTS-based applications in space avionics.
Michel Pignol
2010Capturing intrinsic parameter fluctuations using the PSP compact model.
Binjie Cheng, Daryoosh Dideban, Negin Moezi, Campbell Millar, Gareth Roy, Xingsheng Wang, Scott Roy, Asen Asenov
2010Carbon nanotube circuits: Living with imperfections and variations.
Jie Zhang, Nishant Patil, Albert Lin, H.-S. Philip Wong, Subhasish Mitra
2010Challenges in the design of automotive software.
Simon Fürst
2010Checking and deriving module paths in Verilog cell library descriptions.
Matthias Raffelsieper, Mohammad Reza Mousavi, Chris W. H. Strolenberg
2010Circuit propagation delay estimation through multivariate regression-based modeling under spatio-temporal variability.
Shrikanth Ganapathy, Ramon Canal, Antonio González, Antonio Rubio
2010Clock gating approaches by IOEX graphs and cluster efficiency plots.
Jithendra Srinivas, Sukumar Jairam
2010Clock skew optimization considering complicated power modes.
Chiao-Ling Lung, Zi-Yi Zeng, Chung-Han Chou, Shih-Chieh Chang
2010Clock skew scheduling for soft-error-tolerant sequential circuits.
Kai-Chiang Wu, Diana Marculescu
2010Closing the gap between UML-based modeling, simulation and synthesis of combined HW/SW systems.
Fabian Mischkalla, Da He, Wolfgang Müller
2010Combining optimizations in automated low power design.
Qiang Liu, Tim Todman, Wayne Luk
2010Compact model of memristors and its application in computing systems.
Hai Li, Miao Hu
2010Compilation of stream programs for multicore processors that incorporate scratchpad memories.
Weijia Che, Amrit Panda, Karam S. Chatha
2010Computation of yield-optimized Pareto fronts for analog integrated circuit specifications.
Daniel Mueller-Gritschneder, Helmut Graeb
2010Computing robustness of FlexRay schedules to uncertainties in design parameters.
Arkadeb Ghosal, Haibo Zeng, Marco Di Natale, Yakov Ben-Haim
2010Constant-time admission control for Deadline Monotonic tasks.
Alejandro Masrur, Samarjit Chakraborty, Georg Färber
2010Constrained Power Management: Application to a multimedia mobile platform.
Patrick Bellasi, Stefano Bosisio, Matteo Carnevali, William Fornaciari, David Siorpaes
2010Construction of dual mode components for reconfiguration aware high-level synthesis.
George Economakos, Sotirios Xydis, Ioannis Koutras, Dimitrios Soudris
2010Contango: Integrated optimization of SoC clock networks.
Dongjin Lee, Igor L. Markov
2010Control network generator for latency insensitive designs.
Eliyah Kilada, Kenneth S. Stevens
2010Cool MPSoC programming.
Rainer Leupers, Lothar Thiele, Xiaoning Nie, Bart Kienhuis, Matthias Weiss, Tsuyoshi Isshiki
2010Coordinated resource optimization in behavioral synthesis.
Jason Cong, Bin Liu, Junjuan Xu
2010Correlation controlled sampling for efficient variability analysis of analog circuits.
Javid Jaffari, Mohab Anis
2010Cost modeling and cycle-accurate co-simulation of heterogeneous multiprocessor systems.
Sven van Haastregt, Eyal Halm, Bart Kienhuis
2010Cost-effective IR-drop failure identification and yield recovery through a failure-adaptive test scheme.
Mingjing Chen, Alex Orailoglu
2010Cost-effective slack allocation for lifetime improvement in NoC-based MPSoCs.
Brett H. Meyer, Adam S. Hartman, Donald E. Thomas
2010Creating 3D specific systems: Architecture, design and CAD.
Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson
2010Cross-layer resilience challenges: Metrics and optimization.
Subhasish Mitra, Kevin Brelsford, Pia N. Sanda
2010DAGS: Distribution agnostic sequential Monte Carlo scheme for task execution time estimation.
Nabeel Iqbal, Muhammad Adnan Siddique, Jörg Henkel
2010DEW: A fast level 1 cache simulation approach for embedded processors with FIFO replacement policy.
Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya, Sri Parameswaran
2010DVFS based task scheduling in a harvesting WSN for Structural Health Monitoring.
A. Ravinagarajan, Denis Dondi, Tajana Simunic Rosing
2010Defect aware X-filling for low-power scan testing.
S. Balatsouka, Vasileios Tenentes, Xrysovalantis Kavousianos, Krishnendu Chakrabarty
2010Demonstration of an in-band reconfiguration data distribution and network node reconfiguration.
Uwe Proß, Sebastian Goller, Erik Markert, Michael Jüttner, Jan Langer, Ulrich Heinkel, Joachim Knäblein, Axel Schneider
2010Design of a real-time optimized emulation method.
Timo Kerstan, Markus Oertel
2010Design of an automotive traffic sign recognition system targeting a multi-core SoC implementation.
Matthias Müller, Axel G. Braun, Joachim Gerlach, Wolfgang Rosenstiel, Dennis Nienhüser, Johann Marius Zöllner, Oliver Bringmann
2010Design space exploration of a mesochronous link for cost-effective and flexible GALS NOCs.
Daniele Ludovici, Alessandro Strano, Georgi Nedeltchev Gaydadjiev, Luca Benini, Davide Bertozzi
2010Design techniques for cross-layer resilience.
Nicholas P. Carter, Helia Naeimi, Donald S. Gardner
2010Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 2010
Giovanni De Micheli, Bashir M. Al-Hashimi, Wolfgang Müller, Enrico Macii
2010Detecting/preventing information leakage on the memory bus due to malicious hardware.
Abhishek Das, Gokhan Memik, Joseph Zambreno, Alok N. Choudhary
2010Deterministic, predictable and light-weight multithreading using PRET-C.
Sidharta Andalam, Partha S. Roop, Alain Girault
2010Diagnosis of multiple arbitrary faults with mask and reinforcement effect.
Jing Ye, Yu Hu, Xiaowei Li
2010Differential Power Analysis enhancement with statistical preprocessing.
Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres, Michel Robert
2010Digital statistical analysis using VHDL.
Manfred Dietrich, Uwe Eichler, Joachim Haase
2010Domain specific architecture for next generation wireless communication.
Botao Zhang, Hengzhu Liu, Heng Zhao, Fangzheng Mo, Ting Chen
2010Dual-Vth leakage reduction with Fast Clock Skew Scheduling Enhancement.
Meng Tie, Haiying Dong, Tong Wang, Xu Cheng
2010Dueling CLOCK: Adaptive cache replacement policy based on the CLOCK algorithm.
Andhi Janapsatya, Aleksandar Ignjatovic, Jorgen Peddersen, Sri Parameswaran
2010DynAHeal: Dynamic energy efficient task assignment for wireless healthcare systems.
Priti Aghera, Dilip Krishnaswamy, Diana Fang, Ayse K. Coskun, Tajana Rosing
2010Dynamically reconfigurable register file for a softcore VLIW processor.
Stephan Wong, Fakhar Anjam, Faisal Nadeem
2010ERSA: Error Resilient System Architecture for probabilistic applications.
Larkhoon Leem, Hyungmin Cho, Jason Bau, Quinn A. Jacobson, Subhasish Mitra
2010Efficient 3D high-frequency impedance extraction for general interconnects and inductors above a layered substrate.
Navin Srivastava, Roberto Suaya, Kaustav Banerjee
2010Efficient High-Level modeling in the networking domain.
Christian Zebelein, Joachim Falk, Christian Haubelt, Jürgen Teich, Rainer Dorsch
2010Efficient OpenMP data mapping for multicore platforms with vertically stacked memory.
Andrea Marongiu, Martino Ruggiero, Luca Benini
2010Efficient decision ordering techniques for SAT-based test generation.
Mingsong Chen, Xiaoke Qin, Prabhat Mishra
2010Efficient power conversion for ultra low voltage micro scale energy transducers.
Chao Lu, Sang Phill Park, Vijay Raghunathan, Kaushik Roy
2010Efficient representation, stratification, and compression of variational CSM library waveforms using Robust Principle Component Analysis.
Safar Hatami, Massoud Pedram
2010Embedded software testing: What kind of problem is this?
Érika F. Cota
2010Enabling efficient post-silicon debug by clustering of hardware-assertions.
Mohammad Hossein Neishaburi, Zeljko Zilic
2010Energy- and endurance-aware design of phase change memory caches.
Yongsoo Joo, Dimin Niu, Xiangyu Dong, Guangyu Sun, Naehyuck Chang, Yuan Xie
2010Energy-efficient real-time task scheduling with temperature-dependent leakage.
Chuan-Yue Yang, Jian-Jia Chen, Lothar Thiele, Tei-Wei Kuo
2010Energy-efficient task allocation and scheduling for multi-mode MPSoCs under lifetime reliability constraint.
Lin Huang, Qiang Xu
2010Energy-efficient variable-flow liquid cooling in 3D stacked architectures.
Ayse K. Coskun, David Atienza, Tajana Simunic Rosing, Thomas Brunschwiler, Bruno Michel
2010Energy-oriented dynamic SPM allocation based on time-slotted Cache conflict graph.
Wang Huan, Zhang Yang, Mei Chen, Ling Ming
2010Energy-performance design space exploration in SMT architectures exploiting selective load value predictions.
Arpad Gellert, Gianluca Palermo, Vittorio Zaccaria, Adrian Florea, Lucian N. Vintan, Cristina Silvano
2010Enhanced Q-learning algorithm for dynamic power management with performance constraint.
Wei Liu, Ying Tan, Qinru Qiu
2010Enhancing double-patterning detailed routing with lazy coloring and within-path conflict avoidance.
Xin Gao, Luca Macchiarulo
2010Equivalent circuit modeling of multilayered power/ground planes for fast transient simulation.
Takayuki Watanabe, Hideki Asai
2010Error resilience of intra-die and inter-die communication with 3D spidergon STNoC.
Vladimir Pasca, Lorena Anghel, Claudia Rusu, Riccardo Locatelli, Massimo Coppola
2010Evaluation and design exploration of solar harvested-energy prediction algorithm.
Mustafa Imran Ali, Bashir M. Al-Hashimi, Joaquín Recas, David Atienza
2010Evaluation of runtime task mapping heuristics with rSesame - a case study.
Kamana Sigdel, Mark Thompson, Carlo Galuzzi, Andy D. Pimentel, Koen Bertels
2010Exploiting inter-event stream correlations between output event streams of non-preemptively scheduled tasks.
Jonas Rox, Rolf Ernst
2010Exploiting local logic structures to optimize multi-core SoC floorplanning.
Cheng-Hong Li, Sampada Sonalkar, Luca P. Carloni
2010Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network.
Minje Jun, Sungroh Yoon, Eui-Young Chung
2010Exploration of hardware sharing for image encoders.
Sebastián López, Roberto Sarmiento, Philip G. Potter, Wayne Luk, Peter Y. K. Cheung
2010Extended Hamiltonian Pencil for passivity assessment and enforcement for S-parameter systems.
Zuochang Ye, L. Miguel Silveira, Joel R. Phillips
2010FPGA-based adaptive computing for correlated multi-stream processing.
Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch
2010Far Correlation-based EMA with a precharacterized leakage model.
Olivier Meynard, Sylvain Guilley, Jean-Luc Danger, Laurent Sauvage
2010Fault diagnosis of analog circuits based on machine learning.
Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir
2010Fault-based attack of RSA authentication.
Andrea Pellegrini, Valeria Bertacco, Todd M. Austin
2010Feedback control for providing QoS in NoC based multicores.
Akbar Sharifi, Hui Zhao, Mahmut T. Kandemir
2010Finding reset nondeterminism in RTL designs - scalable X-analysis methodology and case study.
Hong-Zu Chou, Haiqian Yu, Kai-Hui Chang, Dylan Dobbyn, Sy-Yen Kuo
2010FlashPower: A detailed power model for NAND flash memory.
Vidyabhushan Mohan, Sudhanva Gurumurthi, Mircea R. Stan
2010Formal semantics for PSL modeling layer and application to the verification of transactional models.
Luca Ferro, Laurence Pierre
2010Formal specification of networks-on-chips: deadlock and evacuation.
Freek Verbeek, Julien Schmaltz
2010Formal verification of analog circuits in the presence of noise and process variation.
Rajeev Narayanan, Behzad Akbarpour, Mohamed H. Zaki, Sofiène Tahar, Lawrence C. Paulson
2010From transistors to MEMS: Throughput-aware power gating in CMOS circuits.
Michael B. Henry, Leyla Nazhandali
2010General behavioral thermal modeling and characterization for multi-core microprocessor design.
Thom Jefferson A. Eguia, Sheldon X.-D. Tan, Ruijing Shen, Eduardo H. Pacheco, Murli Tirumala
2010GentleCool: Cooling aware proactive workload scheduling in multi-machine systems.
Raid Zuhair Ayoub, Shervin Sharifi, Tajana Simunic Rosing
2010GoldMine: Automatic assertion generation using data mining and static analysis.
Shobha Vasudevan, David Sheridan, Sanjay J. Patel, David Tcheng, William Tuohy, Daniel R. Johnson
2010Graphical Model Debugger Framework for embedded systems.
Kebin Zeng, Yu Guo, Christo Angelov
2010HORUS - high-dimensional Model Order Reduction via low moment-matching upgraded sampling.
Jorge Fernandez Villena, Luís Miguel Silveira
2010HW/SW co-detection of transient and permanent faults with fast recovery in statically scheduled data paths.
Mario Schölzel
2010Hardware / software design challenges of low-power sensor nodes for condition monitoring.
Hendrik Ahlendorf, Lars Gopfert
2010Heterogeneous vs homogeneous MPSoC approaches for a Mobile LTE modem.
Camille Jalier, Didier Lattard, Ahmed Amine Jerraya, Gilles Sassatelli, Pascal Benoit, Lionel Torres
2010High temperature polymer capacitors for aerospace applications.
Clinton K. Landrock, Bozena Kaminska
2010High-fidelity markovian power model for protocols.
Jing Cao, Albert Nymeyer
2010High-quality pattern selection for screening small-delay defects considering process variations and crosstalk.
Ke Peng, Mahmut Yilmaz, Mohammad Tehranipoor, Krishnendu Chakrabarty
2010High-speed clock recovery for low-cost FPGAs.
István Haller, Zoltan Francisc Baruch
2010Holistic simulation of FlexRay networks by using run-time model switching.
Michael Karner, Eric Armengaud, Christian Steger, Reinhold Weiss
2010IP routing processing with graphic processors.
Shuai Mu, Xinya Zhang, Nairen Zhang, Jiaxin Lu, Yangdong Steve Deng, Shu Zhang
2010IVF: Characterizing the vulnerability of microprocessor structures to intermittent faults.
Songjun Pan, Yu Hu, Xiaowei Li
2010Implementing digital logic with sinusoidal supplies.
Kalyana C. Bollapalli, Sunil P. Khatri, Laszlo B. Kish
2010Improved countermeasure against Address-bit DPA for ECC scalar multiplication.
Masami Izumi, Jun Ikegami, Kazuo Sakiyama, Kazuo Ohta
2010Increasing PCM main memory lifetime.
Alexandre Peixoto Ferreira, Miao Zhou, Santiago Bock, Bruce R. Childers, Rami G. Melhem, Daniel Mossé
2010Increasing the power efficiency of PCs by improving the hardware/OS interaction.
Chris Schläger
2010Instruction precomputation with memoization for fault detection.
Demid Borodin, Ben H. H. Juurlink
2010Integrated end-to-end timing analysis of networked AUTOSAR-compliant systems.
Karthik Lakshmanan, Gaurav Bhatia, Ragunathan Rajkumar
2010Integration, cooling and packaging issues for aerospace equipments.
Claude Sarno, Christian Tantolin
2010Intent-leveraged optimization of analog circuits via homotopy.
Metha Jeeradit, Jaeha Kim, Mark Horowitz
2010Interconnect delay and slew metrics using the beta distribution.
Jun-Kuei Zeng, Chung-Ping Chen
2010Inversed Temperature Dependence aware clock skew scheduling for sequential circuits.
Jieyi Long, Seda Ogrenci Memik
2010Investigating the impact of NBTI on different power saving cache strategies.
Andrew J. Ricketts, Jawar Singh, Krishnan Ramakrishnan, Narayanan Vijaykrishnan, Dhiraj K. Pradhan
2010KAHRISMA: A novel Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array architecture.
Ralf König, Lars Bauer, Timo Stripf, Muhammad Shafique, Waheed Ahmed, Jürgen Becker, Jörg Henkel
2010KL-Cuts: A new approach for logic synthesis targeting multiple output blocks.
Osvaldo Martinello, Felipe S. Marques, Renato P. Ribas, André Inácio Reis
2010Large-scale Boolean matching.
Hadi Katebi, Igor L. Markov
2010Layout-aware pseudo-functional testing for critical paths considering power supply noise effects.
Xiao Liu, Yubin Zhang, Feng Yuan, Qiang Xu
2010Learning-based adaptation to applications and environments in a reconfigurable Network-on-Chip.
Jih-Sheng Shen, Chun-Hsian Huang, Pao-Ann Hsiung
2010Leveraging application-level requirements in the design of a NoC for a 4G SoC - a case study.
Rudy Beraha, Isask'har Walter, Israel Cidon, Avinoam Kolodny
2010Leveraging dominators for preprocessing QBF.
Hratch Mangassarian, Bao Le, Alexandra Goultiaeva, Andreas G. Veneris, Fahiem Bacchus
2010Linear programming approach for performance-driven data aggregation in networks of embedded sensors.
Cristian Ferent, Varun Subramanian, Michael Gilberti, Alex Doboli
2010Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis.
Masood Qazi, Mehul Tikekar, Lara Dolecek, Devavrat Shah, Anantha P. Chandrakasan
2010Loosely Time-Triggered Architectures for Cyber-Physical Systems.
Albert Benveniste
2010Low power design of the X-GOLD
Wolfgang Raab, Jörg Berthold, J. A. Ulrich Hachmann, Dominik Langen, Michael Schreiner, Holger Eisenreich, Jens-Uwe Schluessler, Georg Ellguth
2010Low power mobile internet devices using LTE technology.
Volker Aue
2010Low-complexity high throughput VLSI architecture of soft-output ML MIMO detector.
Teo Cupaiuolo, Massimiliano Siti, Alessandro Tomasoni
2010Low-power FinFET circuit synthesis using surface orientation optimization.
Prateek Mishra, Niraj K. Jha
2010MB-LITE: A robust, light-weight soft-core implementation of the MicroBlaze architecture.
Tamar Kranenburg, Rene van Leuken
2010MEDEA: a hybrid shared-memory/message-passing multiprocessor NoC-based architecture.
Sergio Tota, Mario R. Casu, Massimo Ruo Roch, Luca Rostagno, Maurizio Zamboni
2010Mapping scientific applications on a large-scale data-path accelerator implemented by single-flux quantum (SFQ) circuits.
Farhad Mehdipour, Hiroaki Honda, Hiroshi Kataoka, Koji Inoue, Irina Kataeva, Kazuaki J. Murakami, Hiroyuki Akaike, Akira Fujimaki
2010Memory testing with a RISC microcontroller.
Ad J. van de Goor, Georgi Gaydadjiev, Said Hamdioui
2010Modeling constructs and kernel for parallel simulation of accuracy adaptive TLMs.
Rauf Salimi Khaligh, Martin Radetzki
2010Monolithically stackable hybrid FPGA.
Dmitri B. Strukov, Alan Mishchenko
2010Multi-temperature testing for core-based system-on-chip.
Zhiyuan He, Zebo Peng, Petru Eles
2010Multicore soft error rate stabilization using adaptive dual modular redundancy.
Ramakrishna Vadlamani, Jia Zhao, Wayne P. Burleson, Russell Tessier
2010Multiplexed redundant execution: A technique for efficient fault tolerance in chip multiprocessors.
Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
2010Multithreaded code from synchronous programs: Extracting independent threads for OpenMP.
Daniel Baudisch, Jens Brandt, Klaus Schneider
2010NBTI modeling in the framework of temperature variation.
Seyab, Said Hamdioui
2010NIM- a noise index model to estimate delay discrepancies between silicon and simulation.
Elif Alpaslan, Jennifer Dworak, Bram Kruseman, Ananta K. Majhi, Wilmar M. Heuvelman, Paul van de Wiel
2010Nanoelectronics challenges for the 21
Dimitri A. Antoniadis
2010Non-intrusive virtualization management using libvirt.
Matthias Bolte, Michael Sievers, Georg Birkenheuer, Oliver Niehörster, André Brinkmann
2010Non-invasive blood oxygen saturation monitoring for neonates using reflectance pulse oximeter.
Wei Chen, Idowu Ayoola, Sidarto Bambang-Oetomo, Loe M. G. Feijs
2010Non-linear Operating Point Statistical Analysis for Local Variations in logic timing at low voltage.
Rahul Rithe, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha P. Chandrakasan
2010Novel Physical Unclonable Function with process and environmental variations.
Xiaoxiao Wang, Mohammad Tehranipoor
2010On passivity of the super node algorithm for EM modeling of interconnect systems.
Maria V. Ugryumova, Wil H. A. Schilders
2010On reset based functional broadside tests.
Irith Pomeranz, Sudhakar M. Reddy
2010On signalling over Through-Silicon Via (TSV) interconnects in 3-D Integrated Circuits.
Roshan Weerasekera, Matt Grange, Dinesh Pamunuwa, Hannu Tenhunen
2010On the construction of guaranteed passive macromodels for high-speed channels.
Alessandro Chinea, Stefano Grivet-Talocia, Dirk Deschrijver, Tom Dhaene, Luc Knockaert
2010On the efficacy of write-assist techniques in low voltage nanoscale SRAMs.
Vikas Chandra, Cezary Pietrzyk, Robert C. Aitken
2010Optimal regulation of traffic flows in networks-on-chip.
Fahimeh Jafari, Zhonghai Lu, Axel Jantsch, Mohammad Hossien Yaghmaee
2010Optimization of FIR filter to improve eye diagram for general transmission line systems.
Yung-Shou Cheng, Yen-Cheng Lai, Ruey-Beei Wu
2010Optimization of an on-chip active cooling system based on thin-film thermoelectric coolers.
Jieyi Long, Seda Ogrenci Memik, Matthew Grayson
2010Optimization of the bias current network for accurate on-chip thermal monitoring.
Jieyi Long, Seda Ogrenci Memik
2010Optimize your power and performance yields and regain those sleepless nights.
Krisztián Flautner
2010Optimized self-tuning for circuit aging.
Evelyn Mintarno, Joëlle Skaf, Rui Zheng, Jyothi Velamala, Yu Cao, Stephen P. Boyd, Robert W. Dutton, Subhasish Mitra
2010Optimizing Data-Flow Graphs with min/max, adding and relational operations.
Jesús M. Pérez, Pablo Sánchez, Víctor Fernández
2010Optimizing equivalence checking for behavioral synthesis.
Kecheng Hao, Fei Xie, Sandip Ray, Jin Yang
2010Optimizing the power delivery network in dynamically voltage scaled systems with uncertain power mode transition times.
Hwisung Jung, Massoud Pedram
2010PM-COSYN: PE and memory co-synthesis for MPSoCs.
Yi-Jung Chen, Chia-Lin Yang, Po-Han Wang
2010Panel 6.8: The challenges of heterogeneous multicore debug.
Grant Martin, Albrecht Mayer
2010Panel Session - Who Is Closing the embedded software design gap?
Wolfgang Ecker, Pierre Bricaud, Rainer Dömer, Yossi Veller, Stefan Heinen, Jürgen Mössinger, Andreas von Schwerin
2010Panel session - great challenges in nanoelectronics and impact on academic research: More than Moore or Beyond CMOS?
R. De Keersmaeker, Michael L. Roukes, D. Antoinadis, Hugo De Man, George Bourianoff, Michel Brillouët, Lars Samuelson
2010Panel: First commandment at least, do nothing well!
Marco Casale-Rossi, Giovanni De Micheli, Antun Domic, Enrico Macii, Piero Perlo, Andreas Wild, Roberto Zafalon
2010Panel: Reliability of data centers: Hardware vs. software.
Mehdi Baradaran Tahoori, Ishwar Parulkar, Dan Alexandrescu, Kevin Granlund, Allan Silburt, Bapi Vinnakota
2010Parallel X-fault simulation with critical path tracing technique.
Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman
2010Parallel simulation of systemC TLM 2.0 compliant MPSoC on SMP workstations.
Aline Mello, Isaac Maia, Alain Greiner, François Pêcheux
2010Parallel subdivision surface rendering and animation on the Cell BE processor.
R. Grottesi, Serena Morigi, Martino Ruggiero, Luca Benini
2010Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs.
Jun Zhu, Ingo Sander, Axel Jantsch
2010Partitioning and allocation of scratch-pad memory for priority-based preemptive multi-task systems.
Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada
2010Passive reduced order modeling of multiport interconnects via semidefinite programming.
Zohaib Mahmood, Bradley N. Bond, Tarek Moselhy, Alexandre Megretski, Luca Daniel
2010Path-based scheduling in a hardware compiler.
Ruirui Gu, Alessandro Forin, Richard Neil Pittman
2010Performance-asymmetry-aware topology virtualization for defect-tolerant NoC-based many-core processors.
Lei Zhang, Yue Yu, Jianbo Dong, Yinhe Han, Shangping Ren, Xiaowei Li
2010PhoenixSim: A simulator for physical-layer analysis of chip-scale photonic interconnection networks.
Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, Keren Bergman, Luca P. Carloni
2010Post-placement temperature reduction techniques.
Wei Liu, Alberto Nannarelli, Andrea Calimera, Enrico Macii, Massimo Poncino
2010Power Variance Analysis breaks a masked ASIC implementation of AES.
Yang Li, Kazuo Sakiyama, Lejla Batina, Daisuke Nakatsu, Kazuo Ohta
2010Power consumption of logic circuits in ambipolar carbon nanotube technology.
M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De Micheli
2010Power efficient voltage islanding for Systems-on-chip from a floorplanning perspective.
Pavel Ghosh, Arunabha Sen
2010Power gating design for standard-cell-like structured ASICs.
Sin-Yu Chen, Rung-Bin Lin, Hui-Hsiang Tung, Kuen-Wey Lin
2010Power-accuracy tradeoffs in human activity transition detection.
Jeffrey Boyd, Hari Sundaram, Aviral Shrivastava
2010Practical Monte-Carlo based timing yield estimation of digital circuits.
Javid Jaffari, Mohab Anis
2010Predicting energy and performance overhead of Real-Time Operating Systems.
Sandro Penolazzi, Ingo Sander, Ahmed Hemani
2010Proactive NBTI mitigation for busy functional units in out-of-order microprocessors.
Lin Li, Youtao Zhang, Jun Yang, Jianhua Zhao
2010Process variation and temperature-aware reliability management.
Cheng Zhuo, Dennis Sylvester, David T. Blaauw
2010Programmable aging sensor for automotive safety-critical applications.
Julio César Vázquez, Víctor H. Champac, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira
2010Properties of and improvements to time-domain dynamic thermal analysis algorithms.
Xi Chen, Robert P. Dick, Li Shang
2010Pseudo-CMOS: A novel design style for flexible electronics.
Tsung-Ching Huang, Kenjiro Fukuda, Chun-Ming Lo, Yung-Hui Yeh, Tsuyoshi Sekitani, Takao Someya, Kwang-Ting Cheng
2010RALF: Reliability Analysis for Logic Faults - An exact algorithm and its applications.
Samuel B. Luckenbill, Ju-Yueh Lee, Yu Hu, Rupak Majumdar, Lei He
2010RMOT: Recursion in model order for task execution time estimation in a software pipeline.
Nabeel Iqbal, Muhammad Adnan Siddique, Jörg Henkel
2010RTOS-aware refinement for TLM2.0-based HW/SW designs.
Markus Becker, Giuseppe Di Guglielmo, Franco Fummi, Wolfgang Müller, Graziano Pravadelli, Tao Xie
2010Rapid runtime estimation methods for pipelined MPSoCs.
Haris Javaid, Andhi Janapsatya, Mohammad Shihabul Haque, Sri Parameswaran
2010Recursion-driven parallel code generation for multi-core platforms.
Rebecca L. Collins, Bharadwaj Vellore, Luca P. Carloni
2010Reducing the storage requirements of a test sequence by using a background vector.
Irith Pomeranz, Sudhakar M. Reddy
2010Reliability- and process variation-aware placement for FPGAs.
Assem A. M. Bsoul, Naraig Manjikian, Li Shang
2010Retiming multi-rate DSP algorithms to meet real-time requirement.
Xue-Yang Zhu
2010Reuse-aware modulo scheduling for stream processors.
Li Wang, Jingling Xue, Xuejun Yang
2010Reversible logic synthesis through ant colony optimization.
Min Li, Yexin Zheng, Michael S. Hsiao, Chao Huang
2010Robust design of embedded systems.
Martin Lukasiewycz, Michael Glaß, Jürgen Teich
2010Run-time spatial resource management for real-time applications on heterogeneous MPSoCs.
Timon D. ter Braak, Philip K. F. Hölzenspies, Jan Kuper, Johann L. Hurink, Gerard J. M. Smit
2010RunAssert: A non-intrusive run-time assertion for parallel programs debugging.
Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen, Tay-Jyi Lin
2010SAT based multi-net rip-up-and-reroute for manufacturing hotspot removal.
Fan Yang, Yici Cai, Qiang Zhou, Jiang Hu
2010SCOC3: a space computer on a chip.
Franck Koebel, Jean-François Coldefy
2010Scalable codeword generation for coupled buses.
Kedar Karmarkar, Spyros Tragoudas
2010Scalable stochastic processors.
Sriram Narayanan, John Sartori, Rakesh Kumar, Douglas L. Jones
2010Scan based methodology for reliable state retention power gating designs.
Sheng Yang, Bashir M. Al-Hashimi, David Flynn, S. Saqib Khursheed
2010Scenario extraction for a refined timing-analysis of automotive network topologies.
Matthias Traub, Thilo Streichert, Oleg Krasovytskyy, Jürgen Becker
2010Scenario-based analysis and synthesis of real-time systems using uppaal.
Kim Guldstrand Larsen, Shuhao Li, Brian Nielsen, Saulius Pusinskas
2010Scheduling and energy-distortion tradeoffs with operational refinement of image processing.
Davide Anastasia, Yiannis Andreopoulos
2010Scheduling for energy efficiency and fault tolerance in hard real-time systems.
Yu Liu, Han Liang, Kaijie Wu
2010Scoped identifiers for efficient bit aligned logging.
Roy Shea, Mani B. Srivastava, Young Cho
2010Security aspects in 6lowPan networks.
Ron Barker
2010SigNet: Network-on-chip filtering for coarse vector directories.
Natalie D. Enright Jerger
2010SimTag: Exploiting tag bits similarity to improve the reliability of the data caches.
Jesung Kim, Soontae Kim, Yebin Lee
2010Simulation-based verification of the MOST NetInterface specification revision 3.0.
Andreas Braun, Oliver Bringmann, Djones Lettnin, Wolfgang Rosenstiel
2010Simultaneous budget and buffer size computation for throughput-constrained task graphs.
Maarten Wiggers, Marco Bekooij, Marc Geilen, Twan Basten
2010Skewed pipelining for parallel simulink simulations.
Arquimedes Canedo, Takeo Yoshizawa, Hideaki Komatsu
2010Soft error-aware design optimization of low power and time-constrained embedded systems.
Rishad A. Shafik, Bashir M. Al-Hashimi, Krishnendu Chakrabarty
2010Spinto: High-performance energy minimization in spin glasses.
Héctor J. García, Igor L. Markov
2010Spintronic memristor devices and application.
Xiaobin Wang, Yiran Chen
2010Static and dynamic stability improvement strategies for 6T CMOS low-power SRAMs.
Bartomeu Alorda, Gabriel Torrens, Sebastià A. Bota, Jaume Segura
2010Statistical SRAM analysis for yield enhancement.
Paul Zuber, Miguel Miranda, Petr Dobrovolný, Koen van der Zanden, Jong-Hoon Jung
2010Statistical static timing analysis using Markov chain Monte Carlo.
Yashodhan Kanoria, Subhasish Mitra, Andrea Montanari
2010Stretching the limits of FPGA SerDes for enhanced ATE performance.
A. M. Majid, David C. Keezer
2010Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller.
Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen
2010TIMBER: Time borrowing and error relaying for online timing error resilience.
Mihir R. Choudhury, Vikas Chandra, Kartik Mohanram, Robert C. Aitken
2010TLM+ modeling of embedded HW/SW systems.
Wolfgang Ecker, Volkan Esen, Robert Schwencker, Thomas Steininger, Michael Velten
2010TSV redundancy: Architecture and design issues in 3D IC.
Ang-Chih Hsieh, TingTing Hwang, Ming-Tung Chang, Min-Hsiu Tsai, Chih-Mou Tseng, Hung-Chun Li
2010Taming the component timing: A CBD methodology for real-time embedded systems.
Manoj G. Dixit, Pallab Dasgupta, S. Ramesh
2010Temperature-aware dynamic resource provisioning in a power-optimized datacenter.
Ehsan Pakbaznia, Mohammad Ghasemazar, Massoud Pedram
2010Temperature-aware idle time distribution for energy optimization with dynamic voltage scaling.
Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
2010Test front loading in early stages of automotive software development based on AUTOSAR.
Alexander Michailidis, Uwe Spieth, Thomas Ringler, Bernd Hedenetz, Stefan Kowalewski
2010Testing TSV-based three-dimensional stacked ICs.
Erik Jan Marinissen
2010The road to energy-efficient systems: From hardware-driven to software-defined.
Gerhard P. Fettweis
2010The split register file.
Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera
2010Throughput modeling to evaluate process merging transformations in polyhedral process networks.
Sjoerd Meijer, Hristo Nikolov, Todor P. Stefanov
2010Tighter integration of BDDs and SMT for Predicate Abstraction.
Alessandro Cimatti, Anders Franzén, Alberto Griggio, Krishnamani Kalyanasundaram, Marco Roveri
2010Timing modeling and analysis for AUTOSAR-based software development - a case study.
Kay Klobedanz, Christoph Kuznik, Andreas Thuy, Wolfgang Müller
2010Timing modeling for digital sub-threshold circuits.
Niklas Lotze, Jacob Göppert, Yiannos Manoli
2010Toward optimized code generation through model-based optimization.
Asma Charfi, Chokri Mraidha, Sébastien Gérard, François Terrier, Pierre Boulet
2010Towards a chip level reliability simulator for copper/low-k backend processes.
Muhammad Bashir, Linda S. Milor
2010Towards assertion-based verification of heterogeneous system designs.
Stefan Lämmermann, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Alexander Viehl, Alexander Jesser, Lars Hedrich
2010Towards hardware stereoscopic 3D reconstruction a real-time FPGA computation of the disparity map.
Stavros Hadjitheophanous, Christos Ttofis, Athinodoros S. Georghiades, Theocharis Theocharides
2010Trace-based KPN composability analysis for mapping simultaneous applications to MPSoC platforms.
Jerónimo Castrillón, Ricardo Velasquez, Anastasia Stulova, Weihua Sheng, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2010Transition-aware real-time task scheduling for reconfigurable embedded systems.
Hessam Kooti, Elaheh Bozorgzadeh, Shenghui Liao, Lichun Bao
2010Transmitting TLM transactions over analogue wire models.
Stephan Schulz, Jörg Becker, Thomas Uhle, Karsten Einwich, Sören Sonntag
2010UML design for dynamically reconfigurable multiprocessor embedded systems.
Jorgiano Vidal, Florent de Lamotte, Guy Gogniat, Jean-Philippe Diguet, Philippe Soulard
2010Ultra low-power 12-bit SAR ADC for RFID applications.
Daniela De Venuto, Eduard F. Stikvoort, David Tio Castro, Youri Ponomarev
2010Ultra-high throughput string matching for Deep Packet Inspection.
Alan Kennedy, Xiaojun Wang, Zhen Liu, Bin Liu
2010Ultra-low power mixed-signal design platform using subthreshold source-coupled circuits.
Armin Tajalli, Yusuf Leblebici
2010Using Speculative Functional Units in high level synthesis.
Alberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Román Hermida, Seda Ogrenci Memik
2010Using Transaction Level Modeling techniques for wireless sensor network simulation.
Markus Damm, Javier Moreno, Jan Haase, Christoph Grimm
2010Using filesystem virtualization to avoid metadata bottlenecks.
Ernest Artiaga, Toni Cortes
2010VAPRES: A Virtual Architecture for Partially Reconfigurable Embedded Systems.
Abelardo Jara-Berrocal, Ann Gordon-Ross
2010Vacuity analysis for property qualification by mutation of checkers.
Luigi Di Guglielmo, Franco Fummi, Graziano Pravadelli
2010Variability-aware reliability simulation of mixed-signal ICs with quasi-linear complexity.
Elie Maricau, Georges G. E. Gielen
2010Variation-aware interconnect extraction using statistical moment preserving model order reduction.
Tarek A. El-Moselhy, Luca Daniel
2010Verifying UML/OCL models using Boolean satisfiability.
Mathias Soeken, Robert Wille, Mirco Kuhlmann, Martin Gogolla, Rolf Drechsler
2010Vision for cross-layer optimization to address the dual challenges of energy and reliability.
André DeHon, Heather M. Quinn, Nicholas P. Carter
2010Why design must change: Rethinking digital design.
Mark Horowitz
2010Wireless communication - successful differentiation on standard technology by innovation.
Hermann Eul
2010Worst case delay analysis for memory interference in multicore systems.
Rodolfo Pellizzoni, Andreas Schranzhofer, Jian-Jia Chen, Marco Caccamo, Lothar Thiele
2010Worst-case end-to-end delay analysis of an avionics AFDX network.
Henri Bauer, Jean-Luc Scharbarg, Christian Fraboul
2010enBudget: A Run-Time Adaptive Predictive Energy-Budgeting scheme for energy-aware Motion Estimation in H.264/MPEG-4 AVC video encoder.
Muhammad Shafique, Lars Bauer, Jörg Henkel
2010pSHS: A scalable parallel software implementation of Montgomery multiplication for multicore systems.
Zhimin Chen, Patrick Schaumont