DATE A

318 papers

YearTitle / Authors
2009A MEMS reconfigurable quad-band Class-E Power Amplifier for GSM standard.
Luca Larcher, Riccardo Brama, Marcello Ganzerli, Jacopo Iannacci, Marco Bedani, Antonio Gnudi
2009A MILP-based approach to path sensitization of embedded software.
José C. Costa, José C. Monteiro
2009A UML frontend for IP-XACT-based IP management.
Tim Schattkowsky, Tao Xie, Wolfgang Müller
2009A case for multi-channel memories in video recording.
Eero Aho, Jari Nikara, Petri A. Tuominen, Kimmo Kuusilinna
2009A case study in distributed deployment of embedded software for camera networks.
Francesco Leonardi, Alessandro Pinto, Luca P. Carloni
2009A co-design approach for embedded system modeling and code generation with UML and MARTE.
Jorgiano Vidal, Florent de Lamotte, Guy Gogniat, Philippe Soulard, Jean-Philippe Diguet
2009A design methodology for fully reconfigurable Delta-Sigma data converters.
Yi Ke, Jan Craninckx, Georges G. E. Gielen
2009A diagnosis algorithm for extreme space compaction.
Stefan Holst, Hans-Joachim Wunderlich
2009A file-system-aware FTL design for flash-memory storage systems.
Po-Liang Wu, Yuan-Hao Chang, Tei-Wei Kuo
2009A flexible floating-point wavelet transform and wavelet packet processor.
Andre Guntoro, Manfred Glesner
2009A flexible layered architecture for accurate digital baseband algorithm development and verification.
Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn
2009A formal approach for specification-driven AMS behavioral model generation.
Subhankar Mukherjee, Antara Ain, Subrat Kumar Panda, Rajdeep Mukhopadhyay, Pallab Dasgupta
2009A formal approach to design space exploration of protocol converters.
Karin Avnit, Arcot Sowmya
2009A generalized scheduling approach for dynamic dataflow applications.
William Plishker, Nimish Sane, Shuvra S. Bhattacharyya
2009A generic architecture of CCSDS Low Density Parity Check decoder for near-earth applications.
Fabien Demangel, Nicolas Fau, Nicolas Drabik, François Charot, Christophe Wolinski
2009A generic framework for scan capture power reduction in fixed-length symbol-based test compression environment.
Xiao Liu, Qiang Xu
2009A generic platform for estimation of multi-threaded program performance on heterogeneous multiprocessors.
Aryabartta Sahu, M. Balakrishnan, Preeti Ranjan Panda
2009A graph grammar based approach to automated multi-objective analog circuit design.
Angan Das, Ranga Vemuri
2009A high performance reconfigurable Motion Estimation hardware architecture.
Ozgur Tasdizen, Halil Kukner, Abdulkadir Akin, Ilker Hamzaoglu
2009A high-level debug environment for communication-centric debug.
Kees Goossens, Bart Vermeulen, Ashkan Beyranvand Nejad
2009A highly resilient routing algorithm for fault-tolerant NoCs.
David Fick, Andrew DeOrio, Gregory K. Chen, Valeria Bertacco, Dennis Sylvester, David T. Blaauw
2009A hybrid packet-circuit switched on-chip network based on SDM.
Mehdi Modarressi, Hamid Sarbazi-Azad, Mohammad Arjomand
2009A link arbitration scheme for quality of service in a latency-optimized network-on-chip.
Jonas Diemer, Rolf Ernst
2009A loopback-based INL test method for D/A and A/D converters employing a stimulus identification technique.
Esa Korhonen, Juha Kostamovaara
2009A low-cost SEE mitigation solution for soft-processors embedded in Systems on Pogrammable Chips.
Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis
2009A low-power ASIP for IEEE 802.15.4a ultra-wideband impulse radio baseband processing.
Christian Bachmann, Andreas Genser, Jos Hulzink, Mladen Berekovic, Christian Steger
2009A low-power fat tree-based optical Network-On-Chip for multiprocessor system-on-chip.
Huaxi Gu, Jiang Xu, Wei Zhang
2009A monitor interconnect and support subsystem for multicore processors.
Sailaja Madduri, Ramakrishna Vadlamani, Wayne P. Burleson, Russell Tessier
2009A new design-for-test technique for SRAM core-cell stability faults.
Alexandre Ney, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian, Vincent Gouin
2009A new speculative addition architecture suitable for two's complement operations.
Alessandro Cilardo
2009A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context.
Anselme Vignon, Stefan Cosemans, Wim Dehaene, Pol Marchal, Marco Facchini
2009A novel LDPC decoder for DVB-S2 IP.
Stefan Müller, Manuel Schreger, Marten Kabutz, Matthias Alles, Frank Kienle, Norbert Wehn
2009A novel approach to entirely integrate Virtual Test into test development flow.
Ping Lu, Daniel Glaser, Gürkan Uygur, Klaus Helmreich
2009A novel self-healing methodology for RF Amplifier circuits based on oscillation principles.
Abhilash Goyal, Madhavan Swaminathan, Abhijit Chatterjee
2009A parallel approach for high performance hardware design of intra prediction in H.264/AVC Video Codec.
Muhammad Shafique, Lars Bauer, Jörg Henkel
2009A physical-location-aware X-filling method for IR-drop reduction in at-speed scan test.
Wen-Wen Hsieh, I-Sheng Lin, TingTing Hwang
2009A power-efficient migration mechanism for D-NUCA caches.
Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete
2009A real-time application design methodology for MPSoCs.
Giovanni Beltrame, Luca Fossati, Donatella Sciuto
2009A scalable method for the generation of small test sets.
Santiago Remersaro, Janusz Rajski, Sudhakar M. Reddy, Irith Pomeranz
2009A self-adaptive system architecture to address transistor aging.
Omer Khan, Sandip Kundu
2009A set-based mapping strategy for flash-memory reliability enhancement.
Yuan-Sheng Chu, Jen-Wei Hsieh, Yuan-Hao Chang, Tei-Wei Kuo
2009A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs.
Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Soudris
2009A study of the Single Event Effects impact on functional mapping within Flash-based FPGAs.
Francesco Abate, Luca Sterpone, Massimo Violante, Fernanda Lima Kastensmidt
2009A study on placement of post silicon clock tuning buffers for mitigating impact of process variation.
Kelageri Nagaraj, Sandip Kundu
2009A unified online Fault Detection scheme via checking of Stability Violation.
Guihai Yan, Yinhe Han, Xiaowei Li
2009ASIP-based flexible MMSE-IC Linear Equalizer for MIMO turbo-equalization applications.
Atif Raza Jafri, Daoud Karakolah, Amer Baghdadi, Michel Jézéquel
2009Accelerating FPGA-based emulation of quasi-cyclic LDPC codes with vector processing.
Xiaoheng Chen, Jingyu Kang, Shu Lin, Venkatesh Akella
2009Adaptive idleness distribution for non-uniform aging tolerance in MultiProcessor Systems-on-Chip.
Francesco Paterna, Luca Benini, Andrea Acquaviva, Francesco Papariello, Giuseppe Desoli, Mauro Olivieri
2009Adaptive prefetching for shared cache based chip multiprocessors.
Mahmut T. Kandemir, Yuanrui Zhang, Ozcan Ozturk
2009Aelite: A flit-synchronous Network on Chip with composable and predictable services.
Andreas Hansson, Mahesh Subburaman, Kees Goossens
2009Aircraft integration real-time simulator modeling with AADL for architecture tradeoffs.
Jean Casteres, Tovo Ramaherirariny
2009Algebraic techniques to enhance common sub-expression elimination for polynomial system synthesis.
Sivaram Gopalakrishnan, Priyank Kalla
2009Algorithm-architecture co-design of soft-output ML MIMO detector for parallel application specific instruction set processors.
Min Li, Robert Fasthuber, David Novo, Bruno Bougard, Liesbet Van der Perre, Francky Catthoor
2009Algorithms for the automatic extension of an instruction-set.
Carlo Galuzzi, Dimitris Theodoropoulos, Roel Meeuws, Koen Bertels
2009An ILP formulation for task mapping and scheduling on multi-core architectures.
Ying Yi, Wei Han, Xin Zhao, Ahmet T. Erdogan, Tughrul Arslan
2009An MDE methodology for the development of high-integrity real-time systems.
Silvia Mazzini, Stefano Puri, Tullio Vardanega
2009An accurate interconnect thermal model using equivalent transmission line circuit.
Baohua Wang, Pinaki Mazumder
2009An approach to linear model-based testing for nonlinear cascaded mixed-signal systems.
Reik Müller, Carsten Wegener, Hans-Joachim Jentschel, Sebastian Sattler, Heinz Mattes
2009An approximation scheme for energy-efficient scheduling of real-time tasks in heterogeneous multiprocessor systems.
Chuan-Yue Yang, Jian-Jia Chen, Tei-Wei Kuo, Lothar Thiele
2009An architecture for secure software defined radio.
Chunxiao Li, Anand Raghunathan, Niraj K. Jha
2009An automated design flow for vibration-based energy harvester systems.
Leran Wang, Tom J. Kazmierski, Bashir M. Al-Hashimi, Stephen P. Beeby, Dibin Zhu
2009An automated flow for integrating hardware IP into the automotive systems engineering process.
Jan-Hendrik Oetjens, Ralph Görgen, Joachim Gerlach, Wolfgang Nebel
2009An efficent dynamic multicast routing protocol for distributing traffic in NOCs.
Masoumeh Ebrahimi, Masoud Daneshtalab, Mohammad Hossein Neishaburi, Siamak Mohammadi, Ali Afzali-Kusha, Juha Plosila, Hannu Tenhunen
2009An efficient and deterministic multi-tasking run-time environment for Ada and the Ravenscar profile on the Atmel AVR®32 UC3 microcontroller.
Kristoffer Nyborg Gregertsen, Amund Skavhaug
2009An efficient decoupling capacitance optimization using piecewise polynomial models.
Xiaoyi Wang, Yici Cai, Sheldon X.-D. Tan, Xianlong Hong, Jacob Relles
2009An efficient path-oriented bitvector encoding width computation algorithm for bit-precise verification.
Nannan He, Michael S. Hsiao
2009An event-guided approach to reducing voltage noise in processors.
Meeta Sharma Gupta, Vijay Janapa Reddi, Glenn H. Holloway, Gu-Yeon Wei, David M. Brooks
2009An overview of non-volatile memory technology and the implication for tools and architectures.
Hai Li, Yiran Chen
2009Analog layout synthesis - Recent advances in topological approaches.
Helmut Gräb, Florin Balasa, Rafael Castro-López, Yu-Wei Chang, Francisco V. Fernández, Mark Po-Hung Lin, Martin Strasser
2009Analogue mixed signal simulation using spice and SystemC.
Tobias Kirchner, Nico Bannow, Christoph Grimm
2009Analysis and optimization of NBTI induced clock skew in gated clock trees.
Ashutosh Chakraborty, Gokul Ganesan, Anand Rajaram, David Z. Pan
2009Analysis and optimization of fault-tolerant embedded systems with hardened processors.
Viacheslav Izosimov, Ilia Polian, Paul Pop, Petru Eles, Zebo Peng
2009Analyzing the impact of process variations on parametric measurements: Novel models and applications.
Sherief Reda, Sani R. Nassif
2009Application specific performance indicators for quantitative evaluation of the timing behavior for embedded real-time systems.
Frank König, Dave Boers, Frank Slomka, Ulrich Margull, Michael Niemetz, Gerhard Wirrer
2009Architectural support for low overhead detection of memory violations.
Saugata Ghose, Latoya Gilgeous, Polina Dudnik, Aneesh Aggarwal, Corey Waxman
2009Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints.
Daniele Ludovici, Francisco Gilabert Villamón, Simone Medardoni, Crispín Gómez Requena, María Engracia Gómez, Pedro López, Georgi Nedeltchev Gaydadjiev, Davide Bertozzi
2009Automated data analysis solutions to silicon debug.
Yu-Shen Yang, Nicola Nicolici, Andreas G. Veneris
2009Automated synthesis of streaming C applications to process networks in hardware.
Sven van Haastregt, Bart Kienhuis
2009Automatic generation of streaming datapaths for arbitrary fixed permutations.
Peter A. Milder, James C. Hoe, Markus Püschel
2009Automatically mapping applications to a self-reconfiguring platform.
Karel Bruneel, Fatma Abouelella, Dirk Stroobandt
2009Bitstream relocation with local clock domains for partially reconfigurable FPGAs.
Adam Flynn, Ann Gordon-Ross, Alan D. George
2009Buffer minimization of real-time streaming applications scheduling on hybrid CPU/FPGA architectures.
Jun Zhu, Ingo Sander, Axel Jantsch
2009CAN+: A new backward-compatible Controller Area Network (CAN) protocol with up to 16× higher data rates.
Tobias Ziermann, Stefan Wildermann, Jürgen Teich
2009CUFFS: An instruction count based architectural framework for security of MPSoCs.
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
2009Cache aware compression for processor debug support.
Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishnan
2009Caspar: Hardware patching for multicore processors.
Ilya Wagner, Valeria Bertacco
2009Co-design of signal, power, and thermal distribution networks for 3D ICs.
Young-Joon Lee, Yoon Jo Kim, Gang Huang, Muhannad S. Bakir, Yogendra K. Joshi, Andrei G. Fedorov, Sung Kyu Lim
2009Co-simulation based platform for wireless protocols design explorations.
Alain Fourmigue, Bruno Girodias, Gabriela Nicolescu, El Mostapha Aboulhamid
2009Combined system synthesis and communication architecture exploration for MPSoCs.
Martin Lukasiewycz, Martin Streubühr, Michael Glaß, Christian Haubelt, Jürgen Teich
2009Communication minimization for in-network processing in body sensor networks: A buffer assignment technique.
Hassan Ghasemzadeh, Nisha Jain, Marco Sgroi, Roozbeh Jafari
2009Componentizing hardware/software interface design.
Kecheng Hao, Fei Xie
2009Computation of IP3 using single-tone moments analysis.
Dani Tannir, Roni Khazaka
2009Configurable links for runtime adaptive on-chip communication.
Mohammad Abdullah Al Faruque, Thomas Ebi, Jörg Henkel
2009Contactless testing: Possibility or pipe-dream?
Erik Jan Marinissen, Dae Young Lee, John P. Hayes, Chris Sellathamby, Brian Moore, Steven Slupsky, Laurence Pujol
2009Correct-by-construction generation of device drivers based on RTL testbenches.
Nicola Bombieri, Franco Fummi, Graziano Pravadelli, Sara Vinco
2009Cross-architectural design space exploration tool for reconfigurable processors.
Lars Bauer, Muhammad Shafique, Jörg Henkel
2009Cross-contamination avoidance for droplet routing in digital microfluidic biochips.
Yang Zhao, Krishnendu Chakrabarty
2009Cross-coupling in 65nm fully integrated EDGE System On Chip Design and cross-coupling prevention of complex 65nm SoC.
Pierre-Henri Bonnaud, Grit Sommer
2009Customizing IP cores for system-on-chip designs using extensive external don't-cares.
Kai-Hui Chang, Valeria Bertacco, Igor L. Markov
2009DPR in high energy physics.
Wenxue Gao, Andreas Kugel, Reinhard Männer, Norbert Abel, Nick Meier, Udo Kebschull
2009Debugging of Toffoli networks.
Robert Wille, Daniel Große, Stefan Frehse, Gerhard W. Dueck, Rolf Drechsler
2009Decoupling capacitor planning with analytical delay model on RLC power grid.
Ye Tao, Sung Kyu Lim
2009Defect-aware logic mapping for nanowire-based programmable logic arrays via satisfiability.
Yexin Zheng, Chao Huang
2009Design and implementation of a database filter for BLAST acceleration.
Panagiotis Afratis, Constantinos Galanakis, Euripides Sotiriades, Georgios-Grigorios Mplemenos, Grigorios Chrysos, Ioannis Papaefstathiou, Dionisios N. Pnevmatikatos
2009Design and implementation of scalable, transparent threads for multi-core media processor.
Takeshi Kodaka, Shunsuke Sasaki, Takahiro Tokuyoshi, Ryuichiro Ohyama, Nobuhiro Nonogaki, Koji Kitayama, Tatsuya Mori, Yasuyuki Ueda, Hideho Arakida, Yuji Okuda, Toshiki Kizu, Yoshiro Tsuboi, Nobu Matsumoto
2009Design as you see FIT: System-level soft error analysis of sequential circuits.
Daniel E. Holcomb, Wenchao Li, Sanjit A. Seshia
2009Design of an application-specific instruction set processor for high-throughput and scalable FFT.
Xuan Guan, Hai Lin, Yunsi Fei
2009Design of compact imperfection-immune CNFET layouts for standard-cell-based logic synthesis.
Shashikanth Bobba, Jie Zhang, Antonio Pullini, David Atienza, Giovanni De Micheli
2009Design optimizations to improve placeability of partial reconfiguration modules.
Markus Koester, Wayne Luk, Jens Hagemeyer, Mario Porrmann
2009Design, Automation and Test in Europe, DATE 2009, Nice, France, April 20-24, 2009
Luca Benini, Giovanni De Micheli, Bashir M. Al-Hashimi, Wolfgang Müller
2009Detecting errors using multi-cycle invariance information.
Nuno Alves, Kundan Nepal, Jennifer Dworak, R. Iris Bahar
2009Digital design at a crossroads How to make statistical design methodologies industrially relevant.
Ulf Schlichtmann, Manuel Schmidt, Harald Kinzelbach, Michael Pronath, Volker Glöckel, Manfred Dietrich, Uwe Eichler, Joachim Haase
2009Dimensioning heterogeneous MPSoCs via parallelism analysis.
Bastian Ristau, Torsten Limberg, Oliver Arnold, Gerhard P. Fettweis
2009Distributed peak power management for many-core architectures.
John Sartori, Rakesh Kumar
2009Distributed sensor for steering wheel rip force measurement in driver fatigue detection.
Federico Baronti, Francesco Lenzi, Roberto Roncella, Roberto Saletti
2009Dynamic and distributed frequency assignment for energy and latency constrained MP-SoC.
Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres
2009Dynamic thermal management in 3D multicore architectures.
Ayse K. Coskun, José L. Ayala, David Atienza, Tajana Simunic Rosing, Yusuf Leblebici
2009EMC-aware design on a microcontroller for automotive applications.
Patrice Joubert Doriol, Yamarita Villavicencio, Cristiano Forzan, Mario Rotigni, Giovanni Graziosi, Davide Pandini
2009Effectiveness of adaptive supply voltage and body bias as post-silicon variability compensation techniques for full-swing and low-swing on-chip communication channels.
Giacomo Paci, Davide Bertozzi, Luca Benini
2009Efficient OpenMP support and extensions for MPSoCs with explicitly managed memory hierarchy.
Andrea Marongiu, Luca Benini
2009Efficient and accurate method for intra-gate defect diagnoses in nanometer technology and volume data.
Aymen Ladhar, Mohamed Masmoudi, Laroussi Bouzaida
2009Efficient compression and handling of current source model library waveforms.
Safar Hatami, Peter Feldmann, Soroush Abbaspour, Massoud Pedram
2009Efficient constant-time entropy decoding for H.264.
Nabeel Iqbal, Jörg Henkel
2009Efficient reliability simulation of analog ICs including variability and time-varying stress.
Elie Maricau, Georges G. E. Gielen
2009Embedded systems design - Scientific challenges and work directions.
Joseph Sifakis
2009Embedded tutorial - Understanding multicore technologies.
Ahmed Amine Jerraya, Gabriela Nicolescu
2009Enabling concurrent clock and power gating in an industrial design flow.
Letícia Maria Veiras Bolzani, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino
2009Energy efficient multiprocessor task scheduling under input-dependent variation.
Jason Cong, Karthik Gururaj
2009Energy minimization for real-time systems with non-convex and discrete operation modes.
Foad Dabiri, Alireza Vahdatpour, Miodrag Potkonjak, Majid Sarrafzadeh
2009Energy-efficient spatially-adaptive clustering and routing in wireless sensor networks.
Hengyu Long, Yongpan Liu, Xiaoguang Fan, Robert P. Dick, Huazhong Yang
2009Enhanced design of filterless class-D audio amplifier.
Chun Wei Lin, Bing-Shiun Hsieh, Yu Cheng Lin
2009Enhancing correlation electromagnetic attack using planar near-field cartography.
Denis Réal, Frédéric Valette, M'hamed Drissi
2009Enrichment of limited training sets in machine-learning-based analog/RF test.
Haralampos-G. D. Stratigopoulos, Salvador Mir, Yiorgos Makris
2009Error correction in single-hop wireless sensor networks - A case study.
Daniel Schmidt, Matthias Berning, Norbert Wehn
2009Evaluating UML2 modeling of IP-XACT objects for automatic MP-SoC integration onto FPGA.
Tero Arpinen, Tapio Koskinen, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen
2009Evaluation on FPGA of triple rail logic robustness against DPA and DEMA.
Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans
2009Exploiting clock skew scheduling for FPGA.
Sungmin Bae, Prasanth Mangalagiri, Narayanan Vijaykrishnan
2009Exploiting narrow-width values for thermal-aware register file designs.
Shuai Wang, Jie S. Hu, Sotirios G. Ziavras, Sung Woo Chung
2009Exploiting structure in an AIG based QBF solver.
Florian Pigorsch, Christoph Scholl
2009Exploration of power reduction and performance enhancement in LEON3 processor with ESL reprogrammable eFPGA in processor pipeline and as a co-processor.
Syed Zahid Ahmed, Julien Eydoux, Laurent Rouge, Jean-Baptiste Cuelle, Gilles Sassatelli, Lionel Torres
2009Exploring parallelizations of applications for MPSoC platforms using MPA.
Rogier Baert, Erik Brockmeyer, Sven Wuytack, Thomas J. Ashby
2009Extending IP-XACT to support an MDE based approach for SoC design.
Amin El Mrabti, Frédéric Pétrot, Aimen Bouchhima
2009FSAF: File system aware flash translation layer for NAND Flash Memories.
Sai Krishna Mylavarapu, Siddharth Choudhuri, Aviral Shrivastava, Jongeun Lee, Tony Givargis
2009Fast and accurate protocol specific bus modeling using TLM 2.0.
H. W. M. van Moll, Henk Corporaal, Víctor Reyes, Marleen Boonen
2009Faster SAT solving with better CNF generation.
Benjamin Chambers, Panagiotis Manolios, Daron Vroon
2009Fault insertion testing of a novel CPLD-based fail-safe system.
Gerhard Grießnig, Roland Mader, Christian Steger, Reinhold Weiss
2009Fault-tolerant average execution time optimization for general-purpose multi-processor system-on-chips.
Mikael Väyrynen, Virendra Singh, Erik Larsson
2009Finite Precision bit-width allocation using SAT-Modulo Theory.
Adam B. Kinsman, Nicola Nicolici
2009Finite precision processing in wireless applications.
David Novo, Min Li, Bruno Bougard, Liesbet Van der Perre, Francky Catthoor
2009Fixed points for multi-cycle path detection.
Vijay Victor D'Silva, Daniel Kroening
2009Flexible energy-aware simulation of heterogenous wireless sensor networks.
Franco Fummi, Giovanni Perbellini, Davide Quaglia, Andrea Acquaviva
2009Flow regulation for on-chip communication.
Zhonghai Lu, Mikael Millberg, Axel Jantsch, Alistair C. Bruce, Pieter van der Wolf, Tomas Henriksson
2009Formal approaches to analog circuit verification.
Erich Barke, Darius Grabowski, Helmut Graeb, Lars Hedrich, Stefan Heinen, Ralf Popp, Sebastian Steinhorst, Yifan Wang
2009Functional qualification of TLM verification.
Nicola Bombieri, Franco Fummi, Graziano Pravadelli, Mark Hampton, Florian Letombe
2009GCS: High-performance gate-level simulation with GPGPUs.
Debapriya Chatterjee, Andrew DeOrio, Valeria Bertacco
2009Gate replacement techniques for simultaneous leakage and aging optimization.
Yu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang
2009Gate sizing for large cell-based designs.
Stephan Held
2009Generating the trace qualification configuration for MCDS from a high level language.
Jens Braunes, Rainer G. Spallek
2009Generation of compact test sets with high defect coverage.
Xrysovalantis Kavousianos, Krishnendu Chakrabarty
2009Group-caching for NoC based multicore cache coherent systems.
Zuo Wang, Feng Shi, Qi Zuo, Weixing Ji, Jiaxin Li, Ning Deng, Licheng Xue, Yu-an Tan, Baojun Qiao
2009HLS-l: High-level synthesis of high performance latch-based circuits.
Seungwhun Paik, Insup Shin, Youngsoo Shin
2009HOT TOPIC - Concurrent SoC development and end-to-end planning.
Lorena Anghel
2009Hardware aging-based software metering.
Foad Dabiri, Miodrag Potkonjak
2009Hardware evaluation of the stream cipher-based hash functions RadioGatún and irRUPT.
Luca Henzen, Flavio Carbognani, Norbert Felber, Wolfgang Fichtner
2009Hardware/software co-design architecture for thermal management of chip multiprocessors.
Omer Khan, Sandip Kundu
2009Has anything changed in electronic design since 1983?
Mike Muller
2009Health-care electronics The market, the challenges, the progress.
Wolfgang Eberle, Ashwin S. Mecheri, Thi Kim Thoa Nguyen, Georges G. E. Gielen, Raymond Campagnolo, Alison J. Burdett, Chris Toumazou, Bart Volckaerts
2009Heterogeneous coarse-grained processing elements: A template architecture for embedded processing acceleration.
Giovanni Ansaloni, Paolo Bonzini, Laura Pozzi
2009Heterogeneous multi-core platform for consumer multimedia applications.
Peter Kollig, Colin Osborne, Tomas Henriksson
2009High data rate fully flexible SDR modem advanced configurable architecture & development methodology.
Francois Kasperski, Olivier Pierrelee, Frederic Dotto, Michel Sarlotte
2009High level H.264/AVC video encoder parallelization for multiprocessor implementation.
Hajer Krichene Zrida, Abderrazek Jemai, Ahmed Chiheb Ammari, Mohamed Abid
2009How to speed-up your NLFSR-based stream cipher.
Elena Dubrova
2009Impact of voltage scaling on nanoscale SRAM reliability.
Vikas Chandra, Robert C. Aitken
2009Imperfection-immune VLSI logic circuits using Carbon Nanotube Field Effect Transistors.
Subhasish Mitra, Jie Zhang, Nishant Patil, Hai Wei
2009Implementation of a reduced-lattice MIMO detector for OFDM Systems.
Josep Soler Garrido, Henning Vetter, Magnus Sandell, David Milford, Andy Lillie
2009Improved performance and variation modelling for hierarchical-based optimisation of analogue integrated circuits.
Sawal Ali, Li Ke, Reuben Wilcock, Peter R. Wilson
2009Improved worst-case response-time calculations by upper-bound conditions.
Victor Pollex, Steffen Kollmann, Karsten Albers, Frank Slomka
2009Improving compressed test pattern generation for multiple scan chain failure diagnosis.
Xun Tang, Ruifeng Guo, Wu-Tung Cheng, Sudhakar M. Reddy
2009Improving yield and reliability of chip multiprocessors.
Abhisek Pan, Omer Khan, Sandip Kundu
2009In-network reorder buffer to improve overall NoC performance while resolving the in-order requirement problem.
Woo-Cheol Kwon, Sungjoo Yoo, Junhyung Um, Seh-Woong Jeong
2009Incorporating graceful degradation into embedded system design.
Michael Glaß, Martin Lukasiewycz, Christian Haubelt, Jürgen Teich
2009Increased accuracy through noise injection in abstract RTOS simulation.
Henning Zabel, Wolfgang Müller
2009Increasing the accuracy of SAT-based debugging.
André Sülflow, Görschwin Fey, Cécile Braunstein, Ulrich Kühne, Rolf Drechsler
2009Integrated scheduling and synthesis of control applications on distributed embedded systems.
Soheil Samii, Anton Cervin, Petru Eles, Zebo Peng
2009Integration of an advanced emergency call subsystem into a car-gateway platform.
Natividad Martínez Madrid, Ralf Seepold, Alvaro Reina Nieves, J. Sáez Gomez, Alberto los Santos Aransay, P. Sanz Velasco, Carlos Rueda Morales, Felisa Ares
2009Joint logic restructuring and pin reordering against NBTI-induced performance degradation.
Kai-Chiang Wu, Diana Marculescu
2009KAST: K-associative sector translation for NAND flash memory in real-time systems.
Hyun-jin Cho, Dongkun Shin, Young Ik Eom
2009LFSR-based test-data compression with self-stoppable seeds.
M. Koutsoupia, Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos
2009Latency criticality aware on-chip communication.
Zheng Li, Jie Wu, Li Shang, Robert P. Dick, Yihe Sun
2009Learning early-stage platform dimensioning from late-stage timing verification.
Kai Richter, Marek Jersak, Rolf Ernst
2009Lifetime reliability-aware task allocation and scheduling for MPSoC platforms.
Lin Huang, Feng Yuan, Qiang Xu
2009Light NUCA: A proposal for bridging the inter-cache latency gap.
Darío Suárez Gracia, Teresa Monreal, Fernando Vallejo, Ramón Beivide, Víctor Viñals
2009Limiting the number of dirty cache lines.
Pepijn J. de Langen, Ben H. H. Juurlink
2009MPSoCs run-time monitoring through Networks-on-Chip.
Leandro Fiorin, Gianluca Palermo, Cristina Silvano
2009MTJ-based nonvolatile logic-in-memory circuit, future prospects and issues.
Shoun Matsunaga, Jun Hayakawa, Shoji Ikeda, Katsuya Miura, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu
2009Machine learning-based volume diagnosis.
Seongmoon Wang, Wenlong Wei
2009Making DNA self-assembly error-proof: Attaining small growth error rates through embedded information redundancy.
Saturnino Garcia, Alex Orailoglu
2009Mapping of a film grain removal algorithm to a heterogeneous reconfigurable architecture.
Sean Whitty, Henning Sahlbach, Rolf Ernst, Wolfram Putzke-Röming
2009Masking timing errors on speed-paths in logic circuits.
Mihir R. Choudhury, Kartik Mohanram
2009Massively multi-topology sizing of analog integrated circuits.
Pieter Palmers, Trent McConaghy, Michiel Steyaert, Georges G. E. Gielen
2009Minimization of NBTI performance degradation using internal node control.
David R. Bild, Gregory E. Bok, Robert P. Dick
2009Mode-based reconfiguration of critical software component architectures.
Etienne Borde, Grégory Haïk, Laurent Pautet
2009Model Based Design needs high level synthesis - A collection of high level synthesis techniques to improve productivity and quality of results for model based electronic design.
Steve Perry
2009Model-based synthesis and optimization of static multi-rate image processing algorithms.
Joachim Keinert, Hritam Dutta, Frank Hannig, Christian Haubelt, Jürgen Teich
2009Multi-clock Soc design using protocol conversion.
Roopak Sinha, Partha S. Roop, Samik Basu, Zoran Salcic
2009Multi-core for mobile phones.
C. H. van Berkel
2009Multi-domain clock skew scheduling-aware register placement to optimize clock distribution network.
Naser MohammadZadeh, Minoo Mirsaeedi, Ali Jahanian, Morteza Saheb Zamani
2009Nano-electronics challenge chip designers meet real nano-electronics in 2010s?
Shinobu Fujita
2009Networked embedded system applications design driven by an abstract middleware environment.
Franco Fummi, Giovanni Perbellini, Niccolo Roncolato
2009New simulation methodology of 3D surface roughness loss for interconnects modeling.
Quan Chen, Ngai Wong
2009Novel library of logic gates with ambipolar CNTFETs: Opportunities for multi-level logic synthesis.
M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De Micheli
2009ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration.
Andrew B. Kahng, Bin Li, Li-Shiuan Peh, Kambiz Samadi
2009OSSS+R: A framework for application level modelling and synthesis of reconfigurable systems.
Andreas Schallenberg, Wolfgang Nebel, Andreas Herrholz, Philipp A. Hartmann, Frank Oppenheimer
2009On bounding response times under software transactional memory in distributed multiprocessor real-time systems.
Sherif Fadel Fahmy, Binoy Ravindran, E. Douglas Jensen
2009On decomposing Boolean functions via extended cofactoring.
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa
2009On hierarchical statistical static timing analysis.
Bing Li, Ning Chen, Manuel Schmidt, Walter Schneider, Ulf Schlichtmann
2009On linewidth-based yield analysis for nanometer lithography.
Aswin Sreedhar, Sandip Kundu
2009On the efficient reduction of complete EM based parametric models.
Jorge Fernandez Villena, Gabriela Ciuprina, Daniel Ioan, Luís Miguel Silveira
2009On the relationship between stuck-at fault coverage and transition fault coverage.
Jan Schat
2009On-chip communication architecture exploration for processor-pool-based MPSoC.
Young-Pyo Joo, Sungchan Kim, Soonhoi Ha
2009Online adaptation policy design for grid sensor networks with reconfigurable embedded nodes.
Varun Subramanian, Michael Gilberti, Alex Doboli
2009Optimal sizing of configurable devices to reduce variability in integrated circuits.
Peter R. Wilson, Reuben Wilcock
2009Optimizations of an application-level protocol for enhanced dependability in FlexRay.
Wenchao Li, Marco Di Natale, Wei Zheng, Paolo Giusto, Alberto L. Sangiovanni-Vincentelli, Sanjit A. Seshia
2009Optimizing data flow graphs to minimize hardware implementation.
Daniel Gomez-Prado, Qian Ren, Maciej J. Ciesielski, Jérémie Guillot, Emmanuel Boutillon
2009Optimizing the HW/SW boundary of an ECC SoC design using control hierarchy and distributed storage.
Xu Guo, Patrick Schaumont
2009Overcoming limitations of the SystemC data introspection.
Christian Genz, Rolf Drechsler
2009PANEL SESSION - Is the second wave of HLS the one industry will surf on?
Loic Le Toumelin
2009PANEL SESSION - Open source hardware IP, are you serious?
P. Parrish
2009Package routability- and IR-drop-aware finger/pad assignment in chip-package co-design.
Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu, Wen-Yu Shih
2009Panel Session - Vertical integration versus disaggregation.
Yervant Zorian
2009Panel session - Architectures and integration for programmable SoC's.
Guido Schreiner, Endric Schubert
2009Panel session - Consolidation, a modern "Moor of Venice" tale.
Marco Casale-Rossi, Giovanni De Micheli
2009Panel session - ESL methodology for SoC.
Larry Toda, Walden C. Rhines
2009Panel session - Multicore, will Startups drive innovation?
Ahmed Amine Jerraya, Rolf Ernst
2009Parallel transistor level full-chip circuit simulation.
He Peng, Chung-Kuan Cheng
2009Partition-based exploration for reconfigurable JPEG designs.
Philip G. Potter, Wayne Luk, Peter Y. K. Cheung
2009Performance optimal speed control of multi-core processors under thermal constraints.
Vinay Hanumaiah, Sarma B. K. Vrudhula, Karam S. Chatha
2009Performance-driven dual-rail insertion for chip-level pre-fabricated design.
Fu-Wei Chen, Yi-Yu Liu
2009Physically clustered forward body biasing for variability compensation in nanometer CMOS design.
Ashoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Giovanni De Micheli, Enrico Macii
2009Pipelined data parallel task mapping/scheduling technique for MPSoC.
Hoeseok Yang, Soonhoi Ha
2009Power and performance of read-write aware Hybrid Caches with non-volatile memories.
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Yuan Xie
2009Power reduction of a 12-bit 40-MS/s pipeline ADC exploiting partial amplifier sharing.
José Ángel Díaz-Madrid, Harald Neubauer, Hans Hauer, Ginés Doménech-Asensi, Ramón Ruiz Merino
2009Predictive models for multimedia applications power consumption based on use-case and OS level analysis.
Patrick Bellasi, William Fornaciari, David Siorpaes
2009Priority based forced requeue to reduce worst-case latencies for bursty traffic.
Mikael Millberg, Axel Jantsch
2009Priority-based packet communication on a bus-shaped structure for FPGA-systems.
Oliver Sander, Benjamin Glas, Christoph Roth, Jürgen Becker, Klaus D. Müller-Glaser
2009Process Variation Aware SRAM/Cache for aggressive voltage-frequency scaling.
Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, Fadi J. Kurdahi
2009Process variation aware thread mapping for Chip Multiprocessors.
Shengyan Hong, Sri Hari Krishna Narayanan, Mahmut T. Kandemir, Ozcan Ozturk
2009Program phase and runtime distribution-aware online DVFS for combined Vdd/Vbb scaling.
Jungsoo Kim, Sungjoo Yoo, Chong-Min Kyung
2009Programming MPSoC platforms: Road works ahead!
Rainer Leupers, Andras Vajda, Marco Bekooij, Soonhoi Ha, Rainer Dömer, Achim Nohl
2009Property analysis and design understanding.
Ulrich Kühne, Daniel Große, Rolf Drechsler
2009QC-Fill: An X-Fill method for quick-and-cool scan test.
Chao-Wen Tzeng, Shi-Yu Huang
2009ReSim, a trace-driven, reconfigurable ILP processor simulator.
Sotiria Fytraki, Dionisios N. Pnevmatikatos
2009Reconfigurable circuit design with nanomaterials.
Chen Dong, Scott Chilstedt, Deming Chen
2009Register placement for high-performance circuits.
Mei-Fang Chiang, Takumi Okamoto, Takeshi Yoshimura
2009Reliability aware through silicon via planning for 3D stacked ICs.
Amirali Shayan Arani, Xiang Hu, He Peng, Chung-Kuan Cheng, Wenjian Yu, Mikhail Popovich, Thomas Toms, Xiaoming Chen
2009Reliable mode changes in real-time systems with fixed priority or EDF scheduling.
Nikolay Stoimenov, Simon Perathoner, Lothar Thiele
2009Remote measurement of local oscillator drifts in FlexRay networks.
Eric Armengaud, Andreas Steininger
2009Response-time analysis of arbitrarily activated tasks in multiprocessor systems with shared resources.
Mircea Negrean, Simon Schliecker, Rolf Ernst
2009Rewiring using IRredundancy Removal and Addition.
Chun-Chi Lin, Chun-Yao Wang
2009Robust non-preemptive hard real-time scheduling for clustered multicore platforms.
Michele Lombardi, Michela Milano, Luca Benini
2009Runtime reconfiguration of custom instructions for real-time embedded systems.
Huynh Phung Huynh, Tulika Mitra
2009SC-DEVS: An efficient SystemC extension for the DEVS model of computation.
Felix Madlener, H. Gregor Molter, Sorin A. Huss
2009SCORES: A scalable and parametric streams-based communication architecture for modular reconfigurable systems.
Abelardo Jara-Berrocal, Ann Gordon-Ross
2009SEU-aware resource binding for modular redundancy based designs on FPGAs.
Shahin Golshan, Eli Bozorgzadeh
2009Scalable Adaptive Scan (SAS).
Anshuman Chandra, Rohit Kapur, Yasunari Kanzawa
2009Scalable compile-time scheduler for multi-core architectures.
Maxime Pelcat, Pierrick Menuet, Slaheddine Aridhi, Jean-François Nezan
2009Scalable liveness checking via property-preserving transformations.
Jason Baumgartner, Hari Mony
2009SecBus: Operating System controlled hierarchical page-based memory bus protection.
Lifeng Su, Stephan Courcambeck, Pierre Guillemin, Christian Schwarz, Renaud Pacalet
2009Seed selection in LFSR-reseeding-based test compression for the detection of small-delay defects.
Mahmut Yilmaz, Krishnendu Chakrabarty
2009Selection of a fault model for fault diagnosis based on unique responses.
Irith Pomeranz, Sudhakar M. Reddy
2009Selective light Vth hopping (SLITH): Bridging the gap between runtime dynamic and leakage.
Hao Xu, Ranga Vemuri, Wen-Ben Jone
2009Selective state retention design using symbolic simulation.
Ashish Darbari, Bashir M. Al-Hashimi, David Flynn, John Biggs
2009Semiformal verification of temporal properties in automotive hardware dependent software.
Djones Lettnin, Pradeep Kumar Nalla, Jörg Behrend, Jürgen Ruf, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel, Volker Schönknecht, Stephan Reitemeyer
2009Separate compilation and execution of imperative synchronous modules.
Eric Vecchié, Jean-Pierre Talpin, Klaus Schneider
2009Sequential logic rectifications with approximate SPFDs.
Yu-Shen Yang, Subarna Sinha, Andreas G. Veneris, Robert K. Brayton, Duncan Exon Smith
2009Sequential logic synthesis using symbolic bi-decomposition.
Victor N. Kravets, Alan Mishchenko
2009Shock immunity enhancement via resonance damping in gyroscopes for automotive applications.
Eleonora Marchetti, Luca Fanucci, Alessandro Rocchi, Marco De Marinis
2009Simulation framework for early phase exploration of SDR platforms: A case study of platform dimensioning.
Martin Trautmann, Stylianos Mamagkakis, Bruno Bougard, Jeroen Declerck, Erik Umans, Antoine Dejonghe, Liesbet Van der Perre, Francky Catthoor
2009Single ended 6T SRAM with isolated read-port for low-power embedded systems.
Jawar Singh, Dhiraj K. Pradhan, Simon Hollis, Saraju P. Mohanty, Jimson Mathew
2009Solver technology for system-level to RTL equivalence checking.
Alfred Kölbl, Reily Jacoby, Himanshu Jain, Carl Pixley
2009Speculative reduction-based scalable redundancy identification.
Hari Mony, Jason Baumgartner, Alan Mishchenko, Robert K. Brayton
2009Speeding up model checking by exploiting explicit and hidden verification constraints.
Gianpiero Cabodi, Paolo Camurati, Luz Amanda Garcia, Marco Murciano, Sergio Nocco, Stefano Quer
2009Static analysis to mitigate soft errors in register files.
Jongeun Lee, Aviral Shrivastava
2009Statistical fault injection: Quantified error and confidence.
Régis Leveugle, A. Calvez, Paolo Maistri, Pierre Vanhauwaert
2009Strategic directions towards multicore application specific computing.
Eric Flamand
2009Strengthening properties using abstraction refinement.
Mitra Purandare, Thomas Wahl, Daniel Kroening
2009Successful attack on an FPGA-based WDDL DES cryptoprocessor without place and route constraints.
Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger, Yves Mathieu, Maxime Nassar
2009SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips.
Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2009Synthesis of low-overhead configurable source routing tables for network interfaces.
Igor Loi, Federico Angiolini, Luca Benini
2009System-level hardware-based protection of memories against soft-errors.
Valentin Gherman, Samuel Evain, Mickael Cartron, Nathaniel Seymour, Yannick Bonhomme
2009System-level power/performance evaluation of 3D stacked DRAMs for mobile applications.
Marco Facchini, Trevor E. Carlson, Anselme Vignon, Martin Palkovic, Francky Catthoor, Wim Dehaene, Luca Benini, Paul Marchal
2009System-level process variability analysis and mitigation for 3D MPSoCs.
Siddharth Garg, Diana Marculescu
2009Systolic like soft-detection architecture for 4×4 64-QAM MIMO system.
Pankaj Bhagawat, Rajballav Dash, Gwan Choi
2009TRAM: A tool for Temperature and Reliability Aware Memory Design.
Amin Khajeh, Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Ahmed M. Eltawil, Kamal S. Khouri, Magdy S. Abadir
2009Temperature-aware scheduler based on thermal behavior grouping in multicore systems.
Inchoon Yeo, Eun Jung Kim
2009Test architecture design and optimization for three-dimensional SoCs.
Li Jiang, Lin Huang, Qiang Xu
2009Test cost reduction for multiple-voltage designs with bridge defects through Gate-Sizing.
S. Saqib Khursheed, Bashir M. Al-Hashimi, Peter Harrod
2009Test exploration and validation using transaction level models.
Michael A. Kochte, Christian G. Zoellin, Michael E. Imhof, Rauf Salimi Khaligh, Martin Radetzki, Hans-Joachim Wunderlich, Stefano Di Carlo, Paolo Prinetto
2009The influence of real-time constraints on the design of FlexRay-based systems.
Stephan Reichelt, Oliver Scheickl, Gökhan Tabanoglu
2009Thermal-aware memory mapping in 3D designs.
Ang-Chih Hsieh, TingTing Hwang
2009Time and memory tradeoffs in the implementation of AUTOSAR components.
Alberto Ferrari, Marco Di Natale, Giacomo Gentile, Giovanni Reggiani, Paolo Gai
2009Toward a runtime system for reconfigurable computers: A virtualization approach.
Mojtaba Sabeghi, Koen Bertels
2009Towards a formal semantics for the AADL behavior annex.
Zhibin Yang, Kai Hu, Dianfu Ma, Lei Pi
2009Towards no-cost adaptive MPSoC static schedules through exploitation of logical-to-physical core mapping latitude.
Chengmo Yang, Alex Orailoglu
2009Trace signal selection for visibility enhancement in post-silicon validation.
Xiao Liu, Qiang Xu
2009Trends and challenges in wireless application processors.
Pierre Garnier
2009UMTS MPSoC design evaluation using a system level design framework.
Douglas Densmore, Alena Simalatsar, Abhijit Davare, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli
2009User-centric design space exploration for heterogeneous Network-on-Chip platforms.
Chen-Ling Chou, Radu Marculescu
2009Using dynamic compilation for continuing execution under reduced memory availability.
Ozcan Ozturk, Mahmut T. Kandemir
2009Using non-volatile memory to save energy in servers.
David Roberts, Taeho Kgil, Trevor N. Mudge
2009Using randomization to cope with circuit uncertainty.
Hamid Safizadeh, Mohammad Tahghighi, Ehsan K. Ardestani, Gholamhossein Tavasoli, Kia Bazargan
2009Variable-latency design by function speculation.
David Bañeres, Jordi Cortadella, Michael Kishinevsky
2009Variation resilient adaptive controller for subthreshold circuits.
Biswajit Mishra, Bashir M. Al-Hashimi, Mark Zwolinski
2009Visual quality analysis for dynamic backlight scaling in LCD systems.
Andrea Bartolini, Martino Ruggiero, Luca Benini
2009WCRT algebra and interfaces for esterel-style synchronous processing.
Michael Mendler, Reinhard von Hanxleden, Claus Traulsen
2009White box performance analysis considering static non-preemptive software scheduling.
Alexander Viehl, Michael Pressler, Oliver Bringmann, Wolfgang Rosenstiel
2009aEqualized: A novel routing algorithm for the Spidergon Network On Chip.
Nicola Concer, Salvatore Iamundo, Luciano Bononi
2009pTest: An adaptive testing tool for concurrent software on embedded multicore processors.
Shou-Wei Chang, Kun-Yuan Hsieh, Jenq Kuen Lee