DATE A

268 papers

YearTitle / Authors
20063D floorplanning with thermal vias.
Eric Wong, Sung Kyu Lim
200640Gbps de-layered silicon protocol engine for TCP record.
H. Shrikumar
20064G applications, architectures, design methodology and tools for MPSoC.
2006A 10-GHz 15-dB four-stage distributed amplifier in 0.18 µm CMOS process.
Kambiz K. Moez, Mohamed I. Elmasry
2006A SW performance estimation framework for early system-level-design using fine-grained instrumentation.
Torsten Kempf, Kingshuk Karuri, Stefan Wallentowitz, Gerd Ascheid, Rainer Leupers, Heinrich Meyr
2006A built-in redundancy-analysis scheme for RAMs with 2D redundancy using 1D local bitmap.
Tsu-Wei Tseng, Jin-Fu Li, Da-Ming Chang
2006A compact model to identify delay faults due to crosstalk.
José Luis Rosselló, Jaume Segura
2006A concurrent testing method for NoC switches.
Mohammad Hosseinabady, Abbas Banaiyan, Mahdi Nazm Bojnordi, Zainalabedin Navabi
2006A control theoretic approach to run-time energy optimization of pipelined processing in MPSoCs.
Andrea Alimonda, Andrea Acquaviva, Salvatore Carta, Alessandro Pisano
2006A coverage metric for the validation of interacting processes.
Ian G. Harris
2006A design flow for configurable embedded processors based on optimized instruction set extension synthesis.
Rainer Leupers, Kingshuk Karuri, Stefan Kraemer, Manas Pandey
2006A design for failure analysis (DFFA) technique to ensure incorruptible signatures.
Sandip Kundu
2006A dynamically reconfigurable packet-switched network-on-chip.
Thilo Pionteck, Carsten Albrecht, Roman Koch
2006A formal model and efficient traversal algorithm for generating testbenches for verification of IEEE standard floating point division.
David W. Matula, Lee D. McFearin
2006A hybrid framework for design and analysis of fault-tolerant architectures.
Debayan Bhaduri, Sandeep K. Shukla, Deji Coker, Valerie E. Taylor, Paul S. Graham, Maya B. Gokhale
2006A logarithmic full-chip thermal analysis algorithm based on multi-layer Green's function.
Baohua Wang, Pinaki Mazumder
2006A low complexity heuristic for design of custom network-on-chip architectures.
Krishnan Srinivasan, Karam S. Chatha
2006A methodology for mapping multiple use-cases onto networks on chips.
Srinivasan Murali, Martijn Coenen, Andrei Radulescu, Kees Goossens, Giovanni De Micheli
2006A network-on-chip with 3Gbps/wire serialized on-chip interconnect using adaptive control schemes.
Se-Joong Lee, Kwanho Kim, Hyejung Kim, Namjun Cho, Hoi-Jun Yoo
2006A parallel configuration model for reducing the run-time reconfiguration overhead.
Yang Qu, Juha-Pekka Soininen, Jari Nurmi
2006A practical method to estimate interconnect responses to variabilities.
Frank Liu
2006A reconfigurable HW/SW platform for computation intensive high-resolution real-time digital film applications.
Amilcar do Carmo Lucas, Sven Heithecker, Peter Rüffer, Rolf Ernst, Holger Rückert, Gerhard Wischermann, Karin Gebel, Reinhard Fach, Wolfgang Huther, Stefan Eichner, Gunter Scheller
2006A secure scan design methodology.
David Hély, Frédéric Bancel, Marie-Lise Flottes, Bruno Rouzeyre
2006A signal theory based approach to the statistical analysis of combinatorial nanoelectronic circuits.
Oliver Soffke, Peter Zipf, Tudor Murgan, Manfred Glesner
2006A single photon avalanche diode array fabricated in deep-submicron CMOS technology.
Cristiano Niclass, Maximilian Sergio, Edoardo Charbon
2006A spatial mapping algorithm for heterogeneous coarse-grained reconfigurable architectures.
Minwook Ahn, Jonghee W. Yoon, Yunheung Paek, Yoonjin Kim, Mary Kiemb, Kiyoung Choi
2006A synthesis tool for power-efficient base-band filter design.
Vito Giannini, Pierluigi Nuzzo, Fernando De Bernardinis, Jan Craninckx, Boris Come, Stefano D'Amico, Andrea Baschirotto
2006A systematic IP and bus subsystem modeling for platform-based system design.
Junhyung Um, Woo-Cheol Kwon, Sungpack Hong, Young-Taek Kim, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo, Taewhan Kim
2006A time predictable Java processor.
Martin Schoeberl
2006A time-triggered ethernet (TTE) switch.
Klaus Steinhammer, Petr Grillinger, Astrit Ademaj, Hermann Kopetz
2006A unified system-level modeling and simulation environment for MPSoC design: MPEG-4 decoder case study.
Víctor Reyes, Wido Kruijtzer, Tomás Bautista, Ghiath Alkadi, Antonio Núñez
2006ALAMO: an improved alpha-space based methodology for modeling process parameter variations in analog circuits.
Hui Zhang, Yang Zhao, Alex Doboli
2006ASIP-based multiprocessor SoC design for simple and double binary turbo decoding.
Olivier Muller, Amer Baghdadi, Michel Jézéquel
2006Activity clustering for leakage management in SPMs.
Mahmut T. Kandemir, Guangyu Chen, Feihui Li, Mary Jane Irwin, Ibrahim Kolcu
2006Adaptive chip-package thermal analysis for synthesis and design.
Yonghong Yang, Zhenyu (Peter) Gu, Changyun Zhu, Li Shang, Robert P. Dick
2006Adaptive data placement in an embedded multiprocessor thread library.
Phillip Stanley-Marbell, Kanishka Lahiri, Anand Raghunathan
2006Advanced receiver algorithms for MIMO wireless communications.
Andreas Burg, Moritz Borgmann, Markus Wenk, Christoph Studer, Helmut Bölcskei
2006An analytical state dependent leakage power model for FPGAs.
Akhilesh Kumar, Mohab Anis
2006An effective technique for minimizing the cost of processor software-based diagnosis in SoCs.
Paolo Bernardi, Ernesto Sánchez, Massimiliano Schillaci, Giovanni Squillero, Matteo Sonza Reorda
2006An efficient TLM/T modeling and simulation environment based on conservative parallel discrete event principles.
Emmanuel Viaud, François Pêcheux, Alain Greiner
2006An efficient and portable scheduler for RTOS simulation and its certified integration to SystemC.
Hiroaki Nakamura, Naoto Sato, Naoshi Tabuchi
2006An efficient static algorithm for computing the soft error rates of combinational circuits.
Rajeev R. Rao, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester
2006An environment for controlled experiments with in-house sensor networks.
Vlado Handziski, Andreas Köpke, Andreas Willig, Adam Wolisz
2006An improved RF loopback for test time reduction.
Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin
2006An integrated open framework for heterogeneous MPSoC design space exploration.
Federico Angiolini, Jianjiang Ceng, Rainer Leupers, Federico Ferrari, Cesare Ferri, Luca Benini
2006An integrated scratch-pad allocator for affine and non-affine code.
Sumesh Udayakumaran, Rajeev Barua
2006An interprocedural code optimization technique for network processors using hardware multi-threading support.
Hanno Scharwächter, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2006An ultra low-power TLB design.
Yen-Jen Chang
2006Analysis and modeling of power grid transmission lines.
J. Balachandran, Steven Brebels, Geert Carchon, Tomas Webers, Walter De Raedt, Bart Nauwelaers, Eric Beyne
2006Analysis and synthesis of quantum circuits by using quantum decision diagrams.
Afshin Abdollahi, Massoud Pedram
2006Analysis of the impact of bus implemented EDCs on on-chip SSN.
Daniele Rossi, Carlo Steiner, Cecilia Metra
2006Analyzing timing uncertainty in mesh-based clock architectures.
Subodh M. Reddy, Gustavo R. Wilke, Rajeev Murgai
2006Application specific NoC design.
Luca Benini
2006Application-specific reconfigurable XOR-indexing to eliminate cache conflict misses.
Hans Vandierendonck, Philippe Manet, Jean-Didier Legat
2006Arbitrary design of high order noise transfer function for a novel class of reduced-sample-rate sigma-delta-pipeline ADCs.
Vahid Majidzadeh, Omid Shoaei
2006Architectural and technology influence on the optimal total power consumption.
Christian Schuster, Jean-Luc Nagel, Christian Piguet, Pierre-André Farine
2006Area-efficient error protection for caches.
Soontae Kim
2006Associative skew clock routing for difficult instances.
Min-Seok Kim, Jiang Hu
2006AutoVision: flexible processor architecture for video-assisted driving.
Andreas Herkersdorf, Walter Stechele
2006Automated exploration of pareto-optimal configurations in parameterized dynamic memory allocation for embedded systems.
Stylianos Mamagkakis, David Atienza, Christophe Poucet, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias
2006Automatic ADL-based operand isolation for embedded processors.
Anupam Chattopadhyay, Benedikt Geukes, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
2006Automatic generation of operation tables for fast exploration of bypasses in embedded processors.
Sanghyun Park, Eugene Earlie, Aviral Shrivastava, Alex Nicolau, Nikil D. Dutt, Yunheung Paek
2006Automatic identification of application-specific functional units with architecturally visible storage.
Partha Biswas, Nikil D. Dutt, Paolo Ienne, Laura Pozzi
2006Automatic insertion of low power annotations in RTL for pipelined microprocessors.
Vinod Viswanath, Jacob A. Abraham, Warren A. Hunt Jr.
2006Automatic march tests generations for static linked faults in SRAMs.
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006Automatic run-time selection of power policies for operating systems.
Nathaniel Pettis, Jason Ridenour, Yung-Hsiang Lu
2006Automating processor customisation: optimised memory access and resource sharing.
Robert G. Dimond, Oskar Mencer, Wayne Luk
2006Automotive semi-conductor trend & challenges.
Patrick Leteinturier
2006Avoiding false negatives in formal verification for protocol-driven blocks.
Görschwin Fey, Daniel Große, Rolf Drechsler
2006Battery-aware code partitioning for a text to speech system.
Anirban Lahiri, Anupam Basu, Monojit Choudhury, Srobona Mitra
2006Berger code-based concurrent error detection in asynchronous burst-mode machines.
Sobeeh Almukhaizim, Yiorgos Makris
2006Bootstrapped full-swing CMOS driver for low supply voltage operation.
José C. García, Juan A. Montiel-Nelson, Saeid Nooshabadi
2006Buffer space optimisation with communication synthesis and traffic shaping for NoCs.
Sorin Manolache, Petru Eles, Zebo Peng
2006Building a better Boolean matcher and symmetry detector.
Donald Chai, Andreas Kuehlmann
2006Bus stuttering: an encoding technique to reduce inductive noise in off-chip data transmission.
Brock J. LaMeres, Sunil P. Khatri
2006COSMECA: application specific co-synthesis of memory and communication architectures for MPSoC.
Sudeep Pasricha, Nikil D. Dutt
2006Cell delay analysis based on rate-of-current change.
Shahin Nazarian, Massoud Pedram
2006Circuit-aware device design methodology for nanometer technologies: a case study for low power SRAM design.
Qikai Chen, Saibal Mukhopadhyay, Aditya Bansal, Kaushik Roy
2006Classification trees for random tests and functional coverage.
Alexander Krupp, Wolfgang Müller
2006Combining algorithm exploration with instruction set design: a case study in elliptic curve cryptography.
Johann Großschädl, Paolo Ienne, Laura Pozzi, Stefan Tillich, Ajay Kumar Verma
2006Combining simulation and formal methods for system-level performance analysis.
Simon Künzli, Francesco Poletti, Luca Benini, Lothar Thiele
2006Comfortable modeling of complex reactive systems.
Steffen Prochnow, Reinhard von Hanxleden
2006Communication and co-simulation infrastructure for heterogeneous system integration.
Guang Yang, Xi Chen, Felice Balarin, Harry Hsieh, Alberto L. Sangiovanni-Vincentelli
2006Communication architecture optimization: making the shortest path shorter in regular networks-on-chip.
Ümit Y. Ogras, Radu Marculescu, Hyung Gyu Lee, Naehyuck Chang
2006Communication-aware allocation and scheduling framework for stream-oriented multi-processor systems-on-chip.
Martino Ruggiero, Alessio Guerri, Davide Bertozzi, Francesco Poletti, Michela Milano
2006Compiler-driven FPGA-area allocation for reconfigurable computing.
Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis
2006Compositional, efficient caches for a chip multi-processor.
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven
2006Concurrent core test for SOC using shared test set and scan chain disable.
Gang Zeng, Hideo Ito
2006Configurable multiprocessor platform with RTOS for distributed execution of UML 2.0 designed applications.
Tero Arpinen, Petri Kukkala, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen
2006Constructing portable compiled instruction-set simulators: an ADL-driven approach.
Joseph D'Errico, Wei Qin
2006Contrasting a NoC and a traditional interconnect fabric with layout awareness.
Federico Angiolini, Paolo Meloni, Salvatore Carta, Luca Benini, Luigi Raffo
2006Cooptimization of interface hardware and software for I/O controllers.
Kuan Jen Lin, Shih Hao Huang, Shan Chien Fang
2006Coverage loss by using space compactors in presence of unknown values.
Mango Chia-Tso Chao, Seongmoon Wang, Srimat T. Chakradhar, Wenlong Wei, Kwang-Ting Cheng
2006Cross disciplinary aspects (4G wireless special day).
Tobias G. Noll, Uwe Lambrette
2006Crosstalk-aware domino logic synthesis.
Yi-Yu Liu, TingTing Hwang
2006Customization of application specific heterogeneous multi-pipeline processors.
Swarnalatha Radhakrishnan, Hui Guo, Sri Parameswaran
2006DFM/DFY design for manufacturability and yield - influence of process variations in digital, analog and mixed-signal circuit design.
Markus Bühler, Jürgen Koehl, Jeanne Bickford, Jason Hibbeler, Ulf Schlichtmann, Ralf Sommer, Michael Pronath, Andreas Ripp
2006Defect tolerance of QCA tiles.
Jing Huang, Mariam Momenzadeh, Fabrizio Lombardi
2006Design with race-free hardware semantics.
Patrick Schaumont, Sandeep K. Shukla, Ingrid Verbauwhede
2006Designing MRF based error correcting circuits for memory elements.
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky
2006Designing signal processing systems for FPGAs.
John Heighton
2006Determining the optimal timeout values for a power-managed system based on the theory of Markovian processes: offline and online algorithms.
Peng Rong, Massoud Pedram
2006Diagnosis of defects on scan enable and clock trees.
Yu Huang, Keith Gallie
2006Disclosing the LDPC code decoder design space.
Torben Brack, Frank Kienle, Norbert Wehn
2006Disjunctive image computation for embedded software verification.
Chao Wang, Zijiang Yang, Franjo Ivancic, Aarti Gupta
2006Distance-guided hybrid verification with GUIDO.
Smitha Shyam, Valeria Bertacco
2006Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors.
Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest
2006Distributed object models for multi-processor SoC's, with application to low-power multimedia wireless systems.
Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Olivier Benny, Damien Lyonnard, Bruno Lavigueur, David Lo
2006Domain specific model driven design for automotive electronic control units.
Klaus D. Müller-Glaser
2006Double-sampling single-loop sigma-delta modulator topologies for broadband applications.
Mohammad Yavari, Omid Shoaei, Ángel Rodríguez-Vázquez
2006Double-strength CAFFEINE: fast template-free symbolic modeling of analog circuits via implicit canonical form functions and explicit introns.
Trent McConaghy, Georges G. E. Gielen
2006Droplet routing in the synthesis of digital microfluidic biochips.
Fei Su, William L. Hwang, Krishnendu Chakrabarty
2006Dynamic bit-width adaptation in DCT: image quality versus computation energy trade-off.
Jongsun Park, Jung Hwan Choi, Kaushik Roy
2006Dynamic code overlay of SDF-modeled programs on low-end embedded systems.
Hae-woo Park, Kyoungjoo Oh, Soyoung Park, Myoung-min Sim, Soonhoi Ha
2006Dynamic data type refinement methodology for systematic performance-energy design exploration of network applications.
Alexandros Bartzas, Stylianos Mamagkakis, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
2006Dynamic partitioning of processing and memory resources in embedded MPSoC architectures.
Liping Xue, Ozcan Ozturk, Feihui Li, Mahmut T. Kandemir, Ibrahim Kolcu
2006Dynamic scratch-pad memory management for irregular array access patterns.
Guilin Chen, Ozcan Ozturk, Mahmut T. Kandemir, Mustafa Karaköy
2006EDA challenges in the converging application world.
René Penning de Vries
2006Efficient AC analysis of oscillators using least-squares methods.
Ting Mei, Jaijeet S. Roychowdhury
2006Efficient assertion based verification using TLM.
Ali Habibi, Sofiène Tahar, Amer Samarah, Donglin Li, Otmane Aït Mohamed
2006Efficient design space exploration of high performance embedded out-of-order processors.
Stijn Eyerman, Lieven Eeckhout, Koen De Bosschere
2006Efficient factorization of DSP transforms using taylor expansion diagrams.
Jérémie Guillot, Emmanuel Boutillon, Qian Ren, Maciej J. Ciesielski, Daniel Gomez-Prado, Serkan Askar
2006Efficient incremental clock latency scheduling for large circuits.
Christoph Albrecht
2006Efficient link capacity and QoS design for network-on-chip.
Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny
2006Efficient minimization of fully testable 2-SPP networks.
Anna Bernasconi, Valentina Ciriani, Rolf Drechsler, Tiziano Villa
2006Efficient on-line interconnect testing in FPGAs with provable detectability for multiple faults.
Vishal Suthar, Shantanu Dutt
2006Efficient temperature-dependent symbolic sensitivity analysis and symbolic performance evaluation in analog circuit synthesis.
Huiying Yang, Ranga Vemuri
2006Efficient test-data compression for IP cores using multilevel Huffman coding.
Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos
2006Efficient timing-driven incremental routing for VLSI circuits using DFS and localized slack-satisfaction computations.
Shantanu Dutt, Hasan Arslan
2006Efficient unknown blocking using LFSR reseeding.
Seongmoon Wang, Kedarnath J. Balakrishnan, Srimat T. Chakradhar
2006Electric and electronic vehicle architecture assessment.
Pascal Dégardins
2006Enabling fine-grain leakage management by voltage anchor insertion.
Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii
2006Energy efficiency vs. programmability trade-off: architectures and design principles.
Pablo Robelly, Hendrik Seidel, K. C. Chen, Gerhard P. Fettweis
2006Energy reduction by workload adaptation in a multi-process environment.
Changjiu Xian, Yung-Hsiang Lu
2006Equivalence verification of arithmetic datapaths with multiple word-length operands.
Namrata Shekhar, Priyank Kalla, Florian Enescu
2006Evaluating coverage of error detection logic for soft errors using formal methods.
Udo Krautz, Matthias Pflanz, Christian Jacobi, Hans-Werner Tast, Kai Weber, Heinrich Theodor Vierhaus
2006Exploiting TLM and object introspection for system-level simulation.
Giovanni Beltrame, Donatella Sciuto, Cristina Silvano, Damien Lyonnard, Chuck Pilkington
2006Exploiting data-dependent slack using dynamic multi-VDD to minimize energy consumption in datapath circuits.
Kaushal R. Gandhi, Nihar R. Mahapatra
2006Exploring "temperature-aware" design in low-power MPSoCs.
Giacomo Paci, Paul Marchal, Francesco Poletti, Luca Benini
2006Exploring trade-off's between centralized versus decentralized automotive architectures using a virtual integration environment.
Sri Kanajan, Haibo Zeng, Claudio Pinello, Alberto L. Sangiovanni-Vincentelli
2006Extraction of defect density and size distributions from wafer sort test results.
Jeffrey E. Nelson, Thomas Zanon, Rao Desineni, Jason G. Brown, N. Patil, Wojciech Maly, R. D. (Shawn) Blanton
2006FPGA architecture characterization for system level performance analysis.
Douglas Densmore, Adam Donlin, Alberto L. Sangiovanni-Vincentelli
2006Fast-prototyping using the BTnode platform.
Jan Beutel
2006Faster exploration of high level design alternatives using UML for better partitions.
Waseem Ahmed, Doug Myers
2006Formal performance analysis and simulation of UML/SysML models for ESL design.
Alexander Viehl, Timo Schönwald, Oliver Bringmann, Wolfgang Rosenstiel
2006Formal verification of systemc designs using a petri-net based representation.
Daniel Karlsson, Petru Eles, Zebo Peng
2006From UML/SysML to Matlab/Simulink: current state and future perspectives.
Yves Vanderperren, Wim Dehaene
2006Functional constraints vs. test compression in scan-based delay testing.
Ilia Polian, Hideo Fujiwara
2006Functional test generation using property decompositions for validation of pipelined processors.
Heon-Mo Koo, Prabhat Mishra
2006Functional verification methodology based on formal interface specification and transactor generation.
Felice Balarin, Roberto Passerone
2006Generation of broadside transition fault test sets that detect four-way bridging faults.
Irith Pomeranz, Sudhakar M. Reddy
2006HDL models of ferromagnetic core hysteresis using timeless discretisation of the magnetic slope.
Hessa Al-Junaid, Tom J. Kazmierski
2006Hardware efficient architectures for Eigenvalue computation.
Yang Liu, Christos-Savvas Bouganis, Peter Y. K. Cheung, Philip Heng Wai Leong, Stephen J. Motley
2006Heterogeneous behavioral hierarchy for system level designs.
Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Bergamaschi
2006Hierarchy-aware and area-efficient test infrastructure design for core-based system chips.
Anuja Sehgal, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty
2006High level synthesis of higher order continuous time state variable filters with minimum sensitivity and hardware count.
Soumya Pandit, Sougata Kar, Chittaranjan A. Mandal, Amit Patra
2006Hogthrob: towards a sensor network infrastructure for sow monitoring (wireless sensor network special day).
Philippe Bonnet, Martin Leopold, Klaus Madsen
2006Impact of bit-width specification on the memory hierarchy for a real-time video processing system.
Benny Thörnberg, Mattias O'Nils
2006Improved offset-analysis using multiple timing-references.
Rafik Henia, Rolf Ernst
2006Integrated data relocation and bus reconfiguration for adaptive system-on-chip platforms.
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan, Sujit Dey
2006Integrated placement and skew optimization for rotary clocking.
Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C. N. Sze
2006Is "Network" the next "Big Idea" in design?
Radu Marculescu, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli
2006Large power grid analysis using domain decomposition.
Quming Zhou, Kai Sun, Kartik Mohanram, Danny C. Sorensen
2006Large scale RLC circuit analysis using RLCG-MNA formulation.
Yuichi Tanji, Takayuki Watanabe, Hidemasa Kubota, Hideki Asai
2006Layout driven data communication optimization for high level synthesis.
Ryan Kastner, Wenrui Gong, Xin Hao, Forrest Brewer, Adam Kaplan, Philip Brisk, Majid Sarrafzadeh
2006Lens aberration aware timing-driven placement.
Andrew B. Kahng, Chul-Hong Park, Puneet Sharma, Qinke Wang
2006Lock-free synchronization for dynamic embedded real-time systems.
Hyeonjoong Cho, Binoy Ravindran, E. Douglas Jensen
2006Low power synthesis of dynamic logic circuits using fine-grained clock gating.
Nilanjan Banerjee, Kaushik Roy, Hamid Mahmoodi-Meimand, Swarup Bhunia
2006Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects.
Martin Omaña, José Manuel Cazeaux, Daniele Rossi, Cecilia Metra
2006Low-power design tools: are EDA vendors taking this matter seriously?
Enrico Macii, Massoud Pedram, Dirk Friebel, Robert C. Aitken, Antun Domic, Roberto Zafalon
2006MATLAB/Simulink for automotive systems design.
Jon Friedman
2006Management of complex automotive communication networks.
Thomas Weber
2006Memory centric thread synchronization on platform FPGAs.
Chidamber Kulkarni, Gordon J. Brebner
2006Microarchitectural floorplanning under performance and thermal tradeoff.
Michael B. Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, Gabriel H. Loh
2006Minimizing ohmic loss and supply voltage variation using a novel distributed power supply network.
Mark M. Budnik, Kaushik Roy
2006Minimizing test power in SRAM through reduction of pre-charge activity.
Luigi Dilillo, Paul M. Rosinger, Bashir M. Al-Hashimi, Patrick Girard
2006Model-based development of in-vehicle software.
Mirko Conrad, Heiko Dörr
2006Model-based testing of automotive electronics.
Klaus Lamberg
2006Modeling multiple input switching of CMOS gates in DSM technology using HDMR.
Jayashree Sridharan, Tom Chen
2006Monolithic verification of deep pipelines with collapsed flushing.
Roma Kane, Panagiotis Manolios, Sudarshan K. Srinivasan
2006Multiple-fault diagnosis based on single-fault activation and single-output observation.
Yung-Chieh Lin, Kwang-Ting Cheng
2006Multiprocessor synthesis for periodic hard real-time tasks under a given energy constraint.
Heng-Ruey Hsu, Jian-Jia Chen, Tei-Wei Kuo
2006New methods and coverage metrics for functional verification.
Vasco Jerinic, Jan Langer, Ulrich Heinkel, Dietmar Müller
2006Next generation architectures can dramatically reduce the 4G deployment cycle.
D. Shaver
2006Non-gaussian statistical interconnect timing analysis.
Soroush Abbaspour, Hanif Fatemi, Massoud Pedram
2006Nonlinear model order reduction using remainder functions.
Jose A. Martinez, Steven P. Levitan, Donald M. Chiarulli
2006Novel designs for thermally robust coplanar crossing in QCA.
Sanjukta Bhanja, Marco Ottavi, Fabrizio Lombardi, Salvatore Pontarelli
2006On test conditions for the detection of open defects.
Bram Kruseman, Manuel Heiligers
2006On the evaluation of transactor-based verification for reusing TLM assertions and testbenches at RTL.
Nicola Bombieri, Franco Fummi, Graziano Pravadelli
2006On the numerical verification of probabilistic rewriting systems.
Jounaïdi Ben Hassen, Sofiène Tahar
2006On the relation between simulation-based and SAT-based diagnosis.
Görschwin Fey, Sean Safarpour, Andreas G. Veneris, Rolf Drechsler
2006On-chip 8GHz non-periodic high-swing noise detector.
Mohamed Abbas, Makoto Ikeda, Kunihiro Asada
2006On-chip bus thermal analysis and optimization.
Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2006Online RF checkers for diagnosing multi-gigahertz automatic test boards on low cost ATE platforms.
Ganesh Srinivasan, Friedrich Taenzler, Abhijit Chatterjee
2006Online energy-aware I/O device scheduling for hard real-time systems.
Hui Cheng, Steve Goddard
2006Optical routing for 3D system-on-package.
Jacob R. Minz, Somaskanda Thyagaraja, Sung Kyu Lim
2006Optimal periodic testing of intermittent faults in embedded pipelined processor applications.
Nektarios Kranitis, Andreas Merentitis, Nikolaos Laoutaris, George Theodorou, Antonis M. Paschalis, Dimitris Gizopoulos, Constantin Halatsis
2006Optimizing high speed arithmetic circuits using three-term extraction.
Anup Hosangadi, Farzan Fallah, Ryan Kastner
2006Optimizing sequential cycles through Shannon decomposition and retiming.
Cristian Soviani, Olivier Tardieu, Stephen A. Edwards
2006Optimizing the generation of object-oriented real-time embedded applications based on the real-time specification for Java.
Marco A. Wehrmeister, Carlos Eduardo Pereira, Leandro Buss Becker
2006Parallel co-simulation using virtual synchronization with redundant host execution.
Dohyung Kim, Soonhoi Ha, Rajesh Gupta
2006Performance analysis of greedy shapers in real-time systems.
Ernesto Wandeler, Alexander Maxiaguine, Lothar Thiele
2006Performance evaluation for system-on-chip architectures using trace-based transaction level simulation.
Thomas Wild, Andreas Herkersdorf, Rainer Ohlendorf
2006Performance optimization for energy-aware adaptive checkpointing in embedded real-time systems.
Zhongwen Li, Hong Chen, Shui Yu
2006Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits.
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias Kougianos
2006Platform-based design of wireless sensor networks for industrial applications.
Alvise Bonivento, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
2006Power analysis of mobile 3D graphics.
Bren Mochocki, Kanishka Lahiri, Srihari Cadambi
2006Power constrained and defect-probability driven SoC test scheduling with test set partitioning.
Zhiyuan He, Zebo Peng, Petru Eles
2006Power-aware compilation for embedded processors with dynamic voltage scaling and adaptive body biasing capabilities.
Po-Kuan Huang, Soheil Ghiasi
2006Power-constrained test scheduling for multi-clock domain SoCs.
Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara
2006Power/performance hardware optimization for synchronization intensive applications in MPSoCs.
Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa
2006Pre-synthesis optimization of multiplications to improve circuit performance.
Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida
2006Priority scheduling in digital microfluidics-based biochips.
Andrew J. Ricketts, Kevin M. Irick, Narayanan Vijaykrishnan, Mary Jane Irwin
2006Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006
Georges G. E. Gielen
2006Procrastinating voltage scheduling with discrete frequency sets.
Zhijian Lu, Yan Zhang, Mircea R. Stan, John C. Lach, Kevin Skadron
2006Proven correct monitors from PSL specifications.
Katell Morin-Allory, Dominique Borrione
2006Pseudorandom functional BIST for linear and nonlinear MEMS.
Achraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur
2006Quantifier structure in search based procedures for QBFs.
Enrico Giunchiglia, Massimo Narizzano, Armando Tacchella
2006Quantitative analysis of transaction level models for the AMBA bus.
Gunar Schirner, Rainer Dömer
2006RAS-NANO: a reliability-aware synthesis framework for reconfigurable nanofabrics.
Chen He, Margarida F. Jacome
2006Reducing the sub-threshold and gate-tunneling leakage of SRAM cells using Dual-Vt and Dual-Tox assignment.
Behnam Amelifard, Farzan Fallah, Massoud Pedram
2006Restructuring field layouts for embedded memory systems.
Keoncheol Shin, Jungeun Kim, Seonggun Kim, Hwansoo Han
2006Reuse-based test access and integrated test scheduling for network-on-chip.
Chunsheng Liu, Zach Link, Dhiraj K. Pradhan
2006Scalable performance-energy trade-off exploration of embedded real-time systems on multiprocessor platforms.
Zhe Ma, Francky Catthoor
2006Scheduling under resource constraints using dis-equations.
Hadda Cherroun, Alain Darte, Paul Feautrier
2006Simultaneously improving code size, performance, and energy in embedded processors.
Ahmad Zmily, Christos Kozyrakis
2006Smart bit-width allocation for low power optimization in a systemc based ASIC design environment.
Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou
2006SoC: fuelling the hopes of the mobile industry.
Uwe Lambrette, Booz Allen Hamilton
2006Sociology of design and EDA.
Walden C. Rhines
2006Soft delay error analysis in logic circuits.
Balkaran S. Gill, Christos A. Papachristou, Francis G. Wolff
2006Soft-error classification and impact analysis on real-time operating systems.
N. Ignat, Bogdan Nicolescu, Yvon Savaria, Gabriela Nicolescu
2006Software annotations for power optimization on mobile devices.
Radu Cornea, Alexandru Nicolau, Nikil D. Dutt
2006Software-based self-test of processors under power constraints.
Jun Zhou, Hans-Joachim Wunderlich
2006Space of DRAM fault models and corresponding testing.
Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor
2006Statistical timing analysis with path reconvergence and spatial correlations.
Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen
2006Strong conflict analysis for propositional satisfiability.
HoonSang Jin, Fabio Somenzi
2006Supporting task migration in multi-processor systems-on-chip: a feasibility study.
Stefano Bertozzi, Andrea Acquaviva, Davide Bertozzi, Antonio Poggiali
2006Synthesis of fault-tolerant schedules with transparency/performance trade-offs for distributed embedded systems.
Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
2006System-level scheduling on instruction cell based reconfigurable systems.
Ying Yi, Ioannis Nousias, Mark Milward, Sami Khawam, Tughrul Arslan, Iain Lindsay
2006Systematic and optimal design of CMOS two-stage opamps with hybrid cascode compensation.
Mohammad Yavari, Omid Shoaei, Ángel Rodríguez-Vázquez
2006Systematic methodology for designing reconfigurable Delta-Sigma modulator topologies for multimode communication systems.
Ying Wei, Hua Tang, Alex Doboli
2006Systematic stability-analysis method for analog circuits.
Gerd Vandersteen, Stephane Bronckers, Petr Dobrovolný, Yves Rolain
2006TRAIN: a virtual transaction layer architecture for TLM-based HW/SW codesign of synthesizable MPSoC.
Wolfgang Klingauf, Hagen Gädke, Robert Günzel
2006Task-accurate performance modeling in SystemC for real-time multi-processor architectures.
Martin Streubühr, Joachim Falk, Christian Haubelt, Jürgen Teich, Rainer Dorsch, Thomas Schlipf
2006Temporal partitioning for image processing based on time-space complexity in reconfigurable architectures.
Paulo Sérgio B. do Nascimento, Manoel Eusébio de Lima
2006Temporal performance degradation under NBTI: estimation and design for improved reliability of nanoscale circuits.
Bipul Chandra Paul, Kunhyuk Kang, Haldun Kufluoglu, Muhammad Ashraful Alam, Kaushik Roy
2006Test and reliability challenges in automotive microelectronics.
Christian Sebeke, C. Jung, Klaus Harbich, S. Fuchs, J. Schwarz, Peter Göhner
2006Test compaction for transition faults under transparent-scan.
Irith Pomeranz, Sudhakar M. Reddy
2006Test generation for combinational quantum cellular automata (QCA) circuits.
Pallav Gupta, Niraj K. Jha, Loganathan Lingappan
2006Test scheduling with thermal optimization for network-on-chip systems using variable-rate on-chip clocking.
Chunsheng Liu, Vikram Iyengar
2006Test set enrichment using a probabilistic fault model and the theory of output deviations.
Zhanglei Wang, Krishnendu Chakrabarty, Michael Gössel
2006The ultra low-power wiseNET system.
Amre El-Hoiydi, Claude Arm, Ricardo Caseiro, Stefan Cserveny, Jean-Dominique Decotignie, Christian C. Enz, Frédéric Giroud, Steve Gyger, E. Leroux, Thierry Melly, Vincent Peiris, Franz-Xaver Pengg, Pierre-David Pfister, Nicolas Raemy, A. Ribordy, David Ruffieux, Patrick Volet
2006Thermal resilient bounded-skew clock tree optimization methodology.
Ashutosh Chakraborty, Prassanna Sithambaram, Karthik Duraisami, Alberto Macii, Enrico Macii, Massimo Poncino
2006Time domain model order reduction by wavelet collocation method.
Xuan Zeng, Lihong Feng, Yangfeng Su, Wei Cai, Dian Zhou, Charles C. Chiang
2006Timing-driven cell layout de-compaction for yield optimization by critical area minimization.
Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada
2006Timing-reasoning-based delay fault diagnosis.
Kai Yang, Kwang-Ting Cheng
2006Top-down heterogeneous synthesis of analog and mixed-signal systems.
Ewout Martens, Georges G. E. Gielen
2006Two-phase resonant clocking for ultra-low-power hearing aid applications.
Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner
2006Ultra-efficient (embedded) SOC architectures based on probabilistic CMOS (PCMOS) technology.
Lakshmi N. Chakrapani, Bilge Saglam Akgul, Suresh Cheemalavagu, Pinar Korkmaz, Krishna V. Palem, Balasubramanian Seshasayee
2006Ultralow power computing with sub-threshold leakage: a comparative study of bulk and SOI technologies.
Arijit Raychowdhury, Bipul Chandra Paul, Swarup Bhunia, Kaushik Roy
2006Using conjugate symmetries to enhance gate-level simulations.
Peter M. Maurer
2006Value-based bit ordering for energy optimization of on-chip global signal buses.
Krishnan Sundaresan, Nihar R. Mahapatra
2006Verifying analog oscillator circuits using forward/backward abstraction refinement.
Goran Frehse, Bruce H. Krogh, Rob A. Rutenbar
2006Virtual prototyping of embedded platforms for wireless and multimedia.
Tim Kogel, Matthew Braun
2006Vulnerability analysis of L2 cache elements to single event upsets.
Hossein Asadi, Vilas Sridharan, Mehdi Baradaran Tahoori, David R. Kaeli
2006What lies between design intent coverage and model checking?
Sayantan Das, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti
2006Wireless sensor networks and beyond.
Paul J. M. Havinga
2006optiMap: a tool for automated generation of noc architectures using multi-port routers for FPGAs.
Balasubramanian Sethuraman, Ranga Vemuri