DATE A

313 papers

YearTitle / Authors
20052005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany
2005A Complete Network-On-Chip Emulation Framework.
Nicolas Genko, David Atienza, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida, Francky Catthoor
2005A Constraint Network Based Approach to Memory Layout Optimization.
Guilin Chen, Mahmut T. Kandemir, Mustafa Karaköy
2005A Contribution to Branch Prediction Modeling in WCET Analysi.
Claire Burguière, Christine Rochange
2005A Coprocessor for Accelerating Visual Information Processing.
Walter Stechele, L. Alvado Cárcel, Stephan Herrmann, J. Lidón Simón
2005A Decompilation Approach to Partitioning Software for Microprocessor/FPGA Platforms.
Greg Stitt, Frank Vahid
2005A Dependability-Driven System-Level Design Approach for Embedded Systems.
Arshad Jhumka, Stephan Klaus, Sorin A. Huss
2005A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification.
Kees Goossens, John Dielissen, Om Prakash Gangwal, Santiago González Pestana, Andrei Radulescu, Edwin Rijpkema
2005A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs.
José Luis Rosselló, Vicent Canals, Sebastià A. Bota, Ali Keshavarzi, Jaume Segura
2005A Fast Diagnosis Scheme for Distributed Small Embedded SRAMs.
Baosheng Wang, Yuejian Wu, André Ivanov
2005A Faster Counterexample Minimization Algorithm Based on Refutation Analysis.
Shengyu Shen, Ying Qin, Sikun Li
2005A Hardware-Friendly Wavelet Entropy Codec for Scalable Video.
Hendrik Eeckhaut, Harald Devos, Benjamin Schrauwen, Mark Christiaens, Dirk Stroobandt
2005A High Quality/Low Computational Cost Technique for Block Matching Motion Estimation.
Sebastián López, Gustavo M. Callicó, José Francisco López, Roberto Sarmiento
2005A Hybrid Prefetch Scheduling Heuristic to Minimize at Run-Time the Reconfiguration Overhead of Dynamically Reconfigurable Hardware.
Javier Resano, Daniel Mozos, Francky Catthoor
2005A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck.
Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
2005A Model-Based Approach for Executable Specifications on Reconfigurable Hardware.
Tim Schattkowsky, Wolfgang Müller, Achim Rettberg
2005A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms.
Torsten Kempf, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel, Bart Vanthournout
2005A Network Traffic Generator Model for Fast Network-on-Chip Simulation.
Shankar Mahadevan, Federico Angiolini, Michael Storgaard, Rasmus Grøndahl Olsen, Jens Sparsø, Jan Madsen
2005A New Approach to Component Testing.
Horst Brinkmeyer
2005A New Embedded Measurement Structure for eDRAM Capacitor.
Laurent Lopez, Jean-Michel Portal, Didier Née
2005A New System Design Methodology for Wire Pipelined SoC.
Mario R. Casu, Luca Macchiarulo
2005A New Task Model for Streaming Applications and Its Schedulability Analysis.
Samarjit Chakraborty, Lothar Thiele
2005A Novel Low-overhead Delay Testing Technique for Arbitrary Two-Pattern Test Application.
Swarup Bhunia, Hamid Mahmoodi-Meimand, Arijit Raychowdhury, Kaushik Roy
2005A Novel Unified Architecture for Public-Key Cryptography.
Alessandro Cilardo, Antonino Mazzeo, Nicola Mazzocca, Luigi Romano
2005A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation.
Jae-Gon Lee, Moo-Kyoung Chung, Ki-Yong Ahn, Sang-Heon Lee, Chong-Min Kyung
2005A Probabilistic Collocation Method Based Statistical Gate Delay Model Considering Process Variations and Multiple Input Switching.
Y. Satish Kumar, Jun Li, Claudio Talarico, Janet Meiling Wang
2005A Public-Key Watermarking Technique for IP Designs.
Amr Talaat Abdel-Hamid, Sofiène Tahar, El Mostapha Aboulhamid
2005A Quality-of-Service Mechanism for Interconnection Networks in System-on-Chips.
Wolf-Dietrich Weber, Joe Chou, Ian Swarbrick, Drew Wingard
2005A Real-Time Streaming Memory Controller.
Artur Burchard, Ewa Hekstra-Nowacka, Atul Chauhan
2005A Register Allocation Algorithm in the Presence of Scalar Replacement for Fine-Grain Configurable Architectures.
Nastaran Baradaran, Pedro C. Diniz
2005A Router Architecture for Connection-Oriented Service Guarantees in the MANGO Clockless Network-on-Chip.
Tobias Bjerregaard, Jens Sparsø
2005A SoC Design Methodology Involving a UML 2.0 Profile for SystemC.
Elvinia Riccobene, Patrizia Scandurra, Alberto Rosti, Sara Bocchio
2005A Study of the Speedups and Competitiveness of FPGA Soft Processor Cores using Dynamic Hardware/Software Partitioning.
Roman L. Lysecky, Frank Vahid
2005A Synthesizable IP Core for DVB-S2 LDPC Code Decoding.
Frank Kienle, Torben Brack, Norbert Wehn
2005A Technology-Aware and Energy-Oriented Topology Exploration for On-Chip Networks.
Hangsheng Wang, Li-Shiuan Peh, Sharad Malik
2005A Time Slice Based Scheduler Model for System Level Design.
Luciano Lavagno, Claudio Passerone, Vishal Shah, Yosinori Watanabe
2005A Tool and Methodology for AC-Stability Analysis of Continuous-Time Closed-Loop Systems.
Momchil Milev, Rod Burt
2005A Two-Level Modeling Approach to Analog Circuit Performance Macromodeling.
Mengmeng Ding, Ranga Vemuri
2005A VLSI Design Flow for Secure Side-Channel Attack Resistant ICs.
Kris Tiri, Ingrid Verbauwhede
2005A Way Memoization Technique for Reducing Power Consumption of Caches in Application Specific Integrated Processors.
Tohru Ishihara, Farzan Fallah
2005Access Pattern-Based Code Compression for Memory-Constrained Embedded Systems.
Ozcan Ozturk, Hendra Saputra, Mahmut T. Kandemir, Ibrahim Kolcu
2005Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices.
Smita Krishnaswamy, George F. Viamontes, Igor L. Markov, John P. Hayes
2005Activity Packing in FPGAs for Leakage Power Reduction.
Hassan Hassan, Mohab Anis, Antoine El Daher, Mohamed I. Elmasry
2005An Accurate SER Estimation Method Based on Propagation Probability.
Ghazanfar Asadi, Mehdi Baradaran Tahoori
2005An Application-Specific Design Methodology for STbus Crossbar Generation.
Srinivasan Murali, Giovanni De Micheli
2005An Approximation Algorithm for Energy-Efficient Scheduling on A Chip Multiprocessor.
Chuan-Yue Yang, Jian-Jia Chen, Tei-Wei Kuo
2005An Efficient Algorithm for Finding Double-Vertex Dominators in Circuit Graphs.
Maxim Teslenko, Elena Dubrova
2005An Efficient BICS Design for SEUs Detection and Correction in Semiconductor Memories.
Balkaran S. Gill, Michael Nicolaidis, Francis G. Wolff, Christos A. Papachristou, Steven L. Garverick
2005An Efficient Sequential SAT Solver With Improved Search Strategies.
Feng Lu, Madhu K. Iyer, Ganapathy Parthasarathy, Li-C. Wang, Kwang-Ting Cheng, Kuang-Chien Chen
2005An Efficient Transparent Test Scheme for Embedded Word-Oriented Memories.
Jin-Fu Li, Tsu-Wei Tseng, Chin-Long Wey
2005An Efficiently Preconditioned GMRES Method for Fast Parasitic-Sensitive Deep-Submicron VLSI Circuit Simulation.
Zhao Li, Chuanjin Richard Shi
2005An Improved FPGA Implementation of the Modified Hybrid Hiding Encryption Algorithm (MHHEA) for Data Communication Security.
Hala A. Farouk, Magdy Saeb
2005An Improved Multi-Level Framework for Force-Directed Placement.
Kristofer Vorwerk, Andrew A. Kennings
2005An Infrastructure to Functionally Test Designs Generated by Compilers Targeting FPGAs.
Rui Rodrigues, João M. P. Cardoso
2005An Iterative Algorithm for Battery-Aware Task Scheduling on Portable Computing Platforms.
Jawad Khan, Ranga Vemuri
2005An O(bn
Zhuo Li, Weiping Shi
2005Analog and Digital Circuit Design in 65 nm CMOS: End of the Road?
Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich
2005Applying UML and MDA to Real Systems Design.
Ian Oliver
2005Area Efficient Hardware Implementation of Elliptic Curve Cryptography by Iteratively Applying Karatsuba's Method.
Zoya Dyka, Peter Langendörfer
2005Area and Throughput Trade-Offs in the Design of Pipelined Discrete Wavelet Transform Architectures.
Sandro V. Silva, Sergio Bampi
2005Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction.
Takeshi Kitahara, Naoyuki Kawabe, Fumihiro Minami, Katsuhiro Seta, Toshiyuki Furusawa
2005Assertion-Based Design Exploration of DVS in Network Processor Architectures.
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin
2005At-Speed Logic BIST for IP Cores.
B. Cheon, E. Lee, Laung-Terng Wang, Xiaoqing Wen, Po-Ching Hsu, Jin Woo Cho, J. Park, Hao-Jan Chao, Shianling Wu
2005AutoMoDe - Model-Based Development of Automotive Software.
Dirk Ziegenbein, Peter Braun, Ulrich Freund, Andreas Bauer, Jan Romberg, Bernhard Schätz
2005Automated Synthesis of Assertion Monitors using Visual Specifications.
Ambar A. Gadkari, S. Ramesh
2005Automatic Formal Verification of Fused-Multiply-Add FPUs.
Christian Jacobi, Kai Weber, Viresh Paruthi, Jason Baumgartner
2005Automatic Timing Model Generation by CFG Partitioning and Model Checking.
Ingomar Wenzel, Bernhard Rieder, Raimund Kirner, Peter P. Puschner
2005Automotive System Architectures (Automotive Special Day).
Jürgen Bortolazzi, J.-L. Maté, J. Becker, C. Morgano
2005Automotive System Design - Challenges and Potential.
Harald Heinecke
2005BB-GC: Basic-Block Level Garbage Collection.
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
2005Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis.
Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida
2005Bound Set Selection and Circuit Re-Synthesis for Area/Delay Driven Decomposition.
Andrés Martinelli, Elena Dubrova
2005Bright-Field AAPSM Conflict Detection and Correction.
Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky
2005Buffer Insertion Considering Process Variation.
Jinjun Xiong, King Ho Tam, Lei He
2005Buffer Insertion for Bridges and Optimal Buffer Sizing for Communication Sub-System of Systems-on-Chip.
Sankalp Kallakuri, Alex Doboli, Eugene A. Feinberg
2005C Based Hardware Design for Wireless Applications.
Andrés Takach, Bryan Bowyer, Thomas Bollaert
2005C Compiler Retargeting Based on Instruction Semantics Models.
Jianjiang Ceng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun
2005CAFFEINE: Template-Free Symbolic Model Generation of Analog Circuits via Canonical Form Functions and Genetic Programming.
Trent McConaghy, Tom Eeckelaert, Georges G. E. Gielen
2005CMOS-Based Biosensor Arrays.
Roland Thewes, Christian Paulus, Meinrad Schienle, Franz Hofmann, Alexander Frey, Ralf Brederlow, Marcin K. Augustyniak, Martin Jenkner, Björn Eversmann, Petra Schindler-Bauer, Melanie Atzesberger, Birgit Holzapfl, Gottfried Beer, Thomas Haneder, Hans-Christian Hanke
2005Cantilever-Based Biosensors in CMOS Technology.
Kay-Uwe Kirstein, Yue Li, Martin Zimmermann, Cyril Vancura, Tormod Volden, Wan Ho Song, Jan Lichtenberg, Andreas Hierlemann
2005Centralized Run-Time Resource Management in a Network-on-Chip Containing Reconfigurable Hardware Tiles.
Vincent Nollet, Théodore Marescaux, Prabhat Avasare, Jean-Yves Mignolet
2005Challenges in Embedded Memory Design and Test.
Erik Jan Marinissen, Betty Prince, Doris Keitel-Schulz, Yervant Zorian
2005Circuit Based Quantification: Back to State Set Manipulation within Unbounded Model Checking.
Gianpiero Cabodi, Marco Crivellari, Sergio Nocco, Stefano Quer
2005Circuit-Level Modeling for Concurrent Testing of Operational Defects due to Gate Oxide Breakdown.
Jonathan R. Carter, Sule Ozev, Daniel J. Sorin
2005Compiler-Based Approach for Exploiting Scratch-Pad in Presence of Irregular Array Access.
Mohammed Javed Absar, Francky Catthoor
2005Compiler-Directed Instruction Duplication for Soft Error Detection.
Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2005Compositional Memory Systems for Multimedia Communicating Tasks.
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven
2005Computational Intelligence Characterization Method of Semiconductor Device.
Eric Liau, Doris Schmitt-Landsiedel
2005Concurrent Error Detection in Asynchronous Burst-Mode Controllers.
Sobeeh Almukhaizim, Yiorgos Makris
2005Considering Circuit Observability Don't Cares in CNF Satisfiability.
Zhaohui Fu, Yinlei Yu, Sharad Malik
2005Context Sensitive Performance Analysis of Automotive Applications.
Jan Staschulat, Rolf Ernst, Andreas Schulze, Fabian Wolf
2005Context-Aware Scheduling Analysis of Distributed Systems with Tree-Shaped Task-Dependencies.
Rafik Henia, Rolf Ernst
2005Correct-by-Construction Transformations across Design Environments for Model-Based Embedded Software Development.
Massimo Baleani, Alberto Ferrari, Leonardo Mangeruca, Alberto L. Sangiovanni-Vincentelli, Ulrich Freund, Erhard Schlenker, Hans-Jörg Wolff
2005Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs.
Jürgen Schnerr, Oliver Bringmann, Wolfgang Rosenstiel
2005DPA on Quasi Delay Insensitive Asynchronous Circuits: Formalization and Improvement.
G. Fraidy Bouesse, Marc Renaudin, Sophie Dumont, Fabien Germain
2005DVS for On-Chip Bus Designs Based on Timing Error Correction.
Himanshu Kaul, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge, Todd M. Austin
2005Debug Support, Calibration and Emulation for Multiple Processor and Powertrain Control SoCs.
Albrecht Mayer, Harry Siebert, Klaus D. McDonald-Maier
2005Defect Aware Test Patterns.
Huaxing Tang, Gang Chen, Sudhakar M. Reddy, Chen Wang, Janusz Rajski, Irith Pomeranz
2005Defining an Enhanced RTL Semantics.
Shuqing Zhao, Daniel D. Gajski
2005Design Method for Constant Power Consumption of Differential Logic Circuits.
Kris Tiri, Ingrid Verbauwhede
2005Design Optimization of Time-and Cost-Constrained Fault-Tolerant Distributed Embedded Systems.
Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
2005Design Refinement for Efficient Cluste ing of Objects in Embedded Systems.
Waseem Ahmed, Doug Myers
2005Design Space Exploration for Dynamically Reconfigurable Architectures.
Benoît Miramond, Jean-Marc Delosme
2005Design for Verification of SystemC Transaction Level Models.
Ali Habibi, Sofiène Tahar
2005Design of Fault-Tolerant and Dynamically-Reconfigurable Microfluidic Biochips.
Fei Su, Krishnendu Chakrabarty
2005Design of a Virtual Component Neutral Network-on-Chip Transaction Layer.
Philippe Martin
2005Designer-Driven Topology Optimization for Pipelined Analog to Digital Converters.
Yu-Tsun Chien, Dong Chen, Jea-Hong Lou, Gin-Kou Ma, Rob A. Rutenbar, Tamal Mukherjee
2005Diagnostic and Detection Fault Collapsing for Multiple Output Circuits.
Raja K. K. R. Sandireddy, Vishwani D. Agrawal
2005Direct Conversion Pulsed UWB Transceiver Architecture.
Raúl Blázquez, Fred S. Lee, David D. Wentzloff, Brian P. Ginsburg, Johnna Powell, Anantha P. Chandrakasan
2005Distributed HW/SW-Partitioning for Embedded Reconfigurable Networks.
Thilo Streichert, Christian Haubelt, Jürgen Teich
2005EM Wave Coupling Noise Modeling Based on Chebyshev Approximation and Exact Moment Formulation.
Baohua Wang, Pinaki Mazumder
2005Effective Lower Bounding Techniques for Pseudo-Boolean Optimization.
Vasco M. Manquinho, João Marques-Silva
2005Efficient Conflict-Based Learning in an RTL Circuit Constraint Solver.
Madhu K. Iyer, Ganapathy Parthasarathy, Kwang-Ting Cheng
2005Efficient Feasibility Analysis for Real-Time Systems with EDF Scheduling.
Karsten Albers, Frank Slomka
2005Efficient Multiobjective Synthesis of Analog Circuits using Hierarchical Pareto-Optimal Performance Hypersurfaces.
Tom Eeckelaert, Trent McConaghy, Georges G. E. Gielen
2005Efficient Solution of Language Equations Using Partitioned Representations.
Alan Mishchenko, Robert K. Brayton, Jie-Hong Roland Jiang, Tiziano Villa, Nina Yevtushenko
2005Embedded Automotive System Development Process.
Joachim Langenwalter
2005Encoding-Based Minimization of Inductive Cross-Talk for Off-Chip Data Transmission.
Brock J. LaMeres, Sunil P. Khatri
2005Energy Bounds for Fault-Tolerant Nanoscale Designs.
Diana Marculescu
2005Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives.
Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha P. Chandrakasan, Wim Dehaene
2005Energy- and Performance-Driven NoC Communication Architecture Synthesis Using a Decomposition Approach.
Ümit Y. Ogras, Radu Marculescu
2005Energy-Aware Routing for E-Textile Applications.
Jung-Chun Kao, Radu Marculescu
2005Energy-Efficient, Utility Accrual Real-Time Scheduling Under the Unimodal Arbitrary Arrival Model.
Haisang Wu, Binoy Ravindran, E. Douglas Jensen
2005Estimating Scalable Common-Denominator Laplace-Domain MIMO Models in an Errors-in-Variables Framework.
Gerd Vandersteen, Ludwig De Locht, Snezana Jenei, Yves Rolain, Rik Pintelon
2005Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures.
Anup Gangwar, M. Balakrishnan, Preeti Ranjan Panda, Anshul Kumar
2005Evaluation of Error-Resilience for Reliable Compression of Test Data.
Hamidreza Hashempour, Luca Schiano, Fabrizio Lombardi
2005Evolutionary Optimization in Code-Based Test Compression.
Ilia Polian, Alejandro Czutro, Bernd Becker
2005Exact Synthesis of 3-Qubit Quantum Circuits from Non-Binary Quantum Gates Using Multiple-Valued Logic and Group Theory.
Guowu Yang, William N. N. Hung, Xiaoyu Song, Marek A. Perkowski
2005Exploiting Dynamic Workload Variation in Low Energy Preemptive Task Scheduling.
Lap-Fai Leung, Chi-Ying Tsui, Xiaobo Sharon Hu
2005Exploiting Real-Time FPGA Based Adaptive Systems Technology for Real-Time Sensor Fusion in Next Generation Automotive Safety Systems.
Steve Chappell, Alistair Macarthur, Dan Preston, Dave Olmstead, Bob Flint, Chris Sullivan
2005Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions.
Mirko Loghi, Massimo Poncino
2005Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique.
César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel
2005Extended Control Flow Graph Based Performance Optimization Using Scratch-Pad Memory.
Hanlai Pu, Ling Ming, Jin Jing
2005Extraction Error Modeling and Automated Model Debugging in High-Performance Low Power Custom Designs.
Yu-Shen Yang, Andreas G. Veneris, Paul J. Thadikaran, Srikanth Venkataraman
2005FORAY-GEN: Automatic Generation of Affine Functions for Memory Optimizations.
Ilya Issenin, Nikil D. Dutt
2005FPGA Architecture for Multi-Style Asynchronous Logic.
N. Huot, H. Dubreuil, Laurent Fesquet, Marc Renaudin
2005FPGA based Agile Algorithm-On-Demand Co-Processor.
Ramachandran Pradeep, S. Vinay, Sanjay Burman, V. Kamakoti
2005Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip.
Oreste Villa, Patrick Schaumont, Ingrid Verbauwhede, Matteo Monchiero, Gianluca Palermo
2005Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture.
Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
2005Fault-Trajectory Approach for Fault Diagnosis on Analog Circuits.
Carlos Eduardo Savioli, Claudio C. Czendrodi, José Vicente Calvano, Antonio Carneiro de Mesquita Filho
2005Fine Grain QoS Control for Multimedia Application Software.
Jacques Combaz, Jean-Claude Fernandez, Thierry Lepley, Joseph Sifakis
2005Flexible Hardware/Software Support for Message Passing on a Distributed Shared Memory Architecture.
Francesco Poletti, Antonio Poggiali, Paul Marchal
2005Framework for Fault Analysis and Test Generation in DRAMs.
Zaid Al-Ars, Said Hamdioui, Georg Mueller, Ad J. van de Goor
2005Functional Coverage Driven Test Generation for Validation of Pipelined Processors.
Prabhat Mishra, Nikil D. Dutt
2005Functional Equivalence Checking for Verification of Algebraic Transformations on Array-Intensive Source Code.
K. C. Shashidhar, Maurice Bruynooghe, Francky Catthoor, Gerda Janssens
2005Functional Validation of System Level Static Scheduling.
Samar Abdi, Daniel D. Gajski
2005Generic Pipelined Processor Modeling and High Performance Cycle-Accurate Simulator Generation.
Mehrdad Reshadi, Nikil D. Dutt
2005HEBS: Histogram Equalization for Backlight Scaling.
Ali Iranli, Hanif Fatemi, Massoud Pedram
2005Hardware Accelerated Collision Detection - An Architecture and Simulation Results.
Andreas Raabe, Blazej Bartyzel, Joachim K. Anlauf, Gabriel Zachmann
2005Hardware Accelerated Power Estimation.
Joel Coburn, Srivaths Ravi, Anand Raghunathan
2005Hardware Acceleration of Hidden Markov Model Decoding for Person Detection.
Suhaib A. Fahmy, Peter Y. K. Cheung, Wayne Luk
2005Hardware Engines for Bus Encryption: A Survey of Existing Techniques.
Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Pierre Guillemin, C. Anguille, Michel Bardouillet, Christian Buatois, Jean-Baptiste Rigaud
2005Hardware Support for Arbitrarily Complex Loop Structures in Embedded Applications.
Nikolaos Kavvadias, Spiridon Nikolaidis
2005Hardware-Software Design of a Smart Sensor for Fully-Electronic DNA Hybridization Detection.
Claudio Stagni, Carlotta Guiducci, Massimo Lanzoni, Luca Benini, Bruno Riccò
2005Hierarchical Variance Analysis for Analog Circuits Based on Graph Modelling and Correlation Loop Tracing.
Fang Liu, Jacob J. Flomenberg, Devaka V. Yasaratne, Sule Ozev
2005Hotspot Prevention Through Runtime Reconfiguration in Network-On-Chip.
Greg M. Link, Narayanan Vijaykrishnan
2005Hybrid BIST Based on Repeating Sequences and Cluster Analysis.
Lei Li, Krishnendu Chakrabarty
2005IEEE 1149.4 Compatible ABMs for Basic RF Measurements.
Pekka Syri, Juha Häkkinen, Markku Moilanen
2005ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement.
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Laura Pozzi, Paolo Ienne
2005Implicit and Exact Path Delay Fault Grading in Sequential Circuits.
Mahilchi Milir Vaseekar Kumar, Spyros Tragoudas, Sreejit Chakravarty, Rathish Jayabharathi
2005Improving the Process-Variation Tolerance of Digital Circuits Using Gate Sizing and Statistical Techniques.
Osama Neiroukh, Xiaoyu Song
2005Increasing Register File Immunity to Transient Errors.
Gokhan Memik, Mahmut T. Kandemir, Ozcan Ozturk
2005Inductive and Capacitive Coupling Aware Routing Methodology Driven by a Higher Order RLCK Moment Metric.
Amitava Bhaduri, Ranga Vemuri
2005Influence of Memory Hierarchies on Predictability for Time Constrained Embedded Software.
Lars Wehmeyer, Peter Marwedel
2005Instruction Scheduling for Dynamic Hardware Configurations.
Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis
2005Integrated Electronics in the Car and the Design Chain Evolution or Revolution?
Alberto L. Sangiovanni-Vincentelli
2005Integrating UML into SoC Design Process.
Qiang Zhu, Ryosuke Oishi, Takashi Hasegawa, Tsuneo Nakata
2005Integration of Learning Techniques into Incremental Satisfiability for Efficient Path-Delay Fault Test Generation.
Kameshwar Chandrasekar, Michael S. Hsiao
2005Integration, Verification and Layout of a Complex Multimedia SOC.
Chien-Liang Chen, Jiing-Yuan Lin, Youn-Long Lin
2005Introducing Flexible Quantity Contracts into Distributed SoC and Embedded System Design Processes.
Judita Kruse, Clive Thomsen, Rolf Ernst, Thomas Volling, Thomas Spengler
2005Is there a Market for SystemC Tools?
Wolfgang Rosenstiel, Reinaldo A. Bergamaschi, Frank Ghenassia, Thorsten Groetker, Masamichi Kawarabayashi, Marinus C. van Lier, Albrecht Mayer, Mike Meredith, Mark Milligan, Stuart Swan
2005Joint Power Management of Memory and Disk.
Le Cai, Yung-Hsiang Lu
2005LC Oscillator Driver for Safety Critical Applications.
Pavel Horsky
2005LORD: A Localized, Reactive and Distributed Protocol for Node Scheduling in Wireless Sensor Networks.
Arijit Ghosh, Tony Givargis
2005Leakage-Aware Interconnect for On-Chip Network.
Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2005Lifetime Modeling of a Sensor Network.
Vivek Rai, Rabi N. Mahapatra
2005Lightweight Multitasking Support for Embedded Systems using the Phantom Serializing Compiler.
André C. Nácul, Tony Givargis
2005Locality-Aware Process Scheduling for Embedded MPSoCs.
Mahmut T. Kandemir, Guilin Chen
2005Logic Design for On-Chip Test Clock Generation - Implementation Details and Impact on Delay Test Quality.
Matthias Beck, Olivier Barondeau, Martin Kaibel, Frank Poehl, Xijiang Lin, Ron Press
2005Low Cost Task Migration Initiation in a Heterogeneous MP-SoC.
Vincent Nollet, Prabhat Avasare, Jean-Yves Mignolet, Diederik Verkest
2005Low Power Oriented CMOS Circuit Optimization Protocol.
Alexandre Verle, Xavier Michel, Nadine Azémard, Philippe Maurine, Daniel Auvergne
2005Low-Cost Multi-Gigahertz Test Systems Using CMOS FPGAs and PECL.
David C. Keezer, Carl Gray, Ashraf M. Majid, Nafeez Taher
2005MINLP Based Topology Synthesis for Delta Sigma Modulators Optimized for Signal Path Complexity, Sensitivity and Power Consumption.
Hua Tang, Ying Wei, Alex Doboli
2005Meeting the Embedded Design Needs of Automotive Applications.
Wayne Lyons
2005Memory Testing Under Different Stress Conditions: An Industrial Evaluation.
Ananta K. Majhi, Mohamed Azimane, Guido Gronthoud, Maurice Lousberg, Stefan Eichenberger, Fred Bowen
2005Mixing Global and Local Competition in Genetic Optimization based Design Space Exploration of Analog Circuits.
Abhishek Somani, Partha Pratim Chakrabarti, Amit Patra
2005Model Reuse through Hardware Design Patterns.
Fernando Rincón, Francisco Moya, Jesús Barba, Juan Carlos López
2005Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction.
Peng Li, Frank Liu, Xin Li, Lawrence T. Pileggi, Sani R. Nassif
2005Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits.
Saibal Mukhopadhyay, Swarup Bhunia, Kaushik Roy
2005Modeling and Propagation of Noisy Waveforms in Static Timing Analysis.
Shahin Nazarian, Massoud Pedram, Emre Tuncer, Tao Lin, Amir H. Ajami
2005Modeling and Verification of Globally Asynchronous and Locally Synchronous Ring Architectures.
Sohini Dasgupta, Alexandre Yakovlev
2005Modeling of a Reconfigurable OFDM IP Block Family For an RF System Simulator.
Hannu Heusala, Jussi Liedes
2005Modeling the Non-Linear Behavior of Library Cells for an Accurate Static Noise Analysis.
Cristiano Forzan, Davide Pandini
2005Multi-Placement Structures for Fast and Optimized Placement in Analog Circuit Synthesis.
Raoul F. Badaoui, Ranga Vemuri
2005Multimedia Applications of Multiprocessor Systems-on-Chips.
Wayne H. Wolf
2005Multithreaded Extension to Multicluster VLIW Processors for Embedded Applications.
Domenico Barretta, William Fornaciari, Mariagiovanna Sami, Daniele Bagni
2005Mutation Sampling Technique for the Generation of Structural Test Data.
Mathieu Scholivé, Vincent Beroulle, Chantal Robach, Marie-Lise Flottes, Bruno Rouzeyre
2005Nano-Sim: A Step Wise Equivalent Conductance based Statistical Simulator for Nanotechnology Circuit Design.
Bharat B. Sukhwani, Uday Padmanabhan, Janet Meiling Wang
2005New Perspectives and Opportunities From the Wild West of Microelectronic Biochips.
Nicolò Manaresi, Gianni Medoro, Melanie Abonnenc, Vincent Auger, Paul Vulto, Aldo Romani, Luigi Altomare, Marco Tartagni, Roberto Guerrieri
2005New Schemes for Self-Testing RAM.
Ghenadie Bodean, Diana Bodean, A. Labunetz
2005Noise Figure Evaluation Using Low Cost BIST.
Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin
2005Nonuniform Banking for Reducing Memory Energy Consumption.
Ozcan Ozturk, Mahmut T. Kandemir
2005OS Debugging Method Using a Lightweight Virtual Machine Monitor.
Tadashi Takeuchi
2005On Statistical Timing Analysis with Inter- and Intra-Die Variations.
Hratch Mangassarian, Mohab Anis
2005On the Analysis of Reed Solomon Coding for Resilience to Transient/Permanent Faults in Highly Reliable Memories.
Luca Schiano, Marco Ottavi, Fabrizio Lombardi, Salvatore Pontarelli, Adelio Salsano
2005On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs.
Fernanda Lima Kastensmidt, Luca Sterpone, Luigi Carro, Matteo Sonza Reorda
2005On-Chip Multi-Channel Waveform Monitoring for Diagnostics of Mixed-Signal VLSI Circuits.
Koichiro Noguchi, Makoto Nagata
2005On-Chip Test Infrastructure Design for Optimal Multi-Site Testing of System Chips.
Sandeep Kumar Goel, Erik Jan Marinissen
2005Optimising Test Sets for a Low Noise Amplifier with a Defect-Oriented Approach.
Rabeb Kheriji, V. Danelon, Jean-Louis Carbonéro, Salvador Mir
2005Optimized Generation of Data-Path from C Codes for FPGAs.
Zhi Guo, Betul Buyukkurt, Walid A. Najjar, Kees A. Vissers
2005PBExplore: A Framework for Compiler-in-the-Loop Exploration of Partial Bypassing in Embedded Processors.
Aviral Shrivastava, Nikil D. Dutt, Alexandru Nicolau, Eugene Earlie
2005PEG, MPEG-4, and H.264 Codec IP Development.
Chung-Jr Lian, Yu-Wen Huang, Hung-Chi Fang, Yung-Chi Chang, Liang-Gee Chen
2005Performance Considerations for an Embedded Implementation of OMA DRM 2.
Daniel Thull, Roberto Sannino
2005Performance Driven Decoupling Capacitor Allocation Considering Data and Clock Interactions.
Ajith Chandy, Tom Chen
2005Platform Based Design for Automotive Sensor Conditioning.
Luca Fanucci, A. Giambastiani, Francesco Iozzi, Corrado Marino, Alessandro Rocchi
2005Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach.
Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan, Dimitrios N. Serpanos, Yuan Xie
2005Power Saving Techniques for Wireless LANs.
Tajana Simunic
2005Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage.
Robert Bai, Nam Sung Kim, Taeho Kgil, Dennis Sylvester, Trevor N. Mudge
2005Predictable Embedding of Large Data Structures in Multiprocessor Networks-on-Chip.
Sander Stuijk, Twan Basten, Bart Mesman, Marc Geilen
2005Process Oriented Software Quality Assurance - An Experience Report in Process Improvement - OEM Perspective.
Thomas Illgen, Stefan Ortmann
2005Pueblo: A Modern Pseudo-Boolean SAT Solver.
Hossein M. Sheini, Karem A. Sakallah
2005Q-DPM: An Efficient Model-Free Dynamic Power Management Technique.
Min Li, Xiaobo Wu, Richard Yao, Xiaolang Yan
2005Quality-Driven Proactive Computation Elimination for Power-Aware Multimedia Processing.
Shrirang M. Yardi, Michael S. Hsiao, Thomas L. Martin, Dong S. Ha
2005Quantum Circuit Simplification Using Templates.
Dmitri Maslov, Christina Young, D. Michael Miller, Gerhard W. Dueck
2005Quasi-Static Voltage Scaling for Energy Minimization with Time Constraints.
Alexandru Andrei, Marcus T. Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi
2005Queue Management in Network Processors.
Ioannis Papaefstathiou, Theofanis Orphanoudakis, George Kornaros, Christopher Kachris, Ioannis Mavroidis, Aristides Nikologiannis
2005RIP: An Efficient Hybrid Repeater Insertion Scheme for Low Power.
Xun Liu, Yuantao Peng, Marios C. Papaefthymiou
2005RTK-Spec TRON: A Simulation Model of an ITRON Based RTOS Kernel in SystemC.
M. Abdelsalam Hassan, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai
2005Rapid Generation of Thermal-Safe Test Schedules.
Paul M. Rosinger, Bashir M. Al-Hashimi, Krishnendu Chakrabarty
2005Realization of a Virtual Lambda Sensor on a Fixed Precision System.
Paolo Amato, Nicola Cesario, M. Di Meglio, Francesco Pirozzi
2005Reconfigurable Elliptic Curve Cryptosystems on a Chip.
Ray C. C. Cheung, Wayne Luk, Peter Y. K. Cheung
2005Reconfigurable Linear Decompressors Using Symbolic Gaussian Elimination.
Kedarnath J. Balakrishnan, Nur A. Touba
2005Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization.
Paul Zuber, Armin Windschiegl, Raúl Medina Beltrán de Otálora, Walter Stechele, Andreas Herkersdorf
2005Refinement Maps for Efficient Verification of Processor Models.
Panagiotis Manolios, Sudarshan K. Srinivasan
2005Reliability-Centric High-Level Synthesis.
Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie
2005Reliable System Specification for Self-Checking Data-Paths.
Cristiana Bolchini, Fabio Salice, Donatella Sciuto, Luigi Pomante
2005Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization.
Yoonjin Kim, Mary Kiemb, Chulsoo Park, Jinyong Jung, Kiyoung Choi
2005SAT-Based Complete Don't-Care Computation for Network Optimization.
Alan Mishchenko, Robert K. Brayton
2005SOC Testing Methodology and Practice.
Cheng-Wen Wu
2005Scheduling of Soft Real-Time Systems for Context-Aware Applications.
Jennifer L. Wong, Weiping Liao, Fei Li, Lei He, Miodrag Potkonjak
2005Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring.
Divya Arora, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha
2005Semiconductor Industry Disaggregation vs Reaggregation: Who Will be the Shark?
Yervant Zorian, Bill Frerichs, Dennis Wassung, Jim Ensel, Guri Stark, Mike Gianfagna, Kamalesh N. Ruparel
2005Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance.
Charlotte Soens, Geert Van der Plas, Piet Wambacq, Stéphane Donnay
2005Simultaneous Partitioning and Frequency Assignment for On-Chip Bus Architectures.
Suresh Srinivasan, Lin Li, Narayanan Vijaykrishnan
2005Simultaneous Reduction of Dynamic and Static Power in Scan Structures.
Shervin Sharifi, Javid Jaffari, Mohammad Hosseinabady, Ali Afzali-Kusha, Zainalabedin Navabi
2005Smart Temperature Sensor for Thermal Testing of Cell-Based ICs.
Sebastià A. Bota, M. Rosales, José Luis Rosselló, Jaume Segura
2005SoC in Nanoera: Challenges and Endless Possibility.
Jeong-Taek Kong
2005Soft-Error Tolerance Analysis and Optimization of Nanometer Circuits.
Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee
2005Software Thread Integration and Synthesis for Real-Time Applications.
Alexander G. Dean
2005Space-Efficient Bounded Model Checking.
Jacob Katz, Ziyad Hanna, Nachum Dershowitz
2005Specification Test Compaction for Analog Circuits and MEMS.
Sounil Biswas, Peng Li, R. D. (Shawn) Blanton, Larry T. Pileggi
2005Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies.
Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay, Nilanjan Banerjee, Kaushik Roy
2005Statistical Timing Analysis using Levelized Covariance Propagation.
Kunhyuk Kang, Bipul Chandra Paul, Kaushik Roy
2005Statistical Timing Analysis with Extended Pseudo-Canonical Timing Model.
Lizheng Zhang, Weijen Chen, Yuhen Hu, Charlie Chung-Ping Chen
2005Statistical Timing Based Optimization using Gate Sizing.
Aseem Agarwal, Kaviraj Chopra, David T. Blaauw
2005Stochastic Power Grid Analysis Considering Process Variations.
Praveen Ghanta, Sarma B. K. Vrudhula, Rajendran Panda, Janet Meiling Wang
2005Striking a New Balance in the Nanometer Era: First-Time-Right and Time-to-Market Demands Versus Technology Challenges.
Garry Hughes
2005Structural Testing Based on Minimum Kernels.
Elena Dubrova
2005Studying Storage-Recomputation Tradeoffs in Memory-Constrained Embedded Processing.
Mahmut T. Kandemir, Feihui Li, Guilin Chen, Guangyu Chen, Ozcan Ozturk
2005Symmetric Multiprocessing on Programmable Chips Made Easy.
Austin Hung, William D. Bishop, Andrew A. Kennings
2005Synchronization Processor Synthesis for Latency Insensitive Systems.
Pierre Bomel, Eric Martin, Emmanuel Boutillon
2005System Level Analysis of the Bluetooth Standard.
Massimo Conti, Daniele Moretti
2005System Synthesis for Networks of Programmable Blocks.
Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid
2005SystemC Analysis of a New Dynamic Power Management Architectur.
Massimo Conti
2005Systematic Analysis of Active Clock Deskewing Systems Using Control Theory.
Vinil Varghese, Tom Chen, Peter Michael Young
2005Systematic Analysis of Energy and Delay Impact of Very Deep Submicron Process Variability Effects in Embedded SRAM Modules.
Hua Wang, Miguel Miranda, Wim Dehaene, Francky Catthoor, Karen Maex
2005Systematic Figure of Merit Computation for the Design of Pipeline ADC.
Ludovic Barrandon, Samuel Crand, Dominique Houzet
2005Systematic Transaction Level Modeling of Embedded Systems with SystemC.
Wolfgang Klingauf
2005TDMA Time Slot and Turn Optimization with Evolutionary Search Techniques.
Arne Hamann, Rolf Ernst
2005TSUNAMI: An Integrated Timing-Driven Place And Route Research Platform.
Christophe Alexandre, Hugo Clément, Jean-Paul Chaput, Marek Sroka, Christian Masson, Remy Escassut
2005Tag Overflow Buffering: An Energy-Efficient Cache Architecture.
Mirko Loghi, Paolo Azzoni, Massimo Poncino
2005Techniques for Fast Transient Fault Grading Based on Autonomous Emulation.
Celia López-Ongil, Mario García-Valderas, Marta Portela-García, Luis Entrena-Arrontes
2005Test Planning for Mixed-Signal SOCs with Wrapped Analog Cores.
Anuja Sehgal, Fang Liu, Sule Ozev, Krishnendu Chakrabarty
2005Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture.
Alexandre M. Amory, Marcelo Lubaszewski, Fernando Gehm Moraes, Edson I. Moreno
2005The Accidental Detection Index as a Fault Ordering Heuristic for Full-Scan Circuits.
Irith Pomeranz, Sudhakar M. Reddy
2005The Challenges of Hardware Synthesis from C-Like Languages.
Stephen A. Edwards
2005The Integration of On-Line Monitoring and Reconfiguration Functions using IEEE1149.4 Into a Safety Critical Automotive Electronic Control Unit.
Carl Jeffrey, Reuben Cutajar, Stephen Prosser, M. Lickess, Andrew Richardson, Stephen Riches
2005The Role of Model-Level Transactors and UML in Functional Prototyping of Systems-on-Chip: A Software-Radio Application.
Alexandre Chureau, Yvon Savaria, El Mostapha Aboulhamid
2005Thermal-Aware Task Allocation and Scheduling for Embedded Systems.
Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2005Time-Domain Simulation of Sampled Weakly Nonlinear Systems Using Analytical Integration and Orthogonal Polynomial Series.
Ewout Martens, Georges G. E. Gielen
2005Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit.
Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi, Yusuf Leblebici
2005Towards Designing Robust QCA Architectures in the Presence of Sneak Noise Paths.
Kyosun Kim, Kaijie Wu, Ramesh Karri
2005UML 2 and SysML: An Approach to Deal with Complexity in SoC/NoC Design.
Yves Vanderperren, Wim Dehaene
2005UML 2.0 - Overview and Perspectives in SoC Design.
Tim Schattkowsky
2005UML 2.0 Profile for Embedded System Design.
Petri Kukkala, Jouni Riihimäki, Marko Hännikäinen, Timo D. Hämäläinen, Klaus Kronlöf
2005Unified Modeling of Complex Real-Time Control Systems.
He Hai, Zhong Yi-fang, Cai Chi-lan
2005Uniformly-Switching Logic for Cryptographic Hardware.
Igor L. Markov, Dmitri Maslov
2005Verification of Embedded Memory Systems using Efficient Memory Modeling.
Malay K. Ganai, Aarti Gupta, Pranav Ashar
2005Verifying Safety-Critical Timing and Memory-Usage Properties of Embedded Software by Abstract Interpretation.
Reinhold Heckmann, Christian Ferdinand
2005Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation.
Franco Fummi, Mirko Loghi, Stefano Martini, Marco Monguzzi, Giovanni Perbellini, Massimo Poncino
2005Why Systems-on-Chip Needs More UML like a Hole in the Head.
Stephen J. Mellor, John R. Wolfe, Campbell McCausland
2005Wireless LAN: Past, Present, and Future.
Keith Holt
2005Worst-Case and Average-Case Analysis of n-Detection Test Sets.
Irith Pomeranz, Sudhakar M. Reddy
2005Yield Enhancement of Digital Microfluidics-Based Biochips Using Space Redundancy and Local Reconfiguration.
Fei Su, Krishnendu Chakrabarty, Vamsee K. Pamula
2005eMICAM a New Generation of Active DNA Chip with in Situ Electrochemical Detection.
Raymond Campagnolo
2005galsC: A Language for Event-Driven Embedded Systems.
Elaine Cheong, Jie Liu
2005picoArray Technology: The Tool's Story.
Andrew Duller, Daniel Towner, Gajinder Panesar, Alan Gray, Will Robbins
2005xpipes Lite: A Synthesis Oriented Design Library For Networks on Chips.
Stergios Stergiou, Federico Angiolini, Salvatore Carta, Luigi Raffo, Davide Bertozzi, Giovanni De Micheli
2004A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13µm Digital CMOS.
Christoph Sandner, Martin Clara, Andreas Santner, Thomas Hartig, Franz Kuttner
2004A 97mW 110MS/s 12b Pipeline ADC Implemented in 0.18mum Digital CMOS.
Terje N. Andersen, Atle Briskemyr, Frode Telstø, Johnny Bjørnsen, Thomas E. Bonnerud, Bjørnar Hernes, Øystein Moldsvor
2004A CMOS-Based Tactile Sensor for Continuous Blood Pressure Monitoring.
Kay-Uwe Kirstein, Jan Sedivý, Tomi Salo, Christoph Hagleitner, Tobias Vancura, Andreas Hierlemann
2004A Formal Verification Methodology for Checking Data Integrity.
Yasushi Umezawa, Takeshi Shimizu
2004A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms.
Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis
2004An Assembler Driven Verification Methodology (ADVM).
John S. MacBeth, Dietmar Heinz, Ken Gray
2004An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems.
Michele Borgatti, Andrea Capello, Umberto Rossi, Jean-Luc Lambert, Imed Moussa, Franco Fummi, Graziano Pravadelli
2004Common Reusable Verification Environment for BCA and RTL Models.
Giuseppe Falconeri, Walid Naifer, Nizar Romdhane
2004Evaluation of SystemC Modelling of Reconfigurable Embedded Systems.
Tero Rissa, Adam Donlin, Wayne Luk
2004Hardware Support for QoS-based Function Allocation in Reconfigurable Systems.
Michael Ullmann, Wansheng Jin, Jürgen Becker
2004MultiNoC: A Multiprocessing System Enabled by a Network on Chip.
Aline Mello, Leandro Möller, Ney Calazans, Fernando Gehm Moraes
2004On the Design and Verification Methodology of the Look-Aside Interface.
Ali Habibi, Asif Iqbal Ahmed, Otmane Aït Mohamed, Sofiène Tahar
2004Optical Receiver IC for CD/DVD/Blue-Laser Application.
Johannes Sturm, Martin Leifhelm, Harald Schatzmayr, Stefan Groiss, Horst Zimmermann
2004Testing Logic Cores using a BIST P1500 Compliant Approach: A Case of Study.
Paolo Bernardi, Guido Masera, Federico Quaglio, Matteo Sonza Reorda
2004Using Mobilize Power Management IP for Dynamic & Static Power Reduction in SoC at 130 nm.
Dan Hillman