DATE A

61 papers

YearTitle / Authors
2004A 16 Bit + Sign Monotonic Precise Current DAC for Sensor Applications.
Pavel Horsky
2004A CAD Methodology and Tool for the Characterization of Wide On-Chip Buses.
Ibrahim M. Elfadel, Alina Deutsch, Gerard V. Kopcsay, Bradley Rubin, Howard H. Smith
2004A Design Methodology for the Exploitation of High Level Communication Synthesis.
Francesco Bruschi, Massimo Bombana
2004A Domain-Specific Cell Based ASIC Design Methodology for Digital Signal Processing Applications.
Beibei Ren, Anru Wang, Joyopriya Bakshi, Kai Liu, Wei Li, Wayne Wei-Ming Dai
2004A Generic RTOS Model for Real-time Systems Simulation with SystemC.
Rocco Le Moigne, Olivier Pasquier, Jean Paul Calvez
2004A High-Speed Transceiver Architecture Implementable as Synthesizable IP Core.
Andreas Wortmann, Sven Simon, Matthias Müller
2004A Power Optimized Display Memory Organization for Handheld User Terminal.
Lieven Hollevoet, Andy Dewilde, Kristof Denolf, Francky Catthoor, Filip Louagie
2004A Run-Time Reconfigurable Datapath Architecture for Image Processing Applications.
Marcos R. Boschetti, Ivan Saraiva Silva, Sergio Bampi
2004A Scalable Architecture for LDPC Decodin.
Mauro Cocco, John Dielissen, Marc J. M. Heijligers, Andries Hekstra, Jos Huisken
2004A Scalable Implementation of a Reconfigurable WCDMA Rake Receiver.
Marc Quax, Jos Huisken, Jef L. van Meerbergen
2004A Simulation-Based Power-Aware Architecture Exploration of a Multiprocessor System-on-Chip Design.
Francesco Menichelli, Mauro Olivieri, Luca Benini, Monica Donno, Labros Bisdounis
2004An Inductance Modeling Flow Seamlessly Integrated in the RF IC Design Chain.
Sotiris Bantas, Yorgos Koutsoyannopoulos, Apostolos Liapis
2004Analysis and Modeling of Energy Reducing Source Code Transformations.
Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto
2004Application of a Multi-Processor SoC Platform to High-Speed Packet Forwarding.
Pierre G. Paulin, Chuck Pilkington, Essaid Bensoudane, Michel Langevin, Damien Lyonnard
2004At-Speed Testing of SOC ICs.
Vlado Vorisek, Thomas Koch, Hermann Fischer
2004Building the Hierarchy from a Flat Netlist for a Fast and Accurate Post-Layout Simulation with Parasitic Components.
Pierluigi Daglio, David Iezzi, Danilo Rimondi, Carlo Roma, Salvatore Santapa
2004Can IP Quality be Objectively Measured?
Kathy Werner
2004Carry-Save Montgomery Modular Exponentiation on Reconfigurable Hardware.
Alessandro Cilardo, Antonino Mazzeo, Luigi Romano, Giacinto Paolo Saggese
2004Channel Decoder Architecture for 3G Mobile Wireless Terminals.
Friedbert Berens, Gerd Kreiselmaier, Norbert Wehn
2004Clock Management in a Gigabit Ethernet Physical Layer Transceiver Circuit.
Juan C. Diaz, Marta Saburit
2004Customisable EPIC Processor: Architecture and Tools.
W. W. S. Chu, Robert G. Dimond, S. Perrott, S. P. Seng, Wayne Luk
2004Demonstration of a SiGe RF LNA Design Using IBM Design Kits in 0.18um SiGe BiCMOS Technology.
Yiming Chen, Xiaojuen Yuan, David Scagnelli, James Mecke, Jeff Gross, David L. Harame
2004Design and Implementation of a Secret Key Steganographic Micro-Architecture Employing FPGA.
Hala A. Farouk, Magdy Saeb
2004Design of Very Deep Pipelined Multipliers for FPGAs.
Alex Panato, Sandro V. Silva, Flávio Rech Wagner, Marcelo O. Johann, Ricardo Reis, Sergio Bampi
2004Energy Estimation Based on Hierarchical Bus Models for Power-Aware Smart Cards.
Ulrich Neffe, Klaus Rothbart, Christian Steger, Reinhold Weiss, Edgar Rieger, Andreas Mühlberger
2004Evaluation of a Refinement-Driven SystemC'-Based Design Flow.
Thorsten Schubert, Jürgen Hanisch, Joachim Gerlach, Jens-E. Appell, Wolfgang Nebel
2004Evaluation of an Object-Oriented Hardware Design Methodology for Automotive Applications.
Nico Bannow, Karsten Haug
2004Experiences during the Experimental Validation of the Time-Triggered Architecture.
Sara Blanc, Joaquin Gracia, Pedro J. Gil
2004Expert System Perimeter Block Placement Floorplanning.
Richard Auletta
2004Formal Refinement and Model Checking of an Echo Cancellation Unit.
Alexander Krupp, Wolfgang Müller, Ian Oliver
2004From Working Design Flow to Working Chips: Dependencies and Impacts of Methodology Decisions.
Robert C. Aitken, Fidel Muradali
2004Have I Really Met Timing? - Validating PrimeTime Timing Reports with Spice.
Tobias Thiel
2004Heterogeneous Co-Simulation of Networked Embedded Systems.
Franco Fummi, Stefano Martini, Giovanni Perbellini, Massimo Poncino, Fabio Ricciato, Maura Turolla
2004Highly Digital, Low-Cost Design of Statistic Signal Acquisition in SoCs.
Adão Antônio de Souza Jr., Luigi Carro
2004IEM926: An Energy Efficient SoC with Dynamic Voltage Scaling.
Krisztián Flautner, David Flynn, David Roberts, Dipesh I. Patel
2004IP Testing - The Future Differentiator?
Bill Eklow
2004Improving Design and Verification Productivity with VHDL-200x.
Stephen Bailey, Erich Marschner, Jayaram Bhasker, Jim Lewis, Peter J. Ashenden
2004Islands of Synchronicity, a Design Methodology for SoC Design.
A. P. Niranjan, Paul C. Wiscombe
2004Java-through-C Compilation: An Enabling Technology for Java in Embedded Systems.
Ankush Varma, Shuvra S. Bhattacharyya
2004LZW-Based Code Compression for VLIW Embedded Systems.
Chang Hong Lin, Yuan Xie, Wayne H. Wolf
2004Low Power Analogue 90 Degree Phase Shifter.
Peter H. Saul
2004MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time [Sigma, Delta] Modulators.
Jesús Ruiz-Amaya, Josep Lluís de la Rosa, Fernando Medeiro, Francisco V. Fernández, Rocío del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez
2004Modeling and Analysis of Heterogeneous Industrial Networks Architectures.
Franco Fummi, Stefano Martini, Marco Monguzzi, Giovanni Perbellini, Massimo Poncino
2004NeuroFPGA - Implementing Artificial Neural Networks on Programmable Logic Devices.
Daniel Ferrer, Ramiro González, Roberto Fleitas, Julio Pérez Acle, Rafael M. Canetti
2004OCCN: A Network-On-Chip Modeling and Simulation Framework.
Marcello Coppola, Stephane Curaba, Miltos D. Grammatikakis, Giuseppe Maruccia, Francesco Papariello
2004Package Design for High Performance ICs.
Sanjay Dandia
2004Project Space Exploration on the 2-D DCT Architecture of a JPEG Compressor Directed to FPGA Implementation.
Roger Endrigo Carvalho Porto, Luciano Volcan Agostini
2004Qualification and Integration of Complex I/O in SoC Design Flows.
Jay Abraham, Guruprasad Rao
2004RASoC: A Router Soft-Core for Networks-on-Chip.
César Albenes Zeferino, Márcio Eduardo Kreutz, Altamiro Amadeu Susin
2004RTL Processor Synthesis for Architecture Exploration and Implementation.
Oliver Schliebusch, Anupam Chattopadhyay, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Mario Steinert, Gunnar Braun, Achim Nohl
2004RUNE: Platform for Automated Design of Integrated Multi-Domain Systems. Application to High-Speed CMOS Photoreceiver Front-Ends.
Faress Tissafi-Drissi, Ian O'Connor, Frédéric Gaffiot
2004Software Processing Performance in Network Processors.
Ioannis Papaefstathiou, George Kornaros, Nicholaos Zervos
2004Synthesis of Embedded SystemC Design: A Case Study of Digital Neural Networks.
Djones Lettnin, Axel G. Braun, Martin Bogdan, Joachim Gerlach, Wolfgang Rosenstiel
2004System Level Power Modeling and Simulation of High-End Industrial Network-on-Chip.
Andrea Bona, Vittorio Zaccaria, Roberto Zafalon
2004Systems on Chips Design: System Manufacturer Point of View.
Veikko Loukusa, Helena Pohjonen, Antti Ruha, Tarmo Ruotsalainen, Olli Varkki
2004Test Infrastructure Design for the Nexperia? Home Platform PNX8550 System Chip.
Sandeep Kumar Goel, Kuoshu Chiu, Erik Jan Marinissen, Toan Nguyen, Steven Oostdijk
2004The Design and Test of a Smartcard Chip Using a CHAIN Self-Timed Network-on-Chip.
W. J. Bainbridge, Luis A. Plana, Stephen B. Furber
2004The Design of a High Speed ASIC Unit for the Hash Function SHA-256 (384, 512).
Luigi Dadda, Marco Macchetti, Jeff Owen
2004Utilizing Formal Assertions for System Design of Network Processors.
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Felice Balarin
2004VHDL-AMS Library Development for Pacemaker Applications.
B. Hecker, M. Chavassieux, M. Laflutte, E. Beguin, L. Lagasse, Jean Oudinot
2004Verification of a Microcontroller IP Core for System-on-a-Chip Designs Using Low-Cost Prototyping Environments.
Stephen Schmitt, Wolfgang Rosenstiel