DATE A

123 papers

YearTitle / Authors
2004A Case Study in Networks-on-Chip Design for Embedded Video.
Jiang Xu, Wayne H. Wolf, Jörg Henkel, Srimat T. Chakradhar, Tiehan Lv
2004A Compact Propagation Delay Model for Deep-Submicron CMOS Gates including Crosstalk.
José Luis Rosselló, Jaume Segura
2004A Demonstration of Co-Design and Co-Verification in a Synchronous Language.
Satnam Singh
2004A Fast Word-Level Statistical Estimator of Intra-Bus Crosstalk.
Suvodeep Gupta, Srinivas Katkoori
2004A Framework for Battery-Aware Sensor Management.
Sridhar Dasika, Sarma B. K. Vrudhula, Kaviraj Chopra, R. Srinivasan
2004A Macromodelling Methodology for Efficient High-Level Simulation of Substrate Noise Generation.
Luis Elvira, Ferran Martorell, Xavier Aragonès, José Luis González
2004A Mapping Strategy for Resource-Efficient Network Processing on Multiprocessor SoC.
Matthias Grünewald, Jörg-Christian Niemann, Mario Porrmann, Ulrich Rückert
2004A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models.
Manuel Hohenauer, Hanno Scharwächter, Kingshuk Karuri, Oliver Wahlen, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Hans van Someren
2004A Modeling Approach for Addressing Power Supply Switching Noise Related Failures of Integrated Circuit.
Chandra Tirumurti, Sandip Kundu, Susmita Sur-Kolay, Yi-Shing Chang
2004A New Approach to Timing Analysis Using Event Propagation and Temporal Logic.
Arijit Mondal, P. P. Chakrabarti, Chittaranjan A. Mandal
2004A New Effective Congestion Model in Floorplan Design.
Yi-Lin Hsieh, Tsai-Ming Hsieh
2004A New Self-Checking Sum-Bit Duplicated Carry-Select Adder.
Egor S. Sogomonyan, Daniel Marienfeld, Vitalij Ocheretnij, Michael Gössel
2004A Power and Performance Model for Network-on-Chip Architectures.
Nilanjan Banerjee, Praveen Vellanki, Karam S. Chatha
2004A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform.
Andreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl
2004A Tunneling Model for Gate Oxide Failure in Deep Sub-Micron Technology.
Sandrine Bernardini, Jean-Michel Portal, Pascal Masson
2004A Unified Design Space for Regular Parallel Prefix Adders.
Matthew M. Ziegler, Mircea R. Stan
2004Accurate Estimation of Parasitic Capacitances in Analog Circuits.
Anuradha Agarwal, Hemanth Sampath, Veena Yelamanchili, Ranga Vemuri
2004Adaptive Prefetching for Multimedia Applications in Embedded Systems.
Hassan Sbeyti, Smaïl Niar, Lieven Eeckhout
2004An Algorithm for Nano-Pipelining of Circuits and Architectures for a Nanotechnology.
Pallav Gupta, Niraj K. Jha
2004An Application of Parallel Discrete Event Simulation Algorithms to Mixed Domain System Simulation.
D. K. Reed, Steven P. Levitan, J. Boles, Jose A. Martinez, Donald M. Chiarulli
2004An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration.
Andrei Radulescu, John Dielissen, Kees Goossens, Edwin Rijpkema, Paul Wielage
2004An Interconnect Channel Design Methodology for High Performance Integrated Circuits.
Vikas Chandra, Anthony Xu, Herman Schmit, Lawrence T. Pileggi
2004Analyzing On-Chip Communication in a MPSoC Environment.
Mirko Loghi, Federico Angiolini, Davide Bertozzi, Luca Benini, Roberto Zafalon
2004Architecture-Level Performance Estimation for IP-Based Embedded Systems.
Kyoko Ueda, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai
2004Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing.
Ingrid Verbauwhede, Patrick Schaumont, Christian Piguet, Bart Kienhuis
2004Asynchronous Design By Conversion: Converting Synchronous Circuits into Asynchronous Ones.
Alex Branover, Rakefet Kol, Ran Ginosar
2004Automated, Accurate Macromodelling of Digital Aggressors for Power/Ground/Substrate Noise Prediction.
Zhe Wang, Rajeev Murgai, Jaijeet S. Roychowdhury
2004Balanced Excitation and Its Effect on the Fortuitous Detection of Dynamic Defects.
Jennifer Dworak, Brad Cobb, James Wingfield, M. Ray Mercer
2004Bandwidth-Constrained Mapping of Cores onto NoC Architectures.
Srinivasan Murali, Giovanni De Micheli
2004Boosting: Min-Cut Placement with Improved Signal Delay.
Andrew B. Kahng, Igor L. Markov, Sherief Reda
2004CMOS Structures Suitable for Secured Hardware.
Sylvain Guilley, Philippe Hoogvorst, Yves Mathieu, Renaud Pacalet, Jean Provost
2004Cache-Aware Scratchpad Allocation Algorithm.
Manish Verma, Lars Wehmeyer, Peter Marwedel
2004CircularScan: A Scan Architecture for Test Cost Reduction.
Baris Arslan, Alex Orailoglu
2004Compact Binaries with Code Compression in a Software Dynamic Translator.
Stacey Shogan, Bruce R. Childers
2004Context-Aware Performance Analysis for Efficient Embedded System Design.
Marek Jersak, Rafik Henia, Rolf Ernst
2004Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based Approach.
Santiago González Pestana, Edwin Rijpkema, Andrei Radulescu, Kees Goossens, Om Prakash Gangwal
2004Crosstalk Minimization in Logic Synthesis for PLA.
Yi-Yu Liu, Kuo-Hua Wang, TingTing Hwang
2004DATE Panel: Chips of the Future: Soft, Crunchy or Hard?
Pierre G. Paulin
2004Data Windows: A Data-Centric Approach for Query Execution in Memory-Resident Databases.
Jayaprakash Pisharath, Alok N. Choudhary, Mahmut T. Kandemir
2004Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study.
Bingfeng Mei, Serge Vernalde, Diederik Verkest, Rudy Lauwereins
2004Design Optimization of Multi-Cluster Embedded Systems for Real-Time Application.
Paul Pop, Petru Eles, Zebo Peng, Viacheslav Izosimov, Magnus Hellring, Olof Bridal
2004Design of Sub-10-Picoseconds On-Chip Time Measurement Circuit.
M. Amir Abas, Gordon Russell, D. J. Kinniment
2004Designing Self Test Programs for Embedded DSP Cores.
Hani Rizk, Christos A. Papachristou, Francis G. Wolff
2004Diagnosis of Scan-Chains by Use of a Configurable Signature Register and Error-Correcting Code.
Andreas Leininger, Michael Gössel, Peter Muhmenthaler
2004Direct Nonlinear Order Reduction with Variational Analysis.
Lihong Feng, Xuan Zeng, Charles C. Chiang, Dian Zhou, Qiang Fang
2004Distributed Multimedia System Design: A Holistic Perspective.
Radu Marculescu, Massoud Pedram, Jörg Henkel
2004Dynamic Voltage and Cache Reconfiguration for Low Power.
André C. Nácul, Tony Givargis
2004Efficient Implementations of Mobile Video Computations on Domain-Specific Reconfigurable Arrays.
Sami Khawam, Sajid Baloch, Arjun Pai, Imran Ahmed, Nizamettin Aydin, Tughrul Arslan, Fred Westall
2004Eliminating False Positives in Crosstalk Noise Analysis.
Yajun Ran, Alex Kondratyev, Yosinori Watanabe, Malgorzata Marek-Sadowska
2004Energy-Aware System Design for Wireless Multimedia.
Hans Van Antwerpen, Nikil D. Dutt, Rajesh K. Gupta, Shivajit Mohapatra, Cristiano Pereira, Nalini Venkatasubramanian, Ralph von Vignau
2004Energy-Efficient Design for Highly Associative Instruction Caches in Next-Generation Embedded Processors.
Juan L. Aragón, Dan Nicolaescu, Alexander V. Veidenbaum, Ana-Maria Badulescu
2004Enhancing Testability of System on Chips Using Network Management Protocols.
Oussama Laouamri, Chouki Aktouf
2004Exploiting Crosstalk to Speed up On-Chip Buse.
Chunjie Duan, Sunil P. Khatri
2004Exploiting Processor Workload Heterogeneity for Reducing Energy Consumption in Chip Multiprocessors.
Ismail Kadayif, Mahmut T. Kandemir, Ibrahim Kolcu
2004False-Noise Analysis for Domino Circuits.
Alexey Glebov, Sergey Gavrilov, Vladimir Zolotov, Chanhee Oh, Rajendran Panda, Murat R. Becer
2004Fast Comparisons of Circuit Implementations.
Shrirang K. Karandikar, Sachin S. Sapatnekar
2004Fault Tolerance of Programmable Switch Blocks.
Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi
2004Fault-Tolerant Deployment of Embedded Software for Cost-Sensitive Real-Time Feedback-Control Applications.
Claudio Pinello, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
2004From Synchronous to Asynchronous: An Automatic Approach.
Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou
2004Full-Chip Multilevel Routing for Power and Signal Integrity.
Jinjun Xiong, Lei He
2004GRAAL - A Development Framework for Embedded Graphics Accelerators.
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, Petri Liuha
2004Generalized Latency-Insensitive Systems for Single-Clock and Multi-Clock Architectures.
Montek Singh, Michael Theobald
2004Guaranteed Bandwidth Using Looped Containers in Temporally Disjoint Networks within the Nostrum Network on Chip.
Mikael Millberg, Erland Nilsson, Rikard Thid, Axel Jantsch
2004Hierarchical Multi-Dimensional Table Lookup for Model Compiler Based Circuit Simulation.
Bo Wan, Chuanjin Richard Shi
2004High-Performance QuIDD-Based Simulation of Quantum Circuits.
George F. Viamontes, Igor L. Markov, John P. Hayes
2004Hybrid Delay Scan: A Low Hardware Overhead Scan-Based Delay Test Technique for High Fault Coverage and Compact Test Sets.
Seongmoon Wang, Xiao Liu, Srimat T. Chakradhar
2004Hybrid Reduction Technique for Efficient Simulation of Linear/Nonlinear Mixed Circuits.
Takashi Mine, Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai
2004Impact of Test Point Insertion on Silicon Area and Timing during Layout.
Harald P. E. Vranken, Ferry Syafei Sapei, Hans-Joachim Wunderlich
2004Implementation of a UMTS Turbo-Decoder on a Dynamically Reconfigurable Platform.
Alberto La Rosa, Claudio Passerone, Francesco Gregoretti, Luciano Lavagno
2004Intermittent Scan Chain Fault Diagnosis Based on Signal Probability Analysis.
Yu Huang, Wu-Tung Cheng, Cheng-Ju Hsieh, Huan-Yung Tseng, Alou Huang, Yu-Ting Hung
2004Issues in Implementing Latency Insensitive Protocols.
Mario R. Casu, Luca Macchiarulo
2004Local Decisions and Triggering Mechanisms for Adaptive Fault-Tolerance.
Phillip Stanley-Marbell, Diana Marculescu
2004MINCE: Matching INstructions Using Combinational Equivalence for Extensible Processor.
Newton Cheung, Sri Parameswaran, Jörg Henkel, Jeremy Chan
2004MODD: A New Decision Diagram and Representation for Multiple Output Binary Functions.
Abusaleh M. Jabir, Dhiraj K. Pradhan
2004Mapping Multi-Million Gate SoCs on FPGAs: Industrial Methodology and Experience.
Helena Krupnova
2004Measurement of IP Qualification Costs and Benefits.
Andreas Vörg, Martin Radetzki, Wolfgang Rosenstiel
2004MemMap: Technology Mapping Algorithm for Area Reduction in FPGAs with Embedded Memory Arrays Using Reconvergence Analysis.
A. Manoj Kumar, Jayaram Bobba, V. Kamakoti
2004Minimization of Crosstalk Noise, Delay and Power Using a Modified Bus Invert Technique.
Matheos Lampropoulos, Bashir M. Al-Hashimi, Paul M. Rosinger
2004Model Order Reduction Techniques for Linear Systems with Large Numbers of Terminals.
Peter Feldmann
2004Model-Based Specification and Execution of Embedded Real-Time Systems.
Tim Schattkowsky, Wolfgang Müller
2004Modeling Shared Resource Contention Using a Hybrid Simulation/Analytical Approach.
Alex Bobrek, Joshua J. Pieper, Jeffrey E. Nelson, JoAnn M. Paul, Donald E. Thomas
2004Multi-Processor SoC Design Methodology Using a Concept of Two-Layer Hardware-Dependent Software.
Sungjoo Yoo, Mohamed-Wassim Youssef, Aimen Bouchhima, Ahmed Amine Jerraya, Mario Diaz-Nava
2004Nanometer Design: What are the Requirements for Manufacturing Test?
Janusz Rajski, Kan Thapar
2004Net and Pin Distribution for 3D Package Global Routing.
Jacob R. Minz, Mohit Pathak, Sung Kyu Lim
2004Nine-Coded Compression Technique with Application to Reduced Pin-Count Testing and Flexible On-Chip Decompression.
Mohammad H. Tehranipour, Mehrdad Nourani, Krishnendu Chakrabarty
2004Optimal Algorithm for Minimizing the Number of Twists in an On-Chip Bus.
Liang Deng, Martin D. F. Wong
2004Overhead-Free Polymorphism in Network-on-Chip Implementation of Object-Oriented Models.
Maziar Goudarzi, Shaahin Hessabi, Alan Mycroft
2004Pattern Selection for Testing of Deep Sub-Micron Timing Defects.
Mango Chia-Tso Chao, Li-C. Wang, Kwang-Ting Cheng
2004Phase Coupled Code Generation for DSPs Using a Genetic Algorithm.
Markus Lorenz, Peter Marwedel
2004Placement Using a Localization Probability Model (LPM).
Markus Olbrich, Erich Barke
2004Platform Based on Open-Source Cores for Industrial Applications.
María del Milagro Bolado, Hector Posadas, Javier Castillo, Pablo Huerta, Pablo Sánchez, Carlos Sánchez, Häkan Fouren, Francisco Blasco
2004Poor Man's TBR: A Simple Model Reduction Scheme.
Joel R. Phillips, Luís Miguel Silveira
2004Power Aware Interface Synthesis for Bus-Based SoC Design.
Nikolaos D. Liveris, Prithviraj Banerjee
2004Power Supply Noise Monitor for Signal Integrity Faults.
Josep Rius Vázquez, José Pineda de Gyvez
2004Power-Aware Network Swapping for Wireless Palmtop PCs.
Andrea Acquaviva, Emanuele Lattanzi, Alessandro Bogliolo
2004Profile Guided Management of Code Partitions for Embedded Systems.
Shukang Zhou, Bruce R. Childers, Naveen Kumar
2004Quasi-Static Scheduling for Real-Time Systems with Hard and Soft Tasks.
Luis Alejandro Cortés, Petru Eles, Zebo Peng
2004Realizable Reduction for Electromagnetically Coupled RLMC Interconnects.
Rong Jiang, Charlie Chung-Ping Chen
2004SCORE: SPICE COmpatible Reluctance Extraction.
Rong Jiang, Charlie Chung-Ping Chen
2004Saving Power by Mapping Finite-State Machines into Embedded Memory Blocks in FPGAs.
Anurag Tiwari, Karen A. Tomko
2004Smaller Two-Qubit Circuits for Quantum Communication and Computation.
Vivek V. Shende, Igor L. Markov, Stephen S. Bullock
2004Soft Faults and the Importance of Stresses in Memory Testing.
Zaid Al-Ars, Ad J. van de Goor
2004Statistically Aware Buffer Planning.
Giuseppe S. Garcea, N. P. van der Meijs, Kees-Jan van der Kolk, Ralph H. J. M. Otten
2004Status of IEEE Testability Standards 1149.4, 1532 and 1149.6.
Stephen K. Sunter, Adam Osseiran, Adam Cron, Neil G. Jacobson, Dave Bonnett, Bill Eklow, Carl Barnhart, Ben Bennetts
2004Steady-State Analysis of Nonlinear Circuits Using Discrete Singular Convolution Method.
Xin Zhou, Dian Zhou, Jin Liu, Ruiming Li, Xuan Zeng, Charles C. Chiang
2004Supporting Cache Coherence in Heterogeneous Multiprocessor Systems.
Taeweon Suh, Douglas M. Blough, Hsien-Hsin S. Lee
2004Synthesis and Optimization of Threshold Logic Networks with Application to Nanotechnologies.
Rui Zhang, Pallav Gupta, Lin Zhong, Niraj K. Jha
2004Synthesis for Manufacturability: A Sanity Check.
Alessandra Nardi, Alberto L. Sangiovanni-Vincentelli
2004Synthesis of Reversible Logic.
Abhinav Agrawal, Niraj K. Jha
2004Synthesized Compact Models (SCM) of Substrate Noise Coupling Analysis and Synthesis in Mixed-Signal ICs.
Hai Lan, Robert W. Dutton
2004System Verilog for VHDL Users.
Tom Fitzpatric
2004Task Feasibility Analysis and Dynamic Voltage Scaling in Fault-Tolerant Real-Time Embedded Systems.
Ying Zhang, Krishnendu Chakrabarty
2004Testing of Quantum Dot Cellular Automata Based Designs.
Mehdi Baradaran Tahoori, Fabrizio Lombardi
2004Thermal and Power Integrity Based Power/Ground Networks Optimization.
Ting-Yuan Wang, Jeng-Liang Tsai, Charlie Chung-Ping Chen
2004Timing Analysis for Preemptive Multi-Tasking Real-Time Systems with Caches.
Yudong Tan, Vincent John Mooney III
2004Timing Correction and Optimization with Adaptive Delay Sequential Element.
Kambiz Rahimi, Seth Bridges, Chris Diorio
2004Tuning In-Sensor Data Filtering to Reduce Energy Consumption in Wireless Sensor Networks.
Ismail Kadayif, Mahmut T. Kandemir
2004ULSI Interconnect Length Distribution Model Considering Core Utilization.
Hidenari Nakashima, Junpei Inoue, Kenichi Okada, Kazuya Masu
2004Unified Component Integration Flow for Multi-Processor SoC Design and Validation.
Mohamed-Anouar Dziri, Wander O. Cesário, Flávio Rech Wagner, Ahmed Amine Jerraya
2004Using a Communication Architecture Specification in an Application-Driven Retargetable Prototyping Platform for Multiprocessing.
Xinping Zhu, Sharad Malik
2004Wire Retiming for System-on-Chip by Fixpoint Computation.
Chuan Lin, Hai Zhou
2004Workload Characterization Model for Tasks with Variable Execution Demand.
Alexander Maxiaguine, Simon Künzli, Lothar Thiele
2004×pipesCompiler: A Tool for Instantiating Application Specific Networks on Chip.
Antoine Jalabert, Srinivasan Murali, Luca Benini, Giovanni De Micheli