DATE A

143 papers

YearTitle / Authors
2004.NET Framework - A Solution for the Next Generation Tools for System-Level Modeling and Simulation.
James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu, Luc Charest, François R. Boyer, J. P. David, Guy Bois
2004A 0.18 µm CMOS Implementation of On-chip Analogue Test Signal Generation from Digital Test Patterns.
Luís Rolíndez, Salvador Mir, Guillaume Prenat, Ahcène Bounceur
2004A 2.7V 350muW 11-b Algorithmic Analog-to-Digital Converter with Single-Ended Multiplexed Inputs.
Angelo Nagari, Germano Nicollini
2004A Configurable Logic Architecture for Dynamic Hardware/Software Partitioning.
Roman L. Lysecky, Frank Vahid
2004A Crosstalk Aware Interconnect with Variable Cycle Transmission.
Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2004A Digital Test for First-Order [Sigma-Delta] Modulators.
Gildas Léger, Adoración Rueda
2004A Direct Bootstrapped CMOS Large Capacitive-Load Driver Circuit.
José C. García, Juan A. Montiel-Nelson, Javier Sosa, Héctor Navarro
2004A Fast Algorithm for Finding Maximal Empty Rectangles for Dynamic FPGA Placement.
Manish Handa, Ranga Vemuri
2004A Game Theoretic Approach to Low Energy Wireless Video Streaming.
Ali Iranli, Kihwan Choi, Massoud Pedram
2004A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation.
Kris Tiri, Ingrid Verbauwhede
2004A Low Cost Individual-Well Adaptive Body Bias (IWABB) Scheme for Leakage Power Reduction and Performance Enhancement in the Presence of Intra-Die Variations.
Tom W. Chen, Justin Gregg
2004A Low Power Strategy for Future Mobile Terminals.
Mladen Nikitovic, Mats Brorsson
2004A Method for Parameter Extraction of Analog Sine-Wave Signals for Mixed-Signal Built-In-Self-Test Applications.
Diego Vázquez, Gildas Léger, Gloria Huertas, Adoración Rueda, José L. Huertas
2004A Methodology for System-Level Analog Design Space Exploration.
Fernando De Bernardinis, Alberto L. Sangiovanni-Vincentelli
2004A New Optimized Implemention of the SystemC Engine Using Acyclic Scheduling.
Daniel Gracia Pérez, Gilles Mouchard, Olivier Temam
2004A Novel Implementation of Tile-Based Address Mapping.
Sambuddhi Hettiaratchi, Peter Y. K. Cheung
2004A Novel SAT All-Solutions Solver for Efficient Preimage Computation.
Bin Li, Michael S. Hsiao, Shuo Sheng
2004A Phase-Frequency Transfer Description of Analog and Mixed-Signal Front-End Architectures for System-Level Design.
Ewout Martens, Georges G. E. Gielen
2004A Probabilistic Method for the Computation of Testability of RTL Constructs.
José M. Fernandes, Marcelino B. Santos, Arlindo L. Oliveira, João Paulo Teixeira
2004A Scalable ODC-Based Algorithm for RTL Insertion of Gated Clocks.
Pietro Babighian, Luca Benini, Enrico Macii
2004A Self-Tuning Cache Architecture for Embedded Systems.
Chuanjun Zhang, Frank Vahid, Roman L. Lysecky
2004A System Level Exploration Platform and Methodology for Network Applications Based on Configurable Processors.
D. Quinn, Bruno Lavigueur, Guy Bois, El Mostapha Aboulhamid
2004A SystemC-Based Verification Methodology for Complex Wireless Software IP.
Guido Post, P. K. Venkataraghavan, Tapan Ray, D. R. Seetharaman
2004A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters.
Andrea Del Re, Alberto Nannarelli, Marco Re
2004An Arithmetic Structure for Test Data Horizontal Compression.
Marie-Lise Flottes, Regis Poirier, Bruno Rouzeyre
2004An Asynchronous Synthesis Toolset Using Verilog.
Frank P. Burns, Delong Shang, Albert Koelmans, Alexandre Yakovlev
2004Are Our Design for Testability Features Fault Secure?
Cecilia Metra, T. M. Mak, Martin Omaña
2004Arithmetic Reasoning in DPLL-Based SAT Solving.
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
2004Aspects of Formal and Graphical Design of a Bus System.
Tiberiu Seceleanu, Tomi Westerlund
2004Automatic Generation of Validation Stimuli for Application-Specific Processors.
Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante
2004Automatic Scan Insertion and Pattern Generation for Asynchronous Circuits.
Aristides Efthymiou, Christos P. Sotiriou, Douglas A. Edwards
2004Automatic Synthesis and Simulation of Continuous-Time [Sigma-Delta] Modulators.
Hassan Aboushady, Laurent de Lamarre, Nicolas Beilleau, Marie-Minerve Louërat
2004Automatic Tuning of Two-Level Caches to Embedded Applications.
Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt
2004Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements.
Panagiotis Manolios, Sudarshan K. Srinivasan
2004Behavioural Bitwise Scheduling Based on Computational Effort Balancing.
María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida
2004Block-Enabled Memory Macros: Design Space Exploration and Application-Specific Tuning.
Luca Benini, Alessandro Ivaldi, Alberto Macii, Enrico Macii
2004Breaking Instance-Independent Symmetries in Exact Graph Coloring.
Arathi Ramani, Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah
2004Co-Processor Synthesis: A New Methodology for Embedded Software Acceleration.
Ben I. Hounsell, Richard Taylor
2004Communication Analysis for System-On-Chip Design.
Axel Siebenborn, Oliver Bringmann, Wolfgang Rosenstiel
2004Compositional Memory Systems for Data Intensive Applications.
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Cotofana, Jos T. J. van Eijndhoven
2004Concurrent Sizing, Vdd and Vth Assignment for Low-Power Design.
Ashish Srivastava, Dennis Sylvester, David T. Blaauw
2004Configuration-Sensitive Process Scheduling for FPGA-Based Computing Platforms.
Guilin Chen, Mahmut T. Kandemir, Ugur Sezer
2004Cost-Efficient Block Verification for a UMTS Up-Link Chip-Rate Coprocessor.
Klaus Winkelmann, Hans-Joachim Trylus, Dominik Stoffel, Görschwin Fey
2004Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies.
Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nikil D. Dutt
2004Decomposition of Instruction Decoder for Low Power Design.
Wu-An Kuo, TingTing Hwang, Allen C.-H. Wu
2004Design and Behavioral Modeling Tools for Optical Network-on-Chip.
Matthieu Briere, Laurent Carrel, T. Michalke, Fabien Mieyeville, Ian O'Connor, Frédéric Gaffiot
2004Design of Routing-Constrained Low Power Scan Chains.
Yannick Bonhomme, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
2004Digital Background Gain Error Correction in Pipeline ADCs.
Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda
2004Digital Ground Bounce Reduction by Phase Modulation of the Clock.
Mustafa Badaroglu, Piet Wambacq, Geert Van der Plas, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man
2004Dynamic Memory Management Design Methodology for Reduced Memory Footprint in Multimedia and Wireless Network Applications.
David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris
2004Dynamic Power Management Using Data Buffers.
Le Cai, Yung-Hsiang Lu
2004Early SEU Fault Injection in Digital, Analog and Mixed Signal Circuits: A Global Flow.
Régis Leveugle, Abdelaziz Ammari
2004Effective Software-Based Self-Test Strategies for On-Line Periodic Testing of Embedded Processors.
Antonis M. Paschalis, Dimitris Gizopoulos
2004Efficient Mixed-Domain Behavioural Modeling of Ferromagnetic Hysteresis Implemented in VHDL-AMS.
Peter R. Wilson, J. Neil Ross, Andrew D. Brown, Tom J. Kazmierski, Jerzy Baranowski
2004Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures.
Anuja Sehgal, Krishnendu Chakrabarty
2004Efficient Static Compaction of Test Sequence Sets through the Application of Set Covering Techniques.
Michael G. Dimopoulos, Panagiotis Linardis
2004Efficient Test Strategy for TDMA Power Amplifiers Using Transient Current Measurements: Uses and Benefit.
Ganesh Srinivasan, Soumendu Bhattacharya, Sasikumar Cherubal, Abhijit Chatterjee
2004Energy-Aware Communication and Task Scheduling for Network-on-Chip Architectures under Real-Time Constraints.
Jingcao Hu, Radu Marculescu
2004Enhanced Diameter Bounding via Structural.
Jason Baumgartner, Andreas Kuehlmann
2004Enhancing Reliability of Operational Interconnections in FPGAs.
Alex Fit-Florea, Miroslav Halás, Fatih Kocan
2004Evaluating the Effects of SEUs Affecting the Configuration Memory of an SRAM-Based FPGA.
M. Bellato, Paolo Bernardi, D. Bortolato, A. Candelori, M. Ceschia, Alessandro Paccagnella, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, P. Zambolin
2004Exploiting Signal Unobservability for Efficient Translation to CNF in Formal Verification of Microprocessors.
Miroslav N. Velev
2004Exploring Logic Block Granularity for Regular Fabrics.
Aneesh Koorapaty, V. Kheterpal, Padmini Gopalakrishnan, M. Fu, Lawrence T. Pileggi
2004Extended Subspace Identification of Improper Linear Systems.
Gerd Vandersteen, Rik Pintelon, Dimitri Linten, Stéphane Donnay
2004Extraction of Schematic Array Models for Memory Circuits.
Soumitra Bose, Amit Nandi
2004Extremely Low-Power Logic.
Christian Piguet, Jacques Gautier, Christoph Heer, Ian O'Connor, Ulf Schlichtmann
2004Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design.
Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
2004Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled Parasitic-Aware Symbolic Performance Models.
Mukesh Ranjan, Wim Verhaegen, Anuradha Agarwal, Hemanth Sampath, Ranga Vemuri, Georges G. E. Gielen
2004Fine-Grained Dynamic Voltage and Frequency Scaling for Precise Energy and Performance Trade-Off Based on the Ratio of Off-Chip Access to On-Chip Computation Times.
Kihwan Choi, Ramakrishna Soma, Massoud Pedram
2004Flexible Software Protection Using Hardware/Software Codesign Techniques.
Joseph Zambreno, Alok N. Choudhary, Rahul Simha, Bhagirath Narahari
2004Formal Verification Coverage: Are the RTL-Properties Covering the Design's Architectural Intent?
Prasenjit Basu, Sayantan Das, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix
2004Functional Coverage Metric Generation from Temporal Event Relation Graph.
Young-Su Kwon, Chong-Min Kyung
2004Functional Level Power Analysis: An Efficient Approach for Modeling the Power Consumption of Complex Processors.
Johann Laurent, Nathalie Julien, Eric Senn, Eric Martin
2004Graph-Based Functional Test Program Generation for Pipelined Processors.
Prabhat Mishra, Nikil D. Dutt
2004Hierarchical Adaptive Dynamic Power Management.
Zhiyuan Ren, Bruce H. Krogh, Radu Marculescu
2004Hierarchical Automatic Behavioral Model Generation of Nonlinear Analog Circuits Based on Nonlinear Symbolic Techniques.
Lutz Näthke, Volodymyr Burkhay, Lars Hedrich, Erich Barke
2004Hierarchical Modeling and Simulation of Large Analog Circuits.
Sheldon X.-D. Tan, Zhenyu Qi, Hang Li
2004High Security Smartcards.
Marc Renaudin, G. Fraidy Bouesse, Ph. Proust, J. P. Tual, Laurent Sourgen, Fabien Germain
2004High-Level System Modeling and Architecture Exploration with SystemC on a Network SoC: S3C2510 Case Study.
Hye-On Jang, Minsoo Kang, Myeong-jin Lee, Kwanyeob Chae, Kookpyo Lee, Kyuhyun Shim
2004How Can System-Level Design Solve the Interconnect Technology Scaling Problem?
Francky Catthoor, Andrea Cuomo, Grant Martin, Patrick Groeneveld, Rudy Lauwereins, Karen Maex, Patrick van de Steeg, Ron Wilson
2004Hybrid Architectural Dynamic Thermal Management.
Kevin Skadron
2004Identification and Modeling of Nonlinear Dynamic Behavior in Analog Circuits.
Xiaoling Huang, H. Alan Mantooth
2004Impact of Data Transformations on Memory Bank Locality.
Mahmut T. Kandemir
2004Improved Symoblic Simulation by Dynamic Funtional Space Partitioning.
Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Chih-Chan Lin
2004Integrating the Synchronous Dataflow Model with UML.
Peter Green, Salah Essa
2004Interactive Cosimulation with Partial Evaluation.
Patrick Schaumont, Ingrid Verbauwhede
2004Layout Conscious Bus Architecture Synthesis for Deep Submicron Systems on Chip.
Nattawut Thepayasuwan, Alex Doboli
2004Level of Similarity: A Metric for Fault Collapsing.
Irith Pomeranz, Sudhakar M. Reddy
2004Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow.
Sumit Gupta, Nikil D. Dutt, Rajesh Gupta, Alexandru Nicolau
2004Low Cost Analog Testing of RF Signal Paths.
Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin
2004Low Static-Power Frequent-Value Data Caches.
Chuanjun Zhang, Jun Yang, Frank Vahid
2004Managing Don't Cares in Boolean Satisfiability.
Sean Safarpour, Andreas G. Veneris, Rolf Drechsler, Joanne Lee
2004Microarchitecture Development via Metropolis Successive Platform Refinement.
Douglas Densmore, Sanjay Rekhi, Alberto L. Sangiovanni-Vincentelli
2004Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology.
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araujo
2004Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks.
Mohammad Reza Mousavi, Paul Le Guernic, Jean-Pierre Talpin, Sandeep K. Shukla, Twan Basten
2004Native ISS-SystemC Integration for the Co-Simulation of Multi-Processor SoC.
Franco Fummi, Stefano Martini, Giovanni Perbellini, Massimo Poncino
2004Network Topology Exploration of Mesh-Based Coarse-Grain Reconfigurable Architectures.
Nikhil Bansal, Sumit Gupta, Nikil D. Dutt, Alexandru Nicolau, Rajesh Gupta
2004On Concurrent Error Detection with Bounded Latency in FSMs.
Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris
2004On Transfer Function and Power Consumption Transient Response.
Lipeng Cao
2004Operating System Support for Interface Virtualisation of Reconfigurable Coprocessors.
Miljan Vuletic, Ludovic Righetti, Laura Pozzi, Paolo Ienne
2004Opportunities and Challenges in Building Silicon Products in 65nm and Beyond.
Gregory S. Spirakis
2004Optimization of Integrated Spiral Inductors Using Sequential Quadratic Programming.
Yong Zhan, Sachin S. Sapatnekar
2004Organizing Libraries of DFG Patterns.
Gero Dittmann
2004Overhead-Conscious Voltage Selection for Dynamic and Leakage Energy Reduction of Time-Constrained Systems.
Alexandru Andrei, Marcus T. Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi
2004Performance Modeling of Analog Integrated Circuits Using Least-Squares Support Vector Machines.
Tholom Kiely, Georges G. E. Gielen
2004Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits.
Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch
2004Power Aware Variable Partitioning and Instruction Scheduling for Multiple Memory Banks.
Zhong Wang, Xiaobo Sharon Hu
2004Power Minimization in a Backlit TFT-LCD Display by Concurrent Brightness and Contrast Scaling.
Wei-Chung Cheng, Yu Hou, Massoud Pedram
2004Pseudo-Random Sequence Based Tuning System for Continuous-Time Filters.
Francesco Corsi, Cristoforo Marzocca, Gianvito Matarrese, Andrea Baschirotto, Stefano D'Amico
2004Random Jitter Extraction Technique in a Multi-Gigahertz Signal.
Chee-Kian Ong, Dongwoo Hong, Kwang-Ting Cheng, Li-C. Wang
2004Re-Configurable Bus Encoding Scheme for Reducing Power Consumption of the Cross Coupling Capacitance for Deep Sub-Micron Instruction Bus.
Siu-Kei Wong, Chi-Ying Tsui
2004Refinement of Mixed-Signal Systems with Affine Arithmetic.
Christoph Grimm, Wilhelm Heupke, Klaus Waldschmidt
2004Regression Simulation: Applying Path-Based Learning In Delay Test and Post-Silicon Validation.
Li-C. Wang
2004STEPS: Experimenting a New Software-Based Strategy for Testing SoCs Containing P1500-Compliant IP Cores.
Mounir Benabdenbi, Alain Greiner, François Pêcheux, Emmanuel Viaud, Matthieu Tuna
2004Scalar Metric for Temporal Locality and Estimation of Cache Performance.
Juha Alakarhu, Jarkko Niittylahti
2004Scan Power Minimization through Stimulus and Response Transformations.
Ozgur Sinanoglu, Alex Orailoglu
2004Scheduling Reusable Instructions for Power Reduction.
Jie S. Hu, Narayanan Vijaykrishnan, Soontae Kim, Mahmut T. Kandemir, Mary Jane Irwin
2004Sensitivity-Based Modeling and Methodology for Full-Chip Substrate Noise Analysis.
Rajeev Murgai, Subodh M. Reddy, Takashi Miyoshi, Takeshi Horie, Mehdi Baradaran Tahoori
2004Simultaneous State, Vt and Tox Assignment for Total Standby Power Minimization.
Dongwoo Lee, Harmander Deogun, David T. Blaauw, Dennis Sylvester
2004Sizing and Characterization of Leakage-Control Cells for Layout-Aware Distributed Power-Gating.
Pietro Babighian, Luca Benini, Enrico Macii
2004SoC Test Scheduling with Power-Time Tradeoff and Hot Spot Avoidance.
James Chin, Mehrdad Nourani
2004SoftContract: an Assertion-Based Software Development Process that Enables Design-by-Contract.
Jean-Yves Brunel, Marco Di Natale, Alberto Ferrari, Paolo Giusto, Luciano Lavagno
2004State-Preserving vs. Non-State-Preserving Leakage Control in Caches.
Yingmin Li, Dharmesh Parikh, Yan Zhang, Karthik Sankaranarayanan, Mircea R. Stan, Kevin Skadron
2004Stimuli Generation with Late Binding of Values.
Avi Ziv
2004SubCALM: A Program for Hierarchical Substrate Coupling Simulation on Floorplan Level.
Thomas Brandtner, Robert Weigel
2004Synchro-Tokens: Eliminating Nondeterminism to Enable Chip-Level Test of Globally-Asynchronous Locally-Synchronous SoC?s.
Matthew W. Heath, Wayne P. Burleson, Ian G. Harris
2004Synchronous Protocol Automata: A Framework for Modelling and Verification of SoC Communication Architectures.
Vijay D'Silva, S. Ramesh, Arcot Sowmya
2004Synthesis of Partitioned Shared Memory Architectures for Energy-Efficient Multi-Processor SoC.
Kimish Patel, Enrico Macii, Massimo Poncino
2004System Design Using Kahn Process Networks: The Compaan/Laura Approach.
Todor P. Stefanov, Claudiu Zissulescu, Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere
2004System Design for DSP Applications Using the MASIC Methodology.
Abhijit K. Deb, Axel Jantsch, Johnny Öberg
2004System-Level Performance Analysis in SystemC.
Hector Posadas, Fernando Herrera, Pablo Sánchez, Eugenio Villar, Francisco Blasco
2004SystemC and SystemVerilog: Where do They Fit? Where are They Going?
Donatella Sciuto, Grant Martin, Wolfgang Rosenstiel, Stuart Swan, Frank Ghenassia, Peter Flake, Johny Srouji
2004Systematic Design for Optimization of High-Resolution Pipelined ADCs.
Mohammad Taherzadeh-Sani, Reza Lotfi, Omid Shoaei
2004Test Compression and Hardware Decompression for Scan-Based SoCs.
Francis G. Wolff, Christos A. Papachristou, David R. McIntyre
2004Time-Energy Design Space Exploration for Multi-Layer Memory Architectures.
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuchcinski
2004Trim Bit Setting of Analog Filters Using Wavelet-Based Supply Current Analysis.
Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy
2004Using BDDs and ZBDDs for Efficient Identification of Testable Path Delay Faults.
Saravanan Padmanaban, Spyros Tragoudas
2004Using Counter Example Guided Abstraction Refinement to Find Complex Bugs.
Per Bjesse, James H. Kukula
2004Using a Victim Buffer in an Application-Specific Memory Hierarchy.
Chuanjun Zhang, Frank Vahid
2004Value-Conscious Cache: Simple Technique for Reducing Cache Access Power.
Yen-Jen Chang, Chia-Lin Yang, Feipei Lai
2004Why Transition Coding for Power Minimization of On-Chip Buses Does Not Work.
Claudia Kretzschmar, André K. Nieuwland, Dietmar Müller
2004Wrapper Design for Testing IP Cores with Multiple Clock Domains.
Qiang Xu, Nicola Nicolici
2004Z-Sets and Z-Detections: Circuit Characteristics that Simplify Fault Diagnosis.
Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy, Bharath Seshadri