| 1999 | 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany |
| 1999 | A CAD Framework for Generating Self-Checking 1 Multipliers Based on Residue Codes. Issam Alzaher-Noufal, Michael Nicolaidis |
| 1999 | A DAG-Based Design Approach for Reconfigurable VLIW Processors. Cesare Alippi, William Fornaciari, Laura Pozzi, Mariagiovanna Sami |
| 1999 | A Digital Partial Built-In Self-Test for a High Performance Automatic Gain Control Circuit . Andreas Lechner, J. Ferguson, Andrew Richardson, B. Hermes |
| 1999 | A Fault List Reduction Approach for Efficient Bridge Fault Diagnosis. Jue Wu, Gary S. Greenstein, Elizabeth M. Rudnick |
| 1999 | A Formal Semantics for Verilog-VHDL Simulation Interoperability by Abstact State Machine. Hisashi Sasaki |
| 1999 | A Method of Distributed Controller Design for RTL Circuits. Christos A. Papachristou, Yusuf Alzazeri |
| 1999 | A Method to Diagnose Faults in Linear Analog Circuits using an Adaptive Tester. Érika F. Cota, Luigi Carro, Marcelo Lubaszewski |
| 1999 | A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement. Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens |
| 1999 | A New Parameterizable Power Macro-Model for Datapath Components. Gerd Jochens, Lars Kruse, Eike Schmidt, Wolfgang Nebel |
| 1999 | A One-Bit-Signature BIST for Embedded Operational Amplifiers in Mixed-Signal Circuits Based on the Slew-Rate Detection. Iyad Rayane, Jaime Velasco-Medina, Michael Nicolaidis |
| 1999 | A Physical Design Tool for Built-in Self-Repairable Static RAMs. Kanad Chakraborty, Anurag Gupta, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder |
| 1999 | A Power Estimation Model for High-Speed CMOS A/D Converters. Erik Lauwers, Georges G. E. Gielen |
| 1999 | A Single-Package Solution for Wireless Transceivers. Piet Wambacq, Stéphane Donnay, Hocine Ziad, Marc Engels, Hugo De Man, Ivo Bolsens |
| 1999 | A VHDL-AMS Compiler and Architecture Generator for Behavioral Synthesis of Analog Systems. Alex Doboli, Ranga Vemuri |
| 1999 | ADOLT - An ADaptable On - Line Testing Scheme for VLSI Circuits. Ali Maamar, G. Russell |
| 1999 | ATPG Tools for Delay Faults at the Functional Level. Spyros Tragoudas, Maria K. Michael |
| 1999 | Accounting for Various Register Allocation Schemes During Post-Synthesis Verification of RTL Designs. Nazanin Mansouri, Ranga Vemuri |
| 1999 | Algorithms for Solving Boolean Satisfiability in Combinational Circuits. Luís Guerra e Silva, Luís Miguel Silveira, João Marques-Silva |
| 1999 | An Accurate Error Control Mechanism for Simplification Before Generation Algorihms. Oscar Guerra, Juan D. Rodríguez-García, Elisenda Roca, Francisco V. Fernández, Ángel Rodríguez-Vázquez |
| 1999 | An Algorithm for Face-Constrained Encoding of Symbols Using Minimum Code Length. Manuel Martínez, Maria J. Avedillo, José M. Quintana, José L. Huertas |
| 1999 | An Analog Performance Estimator for Improving the Effectiveness of CMOS Analog Systems Circuit Synthesis. Adrián Núñez-Aldana, Ranga Vemuri |
| 1999 | An Effective BIST Architecture for Fast Multiplier Cores. Antonis M. Paschalis, Nektarios Kranitis, Mihalis Psarakis, Dimitris Gizopoulos, Yervant Zorian |
| 1999 | An Efficient Filter-Based Approach for Combinational Verification. Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Masahiro Fujita, Jacob A. Abraham, Donald S. Fussell |
| 1999 | An Efficient Reuse System for Digital Circuit Design. Annette Reutter, Wolfgang Rosenstiel |
| 1999 | An Efficient and Flexible Methodology for Modelling and Simulation of Heterogeneous Mechatronic Systems. Stefan Scherber, Christian Müller-Schloer |
| 1999 | An MPEG-2 Video Encoder LSI with Scalability for HDTV based on Three-layer Cooperative Architecture. Mitsuo Ikeda, Toshio Kondo, Koyo Nitta, Kazuhito Suguri, Takeshi Yoshitome, Toshihiro Minami, Jiro Naganuma, Takeshi Ogura |
| 1999 | An Object-Based Executable Model for Simulation of Real-Time Hw/Sw Systems. Olivier Pasquier, Jean Paul Calvez |
| 1999 | Approximate Equivalence Verification of Sequential Circuits via Genetic Algorithms. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero |
| 1999 | At-Speed Boundary-Scan Interconnect Testing in a Board with Multiple System Clocks. Jongchul Shin, HyunJin Kim, Sungho Kang |
| 1999 | Automatic Verification of Scheduling Results in High-Level Synthesis. Hans Eveking, Holger Hinrichsen, Gerd Ritter |
| 1999 | Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints. Robert Schwencker, Josef Eckmüller, Helmut E. Graeb, Kurt Antreich |
| 1999 | Automotive Electronics - A Challenge For Systems Engineering. Peter Thoma |
| 1999 | Battery-Powered Digital CMOS Design. Massoud Pedram, Qing Wu |
| 1999 | C for System Level Design. Guido Arnout |
| 1999 | C-based Synthesis Experiences with a Behavior Synthesizer, "Cyber". Kazutoshi Wakabayashi |
| 1999 | CRUSADE: Hardware/Software Co-Synthesis of Dynamically Reconfigurable Heterogeneous Real-Time Distributed Embedded Systems. Bharat P. Dave |
| 1999 | Case Study: System Model of Crane and Embedded Control. Eduard Moser, Wolfgang Nebel |
| 1999 | Channel-Based Behavioral Test Synthesis for Improved Module Reachability. Yiorgos Makris, Alex Orailoglu |
| 1999 | Chip-Level Verification for Parasitic Coupling Effects in Deep-Submicron Digital Designs. Lun Ye, Foong-Charn Chang, Peter Feldmann, Rakesh Chadha, Nagaraj Ns, Frank Cano |
| 1999 | Codesign of Embedded Systems Based on Java and Reconfigurable Hardware Components. Josef Fleischmann, Klaus Buchenrieder, Rainer Kress |
| 1999 | Codex-dp: Co-design of Communicating Systems Using Dynamic Programming. Jui-Ming Chang, Massoud Pedram |
| 1999 | Combinational Equivalence Checking Using Satisfiability and Recursive Learning. João Marques-Silva, Thomas Glass |
| 1999 | Combining Software Synthesis and Hardware/Software Interface Generation to Meet Hard Real-Time Constraints. Steven Vercauteren, Jan van der Steen, Diederik Verkest |
| 1999 | Computing Timed Transition Relations for Sequential Cycle-Based Simulation. Gianpiero Cabodi, Paolo Camurati, Claudio Passerone, Stefano Quer |
| 1999 | Coupled Noise Estimation for Distributed RC Interconnect Model. Janet Meiling Wang, Qingjian Yu, Ernest S. Kuh |
| 1999 | Cycle-based Simulation with Decision Diagrams. Raimund Ubar, Jaan Raik, Adam Morawiec |
| 1999 | Data Type Analysis for Hardware Synthesis from Object-Oriented Models. Martin Radetzki, Ansgar Stammermann, Wolfram Putzke-Röming, Wolfgang Nebel |
| 1999 | Defect-Oriented Mixed-Level Fault Simulation of Digital Systems-on-a-Chip Using HDL. Marcelino B. Santos, João Paulo Teixeira |
| 1999 | Design For Testability Method for CML Digital Circuits. Bernard Antaki, Yvon Savaria, Nanhan Xiong, Saman Adham |
| 1999 | Design Methodology for IP Providers. Jürgen Haase |
| 1999 | Design, Characterization & Modelling of a CMOS Magnetic Field Sensor. Laurent Latorre, Yves Bertrand, P. Hazard, Francis Pressecq, Pascal Nouet |
| 1999 | Digital MOS Circuit Partitioning with Symbolic Modeling. Lluís Ribas, Jordi Carrabina |
| 1999 | Dynamic Power Management for non-stationary service requests. Eui-Young Chung, Luca Benini, Alessandro Bogliolo, Giovanni De Micheli |
| 1999 | EXPRESSION: A Language for Architecture Exploration through Compiler/Simulator Retargetability. Ashok Halambi, Peter Grun, Vijay Ganesh, Asheesh Khare, Nikil D. Dutt, Alexandru Nicolau |
| 1999 | Efficient 3D Modelling for Extraction of Interconnect Capacitances in Deep Submicron Dense Layouts. A. Toulouse, David Bernard, Christian Landrault, Pascal Nouet |
| 1999 | Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths. Nicola Nicolici, Bashir M. Al-Hashimi |
| 1999 | Efficient Switching Activity Simulation under a Real Delay Model Using a Bitparallel Approach. Markus Bühler, Matthias Papesch, K. Kapp, Utz G. Baitinger |
| 1999 | Efficient Techniques for Accurate Extraction and Modeling of Substrate Coupling in Mixed-Signal IC's. João Paulo Costa, L. Miguel Silveira, Mike Chou |
| 1999 | Efficient Techniques for Modeling Chip-Level Interconnect, Substrate and Package Parasitics. Peter Feldmann, Sharad Kapur, David E. Long |
| 1999 | Emulation of a Fast Reactive Embedded System using a Real Time Operating System. Karlheinz Weiß, Thorsten Steckstor, Wolfgang Rosenstiel |
| 1999 | Experiences with Modeling of Analog and Mixed A/D Systems Based on PWL Technique. Jerzy J. Dabrowski, Andrzej Pulka |
| 1999 | Exploiting Conditional Instructions in Code Generation for Embedded VLIW Processors. Rainer Leupers |
| 1999 | Exploiting State Equivalence on the Fly while Applying Code Motion and Speculation. Luiz C. V. dos Santos, Jochen A. G. Jess |
| 1999 | Exploring the Combination of IDDQ and iDDt Testing: Energy Testing. Josep Rius, Joan Figueras |
| 1999 | FSMD Functional Partitioning for Low Power. Enoch Hwang, Frank Vahid, Yu-Chin Hsu |
| 1999 | Fast Hardware-Software Co-simulation Using VHDL Models. Bassam Tabbara, Marco Sgroi, Alberto L. Sangiovanni-Vincentelli, Enrica Filippi, Luciano Lavagno |
| 1999 | Fast, Robust DC and Transient Fault Simulation for Nonlinear Analog Circuits. Zheng Rong Yang, Mark Zwolinski |
| 1999 | Formal Verification of Word-Level Specifications. Stefan Höreth, Rolf Drechsler |
| 1999 | Formally Verified Redundancy Removal. Stefan Hendricx, Luc J. M. Claesen |
| 1999 | FreezeFrame: Compact Test Generation Using a Frozen Clock Strategy. Yanti Santoso, Matthew C. Merten, Elizabeth M. Rudnick, Miron Abramovici |
| 1999 | Full Scan Fault Coverage With Partial Scan. Xijiang Lin, Irith Pomeranz, Sudhakar M. Reddy |
| 1999 | Functional Verification Methodology for Microprocessors Using the Genesys Test-Program Generator-Application to the x86 Microprocessors Family. Laurent Fournier, Yaron Arbetman, Moshe Levinger |
| 1999 | Glitch Power Minimization by Gate Freezing. Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi |
| 1999 | Hardware Synthesis from C/C++ Models. Giovanni De Micheli |
| 1999 | Hardware Synthesis from C/C++. Abhijit Ghosh, Joachim Kunkel, Stan Y. Liao |
| 1999 | Hierarchical Constraint Transformation Using Directed Interval Search for Analog System Synthesis. Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri |
| 1999 | High Speed GaAs Subsystem Design using Feed Through Logic. Juan A. Montiel-Nelson, Saeid Nooshabadi, V. de Armas, Roberto Sarmiento, Antonio Núñez |
| 1999 | High-speed Software-based Platform for Embedded Software of a Single-chip MPEG-2 Video Encoder LSI with HDTV Scalabilit. Katsuyuki Ochiai, Hiroe Iwasaki, Jiro Naganuma, Makoto Endo, Takeshi Ogura |
| 1999 | Higher Product Complexity and Shorter Development Time - Continuous Challenge to Design and Test Environment. Jouko Junkkari |
| 1999 | How to use Knowledge in an Analysis Process. Heiko Holzheuer |
| 1999 | Identification and Exploitation of Symmetries in DSP Algorithms. C. A. J. van Eijk, E. T. A. F. Jacobs, Bart Mesman, Adwin H. Timmer |
| 1999 | Illegal State Space Identification for Sequential Circuit Test Generation. M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor |
| 1999 | Increasing Efficiency of Symbolic Model Checking by Accelerating Dynamic Variable Reordering. Christoph Meinel, Christian Stangier |
| 1999 | Industrial Evaluation of DRAM Tests. Ad J. van de Goor, J. de Neef |
| 1999 | Influence of Caching and Encoding on Power Dissipation of System-Level Buses for Embedded Systems. William Fornaciari, Donatella Sciuto, Cristina Silvano |
| 1999 | Integrated Resource Assignment and Scheduling of Task Graphs Using Finite Domain Constraints. Krzysztof Kuchcinski |
| 1999 | Integrating Symbolic Techniques in ATPG-Based Sequential Logic Optimization. Enrique San Millán, Luis Entrena, José Alberto Espejo, Silvia Chiusano, Fulvio Corno |
| 1999 | Interoperability of Verilog/VHDL Procedural Language Interfaces to Build a Mixed Language GUI. Françoise Martinolle, Charles Dawson, Debra Corlette, Mike Floyd |
| 1999 | Interpretable Symbolic Small-Signal Characterization of Large Analog Circuits using Determinant Decision Diagrams. Xiang-Dong Tan, Chuanjin Richard Shi |
| 1999 | Interval Diagram Techniques for Symbolic Model Checking of Petri Nets. Karsten Strehl, Lothar Thiele |
| 1999 | Iterative Improvement Based Multi-Way Netlist Partitioning for FPGAs. Helena Krupnova, Gabriele Saucier |
| 1999 | Java, VHDL-AMS, ADA or C for System Level Specifications? |
| 1999 | Kernel Scheduling in Reconfigurable Computing. Rafael Maestre, Fadi J. Kurdahi, Nader Bagherzadeh, Hartej Singh, Román Hermida, Milagros Fernández |
| 1999 | Large European Programs in Microelectronic System and Circuit Design. Patrick M. Dewilde |
| 1999 | Logic Transformation for Low Power Synthesis. Ki-Wook Kim, Sung-Mo Kang, TingTing Hwang, C. L. Liu |
| 1999 | MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis. Robert P. Dick, Niraj K. Jha |
| 1999 | Minimal Length Diagnostic Tests for Analog Circuits using Test History. Alfred V. Gomes, Abhijit Chatterjee |
| 1999 | Minimizing Sensitivity to Delay Variations in High-Performance Synchronous Circuits. Xun Liu, Marios C. Papaefthymiou, Eby G. Friedman |
| 1999 | Multi-Language System Design. Ahmed Amine Jerraya, Rolf Ernst |
| 1999 | OTA Amplifiers Design on Digital Sea-of-Transistors Array. Jung Hyun Choi, Sergio Bampi |
| 1999 | Object-Oriented Reuse Methodology for VHDL. Cristina Barna, Wolfgang Rosenstiel |
| 1999 | On Analog Signature Analysis. Franc Novak, Bojan Hvala, Sandi Klavzar |
| 1999 | On Programmable Memory Built-In Self Test Architectures. Kamran Zarrineh, Shambhu J. Upadhyaya |
| 1999 | On Reducing Transitions Through Data Modifications. Rajeev Murgai, Masahiro Fujita |
| 1999 | On the Design of Self-Checking Functional Units Based on Shannon Circuits. Michele Favalli, Cecilia Metra |
| 1999 | On-Chip Transient Current Monitor for Testing of Low Voltage CMOS IC. Viera Stopjaková, Hans A. R. Manhaeve, M. Sidiropulos |
| 1999 | OpenJ: An Extensible System Level Design Language. Jianwen Zhu, Daniel Gajski |
| 1999 | Operating System Sensitive Device Driver Synthesis from Implementation Independent Protocol Specification. Mattias O'Nils, Axel Jantsch |
| 1999 | Parametric Built-In Self-Test of VLSI Systems. Dirk Niggemeyer, M. Rüffer |
| 1999 | Parametric Fault Diagnosis for Analog Systems Using Functional Mapping. Sasikumar Cherubal, Abhijit Chatterjee |
| 1999 | Path Delay Fault Testing of ICs with Embedded Intellectual Property Blocks. Dimitris Nikolos, Haridimos T. Vergos, Th. Haniotakis, Y. Tsiatouhas |
| 1999 | Peak Power Estimation Using Genetic Spot Optimization for Large VLSI Circuits. Michael S. Hsiao |
| 1999 | Performance Driven Resynthesis by Exploiting Retiming-Induced State Register Equivalence. Priyank Kalla, Maciej J. Ciesielski |
| 1999 | Polynomial Methods for Allocating Complex Components. James Smith, Giovanni De Micheli |
| 1999 | Post-Placement Residual-Overlap Removal with Minimal Movement. Sudip Nag, Kamal Chaudhary |
| 1999 | Potentials of Chip-Package Co-Design for High-Speed Digital Applications. Gerhard Tröster |
| 1999 | Projective Convolution: RLC Model-Order Reduction Using the Impulse Response. Bernard N. Sheehan |
| 1999 | Reasoning about VHDL and VHDL-AMS using Denotational Semantics. Peter T. Breuer, Natividad Martínez Madrid, Jonathan P. Bowen, Robert B. France, Maria M. Larrondo-Petrie, Carlos Delgado Kloos |
| 1999 | Retiming Sequential Circuits with Multiple Register Classes. Klaus Eckl, Christian Legl |
| 1999 | Reuse of IP and virtual components. Ralf Seepold |
| 1999 | Scaling Deeper to Submicron: On-Line Testing to the Rescue. Michael Nicolaidis, Yervant Zorian |
| 1999 | Self Recovering Controller and Datapath Codesign. Samuel Norman Hamilton, Alex Orailoglu, Andre Hertwig |
| 1999 | Sequential Circuit Test Generation Using Decision Diagram Models. Jaan Raik, Raimund Ubar |
| 1999 | Single Chip or Hybrid System Integration. Ivo Bolsens, Wojtek Maly, Ludo Deferm, Jo Borel, Harry J. M. Veendrick |
| 1999 | Software Bit-Slicing: A Technique for Improving Simulation Performance. Peter M. Maurer, William J. Schilp |
| 1999 | Spanning Tree-based State Encoding for Low Power Dissipation. Winfried Nöth, Reiner Kolla |
| 1999 | Specification and Validation of Distributed IP-Based Designs with JavaCAD. Marcello Dalpasso, Alessandro Bogliolo, Luca Benini |
| 1999 | Symbolic Functional Vector Generation for VHDL Specifications. Fabrizio Ferrandi, Franco Fummi, Luca Gerli, Donatella Sciuto |
| 1999 | Symbolic Reachability Analysis of Large Finite State Machines Using Don't Cares. Youpyo Hong, Peter A. Beerel |
| 1999 | Symmetric Transparent BIST for RAMs. Sybille Hellebrand, Hans-Joachim Wunderlich, Vyacheslav N. Yarmolik |
| 1999 | Synthesis of Controllers for Full Testability of Integrated Datapath-Controller Pairs. Joan Carletta, Mehrdad Nourani, Christos A. Papachristou |
| 1999 | Systematic Biasing of Negative Feedback Amplifiers. Chris J. M. Verhoeven, Arie van Staveren |
| 1999 | Temporal Partitioning combined with Design Space Exploration for Latency Minimization of Run-Time Reconfigured Designs. Meenakshi Kaul, Ranga Vemuri |
| 1999 | Testing in Nanometer Technologies. Thomas W. Williams |
| 1999 | Testing the Configurable Interconnect/Logic Interface of SRAM-Based FPGA's. Michel Renovell, Jean-Michel Portal, Joan Figueras, Yervant Zorian |
| 1999 | The Design Space Layer: Supporting Early Design Space Exploration for Core-Based Designs. Margarida F. Jacome, Helvio P. Peixoto, Ander Royo, Juan Carlos López |
| 1999 | The Heterogeneous Structure Problem in Hardware/Software Codesign: A Macroscopic Approach. Juan Antonio Maestro, Daniel Mozos, Román Hermida |
| 1999 | The Rugby Model: A Conceptual Frame for the Study of Modelling, Analysis and Synthesis Concepts of Electronic Systems. Axel Jantsch, Shashi Kumar, Ahmed Hemani |
| 1999 | Time Constrained Modulo Scheduling with Global Resource Sharing. Christoph Jäschke, Rainer Laur, Friedrich Beckmann |
| 1999 | Using Combinational Verification for Sequential Circuits. Rajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, Robert K. Brayton |
| 1999 | Variable Reordering for Shared Binary Decision Diagrams Using Output Probabilities. Mitchell A. Thornton, J. P. Williams, Rolf Drechsler, Nicole Drechsler |
| 1999 | Verifying Imprecisely Working Arithmetic Circuits. Michaela Huhn, Klaus Schneider, Thomas Kropf, George Logothetis |
| 1999 | Virtual Components Application and Customization. Jean-François Agaësse, Bernard Laurent |
| 1999 | Wavefront Technology Mapping. Leon Stok, Andrew J. Sullivan, Mahesh A. Iyer |