| 1998 | 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France Patrick M. Dewilde, Franz J. Rammig, Gerry Musgrave |
| 1998 | A Bypass Scheme for Core-Based System Fault Testing. Mehrdad Nourani, Christos A. Papachristou |
| 1998 | A Cell and Macrocell Compiler for GaAs VLSI Full-Custom Design. Juan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez |
| 1998 | A Comparing Study of Technology Mapping for FPGA. Hans-Georg Martin, Wolfgang Rosenstiel |
| 1998 | A Constraint Driven Approach to Loop Pipelining and Register Binding. Bart Mesman, Marino T. J. Strik, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess |
| 1998 | A Dynamic Model for the State Assignment Problem. Manuel Martínez, Maria J. Avedillo, José M. Quintana, José L. Huertas |
| 1998 | A Flat, Timing-Driven Design System for a High-Performance CMOS Processor Chipset. Jürgen Koehl, Ulrich Baur, Thomas Ludwig, Bernhard Kick, Thomas Pflueger |
| 1998 | A Flexible Message Passing Mechanism for Objective VHDL. Wolfram Putzke-Röming, Martin Radetzki, Wolfgang Nebel |
| 1998 | A Formal Approach to Verification of Linear Analog Circuits with Parameter Tolerances. Lars Hedrich, Erich Barke |
| 1998 | A Formal Description of VHDL-AMS Analogue Systems. Tom J. Kazmierski |
| 1998 | A Fully Digital Controlled Off-Chip IDDQ Measurement Unit. B. Straka, Hans A. R. Manhaeve, Jozef Vanneuville, M. Svajda |
| 1998 | A Knowledge-based System for Hardware-Software Partitioning. Marisa Luisa López-Vallejo, Carlos Angel Iglesias, Juan Carlos López |
| 1998 | A Low-Redundancy Approach to Semi-Concurrent Error Detection in Data Paths. Anna Antola, Vincenzo Piuri, Mariagiovanna Sami |
| 1998 | A Macroscopic Time and Cost Estimation Model Allowing Task Parallelism and Hardware Sharing for the Codesign Partitioning Process. Juan Antonio Maestro, Daniel Mozos, Hortensia Mecha |
| 1998 | A Model for System-Level Timed Analysis and Profiling. Alberto Allara, William Fornaciari, Fabio Salice, Donatella Sciuto |
| 1998 | A Modeling Approach to Include Mechanical Microsystem Components into the System Simulation. R. Neul, U. Becker, G. Lorenz, Peter Schwarz, Jürgen Haase, S. Wünsche |
| 1998 | A New Paradigm for Dichotomy-based Constrained Encoding. Olivier Coudert |
| 1998 | A Performance-Driven MCM Router with Special Consideration of Crosstalk Reduction. Dongsheng Wang, Ernest S. Kuh |
| 1998 | A Polynomial Time Optimal Algorithm for Simultaneous Buffer and Wire Sizing. Chris C. N. Chu, D. F. Wong |
| 1998 | A Programmable Multi-Language Generator for CoDesign. Jean Paul Calvez, Dominique Heller, F. Muller, Olivier Pasquier |
| 1998 | A Scalable Architecture for Multi-threaded JAVA Applications. Michael Mrva, Klaus Buchenrieder, Rainer Kress |
| 1998 | A Scalable Methodology for Cost Estimation in a Transformational High-Level Design Space Exploration Environment. Joachim Gerlach, Wolfgang Rosenstiel |
| 1998 | A Sequential Detailed Router for Huge Grid Graphs. Asmus Hetzel |
| 1998 | A Synthesis Procedure for Flexible Logic Functions. Irith Pomeranz, Sudhakar M. Reddy |
| 1998 | A System-Level Co-Verification Environment for ATM Hardware Design. Guido Post, Andrea Müller, Thorsten Grötker |
| 1998 | A Systematic Analysis of Reuse Strategies for Design of Electronic Circuits. Manfred Koegst, Dieter Garte, Peter Conradi, Michael G. Wahl |
| 1998 | A Systems Theoretic Approach to Behavioural Modeling and Simulation of Analog Functional Blocks. Ralf Rosenberger, Sorin A. Huss |
| 1998 | A Unified Technique for PCB/MCM Design by Combining Electromagnetic Field Analysis with Circuit Simulator. Hideaki Kimura, Norihito Iyenaga |
| 1998 | A VHDL SGRAM Model for the Validation Environment of a High Performance Graphic Processor. Michael G. Wahl, Holger Völkel |
| 1998 | AFTA: A Formal Delay Model for Functional Timing Analysis. V. Chandramouli, Jesse Whittemore, Karem A. Sakallah |
| 1998 | AGENDA: An Attribute Grammar Driven Environment for the Design Automation of Digital Systems. George Economakos, George K. Papakonstantinou, Panayotis Tsanakas |
| 1998 | ATM Traffic Shaper: ATS. Juan Carlos Diaz, Pierre Plaza, Jesus Crespo |
| 1998 | Address Bus Encoding Techniques for System-Level Power Optimization. Luca Benini, Giovanni De Micheli, Donatella Sciuto, Enrico Macii, Cristina Silvano |
| 1998 | Advanced Optimistic Approaches in Logic Simulation. Stefan Schmerler, Yankin Tanurhan, Klaus D. Müller-Glaser |
| 1998 | Algorithms for Detailed Placement of Standard Cells. Jens Vygen |
| 1998 | An Algorithm To Determine Mutually Exclusive Operations In Behavioral Descriptions. Jian Li, Rajesh K. Gupta |
| 1998 | An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits. Juan A. Prieto, Adoración Rueda, Ian Andrew Grout, Eduardo J. Peralías, José L. Huertas, Andrew Mark David Richardson |
| 1998 | An Effective General Connectivity Concept for Clustering. Jianjian Song, Zhaoxuan Shen, Wenjun Zhuang |
| 1998 | An Efficient Algorithm for Fast Parasitic Extraction and Passive Order Reduction of 3D Interconnect Models. Nuno Alexandre Marques, Mattan Kamon, Jacob K. White, Luís Miguel Silveira |
| 1998 | An Efficient Algorithm to Integrate Scheduling and Allocation in High-Level Test Synthesis. Laurence Tianruo Yang, Zebo Peng |
| 1998 | An Efficient Divide and Conquer Algorithm for Exact Hazard Free Logic Minimization. J. W. J. M. Rutten, Michel R. C. M. Berkelaar, C. A. J. van Eijk, M. A. J. Kolsteren |
| 1998 | An Energy-Conscious Exploration Methodology for Reconfigurable DSPs. Jan M. Rabaey, Marlene Wan |
| 1998 | An Interactive Router for Analog IC Design. Thorsten Adler, Juergen Schaeuble |
| 1998 | An Object-Oriented Model for Specification, Prototyping, Implementation and Reuse. Jörg Böttger, Karlheinz Agsteiner, Dieter Monjau, Sören Schulze |
| 1998 | Analog Test Design with IDD Measurements for the Detection of Parametric and Catastrophic Faults. Walter M. Lindermeir, Thomas J. Vogels, Helmut E. Graeb |
| 1998 | Architectural Rule Checking for High-level Synthesis. Jie Gong, Chih-Tung Chen, Kayhan Küçükçakar |
| 1998 | Architectural Simulation in the Context of Behavioral Synthesis. Abderrazek Jemai, Polen Kission, Ahmed Amine Jerraya |
| 1998 | Asynchronous Scheduling and Allocation. Anatoly Prihozhy |
| 1998 | Automatic Topology Optimization for Analog Module Generators. Markus Wolf, Ulrich Kleine |
| 1998 | Built-In Self-Test with an Alternating Output. T. Bogue, Michael Gössel, Helmut Jürgensen, Yervant Zorian |
| 1998 | CASPER: Concurrent Hardware-Software Co-Synthesis of Hard Real-Time Aperiodic and Periodic Specifications of Embedded System Architectures. Bharat P. Dave, Niraj K. Jha |
| 1998 | CMOS Combinational Circuit Sizing by Stage-wise Tapering. Satyamurthy Pullela, Rajendran Panda, Abhijit Dharchoudhury, Gopal Vija |
| 1998 | Characterization-Free Behavioral Power Modeling. Alessandro Bogliolo, Luca Benini, Giovanni De Micheli |
| 1998 | Collapsing the Transistor Chain to an Effective Single Equivalent Transistor. Alexander Chatzigeorgiou, Spiridon Nikolaidis |
| 1998 | Combinational Verification based on High-Level Functional Specifications. Evguenii I. Goldberg, Yuji Kukimoto, Robert K. Brayton |
| 1998 | Concurrent Error Recovery with Near-Zero Latency in Synthesized ASICs. Samuel Norman Hamilton, Alex Orailoglu |
| 1998 | Constraints Space Management for the Layout of Analog IC's. Bogdan G. Arsintescu, Ralph H. J. M. Otten |
| 1998 | Core Interconnect Testing Hazards. Petra Nordholz, Hartmut Grabinski, Dieter Treytnar, Jan Otterstedt, Dirk Niggemeyer, Uwe Arz, T. W. Williams |
| 1998 | Correct High-Level Synthesis: a Formal Perspective. José M. Mendías, Román Hermida |
| 1998 | Cross-Level Hierarchical High-Level Synthesis. Oliver Bringmann, Wolfgang Rosenstiel |
| 1998 | Data Cache Sizing for Embedded Processor Applications. Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau |
| 1998 | Data Driven Power Optimization of Sequential Circuits. Qi Wang, Sarma B. K. Vrudhula |
| 1998 | Denotational Semantics of a Behavioral Subset of VHDL. Felix Nicoli |
| 1998 | Design Methodologies for System Level IP. Grant Martin |
| 1998 | Design Of Future Systems. Ian Page |
| 1998 | Design of Fault-Secure Parity-Prediction Booth Multipliers. Michael Nicolaidis, Ricardo de Oliveira Duarte |
| 1998 | Design-Manufacturing Interface: Part I - Vision. Wojciech Maly, Pranab K. Nag, Hans T. Heineken, Jitendra Khare |
| 1998 | Design-Manufacturing Interface: Part II - Applications. Wojciech Maly, Pranab K. Nag, Charles H. Ouyang, Hans T. Heineken, Jitendra Khare, P. Simon |
| 1998 | Design-for-Testability for Synchronous Sequential Circuits using Locally Available Lines. Irith Pomeranz, Sudhakar M. Reddy |
| 1998 | Dynamic Minimization of Word-Level Decision Diagrams. Stefan Höreth, Rolf Drechsler |
| 1998 | EASY - a System for Computer-Aided Examination of Analog Circuits. Guido Dröge, Manfred Thole, Ernst-Helmut Horneber |
| 1998 | Efficient Compilation of Process-Based Concurrent Programs without Run-Time Scheduling. Bill Lin |
| 1998 | Efficient DC Fault Simulation of Nonlinear Analog Circuits. Michael W. Tian, Chuanjin Richard Shi |
| 1998 | Efficient Encoding Schemes for Symbolic Analysis of Petri Nets. Enric Pastor, Jordi Cortadella |
| 1998 | Efficient Minarea Retiming of Large Level-Clocked Circuits. Naresh Maheshwari, Sachin S. Sapatnekar |
| 1998 | Efficient Techniques for Accurate Modeling and Simulation of Substrate Coupling in Mixed-Signal IC's. João Paulo Costa, Mike Chou, L. Miguel Silveira |
| 1998 | Efficient Verification using Generalized Partial Order Analysis. Steven Vercauteren, Diederik Verkest, Gjalt G. de Jong, Bill Lin |
| 1998 | Embedded DRAM Architectural Trade-Offs. Norbert Wehn, Søren Hein |
| 1998 | Energy-Delay Efficient Data Storage and Transfer Architectures: Circuit Technology versus Design Methodology Solutions. Francky Catthoor |
| 1998 | Enhanced Reuse and Teamwork Capabilities for an Object-oriented Extension of VHDL. Michael Mrva |
| 1998 | Estimation of the Defective IDDQ Caused by Shorts in Deep-Submicron CMOS ICs. Rosa Rodríguez-Montañés, Joan Figueras |
| 1998 | Exact and Approximate Estimation for Maximum Instantaneous Current of CMOS Circuits. Yi-Min Jiang, Kwang-Ting Cheng |
| 1998 | Exploiting Symbolic Techniques for Partial Scan Flip Flop Selection. Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante |
| 1998 | FRIDGE: A Fixed-Point Design and Simulation Environment. Holger Keding, Markus Willems, Martin Coors, Heinrich Meyr |
| 1998 | Fast Field Solvers for Thermal and Electrostatic Analysis. Vladimír Székely, Márta Rencz |
| 1998 | Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques. Elizabeth M. Rudnick, Roberto Vietti, Akilah Ellis, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda |
| 1998 | Fault Analysis in Networks with Concurrent Error Detection Properties. Cristiana Bolchini, Fabio Salice, Donatella Sciuto |
| 1998 | Fault Detection for Linear Analog Circuits Using Current Injection. Jaime Velasco-Medina, Th. Calin, Michael Nicolaidis |
| 1998 | Formal Specification in VHDL for Hardware Verification. Ralf Reetz, Klaus Schneider, Thomas Kropf |
| 1998 | Formal Verification: A New Standard CAD Tool for the Industrial Design Flow. Wolfgang Rosenstiel |
| 1998 | From Algorithms to Hardware Architectures: A Comparison of Regular and Irregular Structured IDCT Algorithms. Claus Schneider, Martin Kayss, Thomas Hollstein, Jürgen Deicke |
| 1998 | Functional Scan Chain Testing. Douglas Chang, Kwang-Ting Cheng, Malgorzata Marek-Sadowska, Mike Tien-Chien Lee |
| 1998 | Fuzzy-logic digital-analogue interfaces for accurate mixed-signal simulation. Tom J. Kazmierski |
| 1998 | Gated Clock Routing Minimizing the Switched Capacitance. Jaewon Oh, Massoud Pedram |
| 1998 | Generation of Interconnect Topologies for Communication Synthesis. Michael Gasteier, Manfred Glesner, Michael Münch |
| 1998 | Graphical Entry of FSMDs Revisited: Putting Graphical Models on a Solid Base. Thomas Müller-Wipperfürth, Richard Hagelauer |
| 1998 | Hardware Resource Allocation for Hardware/Software Partitioning in the LYCOS System. Jesper Grode, Peter Voigt Knudsen, Jan Madsen |
| 1998 | Hardware Software Partitioning with Integrated Hardware Design Space Exploration. Vinoo Srinivasan, Shankar Radhakrishnan, Ranga Vemuri |
| 1998 | Hardware/Software Co-Design of a Fuzzy RISC Processor. Valentina Salapura, Michael Gschwind |
| 1998 | Hierarchical Characterization of Analog Integrated CMOS Circuits. Josef Eckmüller, Martin Groepl, Helmut E. Graeb |
| 1998 | Hierarchical Top-Down Design of Analog Sensor Interfaces: From System-Level Specifications Down to Silicon. Jan Vandenbussche, Stéphane Donnay, Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen |
| 1998 | High Speed Neural Network Chip for Trigger Purposes in High Energy Physics. Wolfgang Eppler, Thomas Fischer, Hartmut Gemmeke, A. Menchikov |
| 1998 | Highly Testable and Compact 1-out-of-n Code Checker with Single Output. Cecilia Metra, Michele Favalli, Bruno Riccò |
| 1998 | IMPACT: A High-Level Synthesis System for Low Power Control-Flow Intensive Circuits. Kamal S. Khouri, Ganesh Lakshminarayana, Niraj K. Jha |
| 1998 | IOCIMU - An Integrated Off-Chip IDDQ Measurement Unit. M. Svajda, B. Straka, Hans A. R. Manhaeve |
| 1998 | IP-Based System-on-a-Chip Design. Bart De Loore |
| 1998 | Improved Approximation Bounds for the Group Steiner Problem. Christopher S. Helvig, Gabriel Robins, Alexander Zelikovsky |
| 1998 | Innovative System-level Design Environment Based on FORM for Transport Processing System. Kazushige Higuchi, Kazuhiro Shirakawa |
| 1998 | Instruction Scheduling for Power Reduction in Processor-Based System Design. Hiroyuki Tomiyama, Tohru Ishihara, Akihiko Inoue, Hiroto Yasuura |
| 1998 | Interconnect Tuning Strategies for High-Performance Ics. Andrew B. Kahng, Sudhakar Muddu, Egino Sarto, Rahul Sharma |
| 1998 | Layout-Driven High Level Synthesis for FPGA Based Architectures. Min Xu, Fadi J. Kurdahi |
| 1998 | MCM Interconnect Design Using Two-Pole Approximation. Jianhua Shao, Richard M. M. Chen |
| 1998 | March Tests for Word-Oriented Memories. Ad J. van de Goor, Issam B. S. Tlili |
| 1998 | Measuring the Effectiveness of Various Design Validation Approaches For PowerPC(TM) Microprocessor Arrays. Li-C. Wang, Magdy S. Abadir, Jing Zeng |
| 1998 | Microsystems Testing: an Approach and Open Problems. Marcelo Lubaszewski, Érika F. Cota, Bernard Courtois |
| 1998 | Model Abstraction for Formal Verification. Yee-Wing Hsieh, Steven P. Levitan |
| 1998 | Multi-output Functional Decomposition with Exploitation of Don't Cares. Christoph Scholl |
| 1998 | Multiple Behavior Module Synthesis Based on Selective Groupings. Ju Hwan Yi, Hoon Choi, In-Cheol Park, Seung Ho Hwang, Chong-Min Kyung |
| 1998 | Next Generation System Level Design Tools. Wolfgang Rosenstiel |
| 1998 | Novel Technique for Testing FPGAs. Cecilia Metra, Michel Renovell, Giovanni A. Mojoli, Jean-Michel Portal, Sandro Pastore, Joan Figueras, Yervant Zorian, Davide Salvi, Giacomo R. Sechi |
| 1998 | Object-Oriented Modelling of Parallel Hardware Systems. Guido Schumacher, Wolfgang Nebel |
| 1998 | On Removing Multiple Redundancies in Combinational Circuits. David Ihsin Cheng |
| 1998 | On the Reuse of Symbolic Simulation Results for Incremental Equivalence Verification of Switch-Level Circuits. Lluís Ribas, Jordi Carrabina |
| 1998 | Optimal Temporal Partitioning and Synthesis for Reconfigurable Architectures. Meenakshi Kaul, Ranga Vemuri |
| 1998 | Optimized Implementations of the Multi-Configuration DFT Technique for Analog Circuits. Michel Renovell, Florence Azaïs, Yves Bertrand |
| 1998 | Optimized Timed Hardware Software Cosimulation without Roll-back. Wonyong Sung, Soonhoi Ha |
| 1998 | PASTEL: A Parameterized Memory Characterization System. Kimihiro Ogawa, Michinari Kohno, Fusako Kitamura |
| 1998 | PSCP: A Scalable Parallel ASIP Architecture for Reactive Systems. Andreas Pyttel, Alexander Sedlmeier, Christian Veith |
| 1998 | Parallel VHDL Simulation. Edwin Naroska |
| 1998 | Path Verification Using Boolean Satisfiability. Matthias Ringe, Thomas Lindenkreuz, Erich Barke |
| 1998 | Performance - Manufacturability Tradeoffs in IC Design. Hans T. Heineken, Wojciech Maly |
| 1998 | Power Estimation of Behavioral Descriptions. Fabrizio Ferrandi, Franco Fummi, Enrico Macii, Massimo Poncino |
| 1998 | Power and Timing Modeling for ASIC Designs. Wolfgang Roethig, A. M. Zarkesh, M. Andrews |
| 1998 | Power-Simulation of Cell Based ASICs: Accuracy- and Performance Trade-Offs. Dirk Rabe, Gerd Jochens, Lars Kruse, Wolfgang Nebel |
| 1998 | PowerShake: A Low Power Driven Clustering and Factoring Methodology for Boolean Expressions. Sumit Roy, Harm Arts, Prithviraj Banerjee |
| 1998 | Procedures for Static Compaction of Test Sequences for Synchronous Sequential Circuits Based on Vector Restoration. Ruifeng Guo, Irith Pomeranz, Sudhakar M. Reddy |
| 1998 | Propagation of Last-Transition-Time Constraints in Gate-Level Timing Analysis. Maroun Kassab, Eduard Cerny, Sidi Aourid, Thomas H. Krodel |
| 1998 | Quality Estimation of Test Vectors and Functional Validation Procedures Based on Fault and Error Models. Teresa Riesgo, Yago Torroja, Eduardo de la Torre, Javier Uceda |
| 1998 | RAM-Based FPGA's: A Test Approach for the Configurable Logic. Michel Renovell, Jean-Michel Portal, Joan Figueras, Yervant Zorian |
| 1998 | Reconfigurable Logic for Systems on a Chip. W. Shields Neely |
| 1998 | Reduced-Order Modeling of Large Linear Passive Multi-Terminal Circuits Using Matrix-Pade Approximation. Roland W. Freund, Peter Feldmann |
| 1998 | Register Transfer Level VHDL Models without Clocks. Matthias Mutz |
| 1998 | Register-Constrained Address Computation in DSP Programs. Anupam Basu, Rainer Leupers, Peter Marwedel |
| 1998 | Repartitioning and Technology-Mapping of Electronic Hybrid Systems. Christoph Grimm, Klaus Waldschmidt |
| 1998 | Restructuring Logic Representations with Easily Detectable Simple Disjunctive Decompositions. Hiroshi Sawada, Shigeru Yamashita, Akira Nagoya |
| 1998 | Scanning Datapaths: A Fast and Effective Partial Scan Selection Technique. Marie-Lise Flottes, R. Pires, Bruno Rouzeyre, Laurent Volpe |
| 1998 | Scheduling and Module Assignment for Reducing Bist Resources. Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer |
| 1998 | Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems. Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli, Paul Pop |
| 1998 | Scheduling of Outputs in Grammar-based Hardware Synthesis of Data Communication Protocols. Johnny Öberg, Ahmed Hemani, Anshul Kumar |
| 1998 | Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs. Vyacheslav N. Yarmolik, Sybille Hellebrand, Hans-Joachim Wunderlich |
| 1998 | Sequential Equivalence Checking without State Space Traversal. C. A. J. van Eijk |
| 1998 | Silicon Debug of Systems-on-Chips. |
| 1998 | Smart Pixel Implementation of a 2-D Parallel Nucleic Wavelet Transform for Mobile Multimedia Communications. A. M. Rassau, T. C. B. Yu, H. Cheung, Stefan Lachowicz, Kamran Eshraghian, William A. Crossland, Tim D. Wilkinson |
| 1998 | State Relaxation Based Subsequence Removal for Fast Static Compaction in Sequential Circuits. Michael S. Hsiao, Srimat T. Chakradhar |
| 1998 | Static Analysis Tools for Soft-Core Reviews and Audits. Serafín Olcoz, Ana Castellvi, Maria Garcia, Jose Angel Gomez |
| 1998 | Stream Communication between Real-Time Tasks in a High-Performance Multiprocessor. Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess |
| 1998 | Switch-Level Fault Coverage Analysis for Switched-Capacitor Systems. Salvador Mir, Adoración Rueda, Diego Vázquez, José Luis Huertas |
| 1998 | Switching Response Modeling of the CMOS Inverter for Sub-micron Devices. Labros Bisdounis, Odysseas G. Koufopavlou, Constantinos E. Goutis, Spiridon Nikolaidis |
| 1998 | Synthesis of Communicating Controllers for Concurrent Hardware/Software Systems. Ralf Niemann, Peter Marwedel |
| 1998 | Synthesis of Wiring Signature-Invariant Equivalence Class Circuit Mutants and Applications to Benchmarking. Debabrata Ghosh, Nevin Kapur, Franc Brglez, Justin E. Harlow III |
| 1998 | Technology Mapping for Minimizing Gate and Routing Area. Aiguo Lu, Guenter Stenz, Frank M. Johannes |
| 1998 | Temperature Effect on Delay for Low Voltage Applications. Jean Michel Daga, E. Ottaviano, Daniel Auvergne |
| 1998 | Testing DSP Cores Based on Self-Test Programs. Wei Zhao, Christos A. Papachristou |
| 1998 | The Design of an Asynchronous VHDL Synthesizer. Sun-Yen Tan, Stephen B. Furber, Wen-Fang Yen |
| 1998 | Timing Analysis and Optimization of a High-Performance CMOS Processor Chipset. Uwe Fassnacht, Jürgen Schietke |
| 1998 | Trace-Driven Steady-State Probability Estimation in FSMs with Application to Power Estimation. Diana Marculescu, Radu Marculescu, Massoud Pedram |
| 1998 | Universal Strong Encryption FPGA Core Implementation. Davor Runje, Mario Kovac |
| 1998 | VHDL Modelling and Analysis of Fault Secure Systems. Jason Coppens, Dhamin Al-Khalili, Côme Rozon |
| 1998 | VHDL Teamwork, Organization Units and Workspace Management. Serafín Olcoz, Lorenzo Ayuda, Ivan Izaguirre, Olga Peñalba |
| 1998 | VHDL-AMS: The Missing Link in System Design - Experiments with Unified Modelling in Automotive Engineering. Eduard Moser, Norbert Mittwollen |
| 1998 | VLSI Architecture for Lossless Compression of Medical Images Using the Discrete Wavelet Transform. Isidoro Urriza, José Ignacio Artigas, José I. García-Nicolás, Luis Angel Barragan, Denis Navarro |
| 1998 | Verification by Simulation Comparison using Interface Synthesis. Cordula Hansen, Arno Kunzmann, Wolfgang Rosenstiel |
| 1998 | XFVHDL: A Tool for the Synthesis of Fuzzy Logic Controllers. E. Lago, Carlos Jesús Jiménez-Fernández, Diego R. López, Santiago Sánchez-Solano, Angel Barriga |