| 1999 | 0.18m CMOS and Beyond. D. J. Eaglesham |
| 1999 | A 10 Mbit/s Upstream Cable Modem with Automatic equalization. Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels |
| 1999 | A CAD Tool for Optical MEMS. Timothy P. Kurzweg, Steven P. Levitan, Philippe J. Marchand, Jose A. Martinez, Kurt R. Prough, Donald M. Chiarulli |
| 1999 | A Floorplan-Based Planning Methodology for Power and Clock Distribution in ASICs. Joon-Seo Yim, Seong-Ok Bae, Chong-Min Kyung |
| 1999 | A Framework for Collaborative and Distributed Web-Based Design. Gangadhar Konduri, Anantha P. Chandrakasan |
| 1999 | A Framework for User Assisted Design Space Exploration. Xiaobo Hu, Garrison W. Greenwood, S. Ravichandran, Gang Quan |
| 1999 | A Low Power Hardware/Software Partitioning Approach for Core-Based Embedded Systems. Jörg Henkel |
| 1999 | A Massively-Parallel Easily-Scalable Satisfiability Solver Using Reconfigurable Hardware. Miron Abramovici, José T. de Sousa, Daniel G. Saab |
| 1999 | A Methodology for Accurate Performance Evaluation in Architecture Exploration. George Hadjiyiannis, Pietro Russo, Srinivas Devadas |
| 1999 | A Methodology for the Verification of a "System on Chip". Daniel Geist, Giora Biran, Tamarah Arons, Michael Slavkin, Yvgeny Nustov, Monica Farkas, Karen Holtz, Andy Long, Dave King, Steve Barret |
| 1999 | A Model for Scheduling Protocol-Constrained Components and Environments. Steve Haynal, Forrest Brewer |
| 1999 | A Multiscale Method for Fast Capacitance Extraction. Johannes Tausch, Jacob K. White |
| 1999 | A Novel VLSI Layout Fabric for Deep Sub-Micron Applications. Sunil P. Khatri, Amit Mehrotra, Robert K. Brayton, Ralph H. J. M. Otten, Alberto L. Sangiovanni-Vincentelli |
| 1999 | A Practical Approach to Multiple-Class Retiming. Klaus Eckl, Jean Christophe Madre, Peter Zepter, Christian Legl |
| 1999 | A Practical Gate Resizing Technique Considering Glitch Reduction for Low Power Design. Masanori Hashimoto, Hidetoshi Onodera, Keikichi Tamaru |
| 1999 | A Reordering Technique for Efficient Code Motion. Luiz C. V. dos Santos, Jochen A. G. Jess |
| 1999 | A Study in Coverage-Driven Test Generation. Mike Benjamin, Daniel Geist, Alan Hartman, Gérard Mas, Ralph Smeets, Yaron Wolfsthal |
| 1999 | A Timing-Driven Soft-Macro Resynthesis Method in Interaction with Chip Floorplanning. Hsiao-Pin Su, Allen C.-H. Wu, Youn-Long Lin |
| 1999 | A Two-State Methodology for RTL Logic Simulation. Lionel Bening |
| 1999 | An Approach for Extracting RT Timing Information to Annotate Algorithmic VHDL Specifications. Cordula Hansen, Francisco Nascimento, Wolfgang Rosenstiel |
| 1999 | An Approxmimate Algorithm for Delay-Constraint Technology Mapping. Sumit Roy, Krishna P. Belkhale, Prithviraj Banerjee |
| 1999 | An Automated Temporal Partitioning and Loop Fission Approach for FPGA Based Reconfigurable Synthesis of DSP Applications. Meenakshi Kaul, Ranga Vemuri, Sriram Govindarajan, Iyad Ouaiss |
| 1999 | An Efficient Lyapunov Equation-Based Approach for Generating Reduced-Order Models of Interconnect. Jing-Rebecca Li, Frank Wang, Jacob White |
| 1999 | An O-Tree Representation of Non-Slicing Floorplan and Its Applications. Pei-Ning Guo, Chung-Kuan Cheng, Takeshi Yoshimura |
| 1999 | Analysis of Performance Impact Caused by Power Supply Noise in Deep Submicron Devices. Yi-Min Jiang, Kwang-Ting Cheng |
| 1999 | Application of High Level Interface-Based Design to Telecommunications System Hardware. Dyson Wilkes, M. M. Kamal Hashmi |
| 1999 | Automated Phase Assignment for the Synthesis of Low Power Domino Circuits. Priyadarshan Patra, Unni Narayanan |
| 1999 | Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems. Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, Alexandre Yakovlev |
| 1999 | Behavioral Network Graph: Unifying the Domains of High-Level and Logic Synthesis. Reinaldo A. Bergamaschi |
| 1999 | Behavioral Synthesis Techniques for Intellectual Property Protection. Inki Hong, Miodrag Potkonjak |
| 1999 | Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration. Alex Doboli, Adrián Núñez-Aldana, Nagu R. Dhanwada, Sree Ganesan, Ranga Vemuri |
| 1999 | Buffer Insertion with Accurate Gate and Interconnect Delay Computation. Charles J. Alpert, Anirudh Devgan, Stephen T. Quay |
| 1999 | Built-In Test Sequence Generation for Synchronous Sequential Circuits Based on Loading and Expansion of Test Subsequences. Irith Pomeranz, Sudhakar M. Reddy |
| 1999 | CAD Directions for High Performance Asynchronous Circuits. Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella, Ran Ginosar, Michael Kishinevsky, Marly Roncken |
| 1999 | Circuit Complexity Reduction for Symbolic Analysis of Analog Integrated Circuits. Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
| 1999 | Common-Case Computation: A High-Level Technique for Power and Performance Optimization. Ganesh Lakshminarayana, Anand Raghunathan, Kamal S. Khouri, Niraj K. Jha, Sujit Dey |
| 1999 | Comparing RTL and Behavioral Design Methodologies in the Case of a 2M-Transistor ATM Shaper. Imed Moussa, Zoltan Sugar, Rodolph Suescun, Mario Diaz-Nava, Marco Pavesi, Salvatore Crudo, Luca Gazi, Ahmed Amine Jerraya |
| 1999 | Constraint Driven Code Selection for Fixed-Point DSPs. Steven Bashford, Rainer Leupers |
| 1999 | Constraint Management for Collaborative Electronic Design. Juan Antonio Carballo, Stephen W. Director |
| 1999 | Converting a 64b PowerPC Processor from CMOS Bulk to SOI Technology. D. Allen, D. Behrends, B. Stanisic |
| 1999 | Coverage Estimation for Symbolic Model Checking. Yatin Vasant Hoskote, Timothy Kam, Pei-Hsin Ho, Xudong Zhao |
| 1999 | Crosstalk Minimization Using Wire Perturbations. Prashant Saxena, C. L. Liu |
| 1999 | Customized Instruction-Sets for Embedded Processors. Joseph A. Fisher |
| 1999 | Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification. Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar, Chris Schläger, Bassam Tabbara, Vojin Zivojnovic |
| 1999 | Cycle-Accurate Simulation of Energy Consumption in Embedded Systems. Tajana Simunic, Luca Benini, Giovanni De Micheli |
| 1999 | Cycle-Based Symbolic Simulation of Gate-Level Synchronous Circuits. Valeria Bertacco, Maurizio Damiani, Stefano Quer |
| 1999 | Dealing with Inductance in High-Speed Chip Design. Phillip J. Restle, Albert E. Ruehli, Steven G. Walker |
| 1999 | Description and Simulation of Hardware/Software Systems with Java. Tommy Kuhn, Wolfgang Rosenstiel, Udo Kebschull |
| 1999 | Design Considerations for Battery-Powered Electronics. Massoud Pedram, Qing Wu |
| 1999 | Design Strategy of On-Chip Inductors for Highly Integrated RF Systems. C. Patrick Yue, S. Simon Wong |
| 1999 | Design and Implementation of a Scalable Encryption Processor with Embedded Variable DC/DC Converter. James Goodman, Anantha P. Chandrakasan, Abram P. Dancy |
| 1999 | Detecting False Timing Paths: Experiments on PowerPC Microprocessors. Richard Raimi, Jacob A. Abraham |
| 1999 | Developing an Architecture Validation Suite: Applicaiton to the PowerPC Architecture. Laurent Fournier, Anatoly Koyfman, Moshe Levinger |
| 1999 | Digital Aetection of Analog Parametric Faults in SC Filters. Ramesh Harjani, Bapiraju Vinnakota |
| 1999 | Distributed Application Development with Inferno. Ravi Sharma |
| 1999 | Dynamic Fault Diagnosis on Reconfigurable Hardware. Fatih Kocan, Daniel G. Saab |
| 1999 | Dynamic Power Management Based on Continuous-Time Markov Decision Processes. Qinru Qiu, Massoud Pedram |
| 1999 | Dynamically Reconfigurable Architecture for Image Processor Applications. Alexandro M. S. Adário, Eduardo L. Roehe, Sergio Bampi |
| 1999 | ECL: A Specification Environment for System-Level Design. Luciano Lavagno, Ellen Sentovich |
| 1999 | ENOR: Model Order Reduction of RLC Circuits Using Nodal Equations for Efficient Factorization. Bernard N. Sheehan |
| 1999 | Effective Iterative Techniques for Fingerprinting Design IP. Andrew E. Caldwell, Hyun-Jin Choi, Andrew B. Kahng, Stefanus Mantik, Miodrag Potkonjak, Gang Qu, Jennifer L. Wong |
| 1999 | Effects of Inductance on the Propagation Delay and Repeater Insertion in VLSI Circuits. Yehea I. Ismail, Eby G. Friedman |
| 1999 | Efficient Algorithms for Optimum Cycle Mean and Optimum Cost to Time Ratio Problems. Ali Dasdan, Sandy Irani, Rajesh K. Gupta |
| 1999 | Efficient Capacitance Computation for Structures with Non-Uniform Adaptive Surface Meshes. Vikram Jandhyala, Scott Savage, J. Eric Bracken, Zoltan J. Cendes |
| 1999 | Efficient Computation of Quasi-Periodic Circuit Operating Conditions via a Mixed Frequency/Time Approach. Dan Feng, Joel R. Phillips, Keith Nabors, Kenneth S. Kundert, Jacob White |
| 1999 | Embedded Application Design Using a Real-Time OS. David Stepner, Nagarajan Rajan, David Hui |
| 1999 | Engineering Change: Methodology and Applications to Behavioral and System Synthesis. Darko Kirovski, Miodrag Potkonjak |
| 1999 | Enhancing Simulation with BDDs and ATPG. Malay K. Ganai, Adnan Aziz, Andreas Kuehlmann |
| 1999 | Equivalent Elmore Delay for Yehea I. Ismail, Eby G. Friedman, José Luis Neves |
| 1999 | Error Bounded Padé Approximation via Bilinear Conformal Transformation. Chung-Ping Chen, D. F. Wong |
| 1999 | Exact Memory Size Estimation for Array Computations without Loop Unrolling. Ying Zhao, Sharad Malik |
| 1999 | Exploiting Intellectual Properties in ASIP Designs for Embedded DSP Software. Hoon Choi, Ju Hwan Yi, Jong-Yeol Lee, In-Cheol Park, Chong-Min Kyung |
| 1999 | Exploiting Positive Equality and Partial Non-Consistency in the Formal Verification of Pipelined Microprocessors. Miroslav N. Velev, Randal E. Bryant |
| 1999 | FAR-DS: Full-Plane AWE Routing with Driver Sizing. Jiang Hu, Sachin S. Sapatnekar |
| 1999 | Fast Prototyping: A System Design Flow Applied to a Complex System-on-Chip Multiprocessor Design. Benoit Clement, Richard Hersemeule, Etienne Lantreibecq, Bernard Ramanadin, Pierre Coulomb, François Pogodalla |
| 1999 | Functional Timing Analysis for IP Characterization. Hakan Yalcin, Mohammad Mortazavi, Robert Palermo, Cyrus Bamji, Karem A. Sakallah |
| 1999 | Functional Verification - Real Users, Real Problems, Real Opportunities (Panel). Jonah McLeod, Nozar Azarakhsh, Glen Ewing, Paul Gingras, Scott Reedstrom, Chris Rowen |
| 1999 | Functional Verification of the Equator MAP1000 Microprocessor. Jian Shen, Jacob A. Abraham, Dave Baker, Tony Hurson, Martin Kinkade, Gregorio Gervasio, Chen-Chau Chu, Guanghui Hu |
| 1999 | Gate-Level Design Exploiting Dual Supply Voltages for Power-Driven Applications. Ching-Wei Yeh, Min-Cheng Chang, Shih-Chieh Chang, Wen-Ben Jone |
| 1999 | Genetic List Scheduling Algorithm for Scheduling and Allocation on a Loosely Coupled Heterogeneous Multiprocessor System. Martin Grajcar |
| 1999 | Global Multimedia System Design Exploration Using Accurate Memory Organization Feedback. Arnout Vandecappelle, Miguel Miranda, Erik Brockmeyer, Francky Catthoor, Diederik Verkest |
| 1999 | Gradient-Based Optimization of Custom Circuits Using a Static-Timing Formulation. Andrew R. Conn, Ibrahim M. Elfadel, W. W. Molzen, P. R. O'Brien, Philip N. Strenski, Chandramouli Visweswariah, C. B. Whan |
| 1999 | Graph Coloring Algorithms for Fast Evaluation of Curtis Decompositions. Marek A. Perkowski, Rahul Malvi, Stan Grygiel, Michael Burns, Alan Mishchenko |
| 1999 | HW and SW in Embedded System Design: Loveboat, Shipwreck, or Ships Passing in the Night. Raul Camposano, Kurt Keutzer, Jerry Fiddler, Alberto L. Sangiovanni-Vincentelli, Jim Lansford |
| 1999 | Hardware Compilation for FPGA-Based Configurable Computing Machines. Xiaohan Zhu, Bill Lin |
| 1999 | Hardware Reuse at the Behavioral Level. Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels, Ivo Bolsens |
| 1999 | High-Level Test Generation for Design Verification of Pipelined Microprocessors. David Van Campenhout, Trevor N. Mudge, John P. Hayes |
| 1999 | Hypergraph Partitioning for VLSI CAD: Methodology for Heuristic Development, Experimentation and Reporting. Andrew E. Caldwell, Andrew B. Kahng, Andrew A. Kennings, Igor L. Markov |
| 1999 | Hypergraph Partitioning with Fixed Vertices. Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov |
| 1999 | IC Analyses Including Extracted Inductance Models. Michael W. Beattie, Lawrence T. Pileggi |
| 1999 | IC Test Using the Energy Consumption Ratio. Wanli Jiang, Bapiraju Vinnakota |
| 1999 | ICEBERG: An Embedded In-Circuit Emulator Synthesizer for Microcontrollers. Ing-Jer Huang, Tai-An Lu |
| 1999 | IP-based Design Methodology. Daniel Gajski |
| 1999 | Implementation of a Scalable MPEG-4 Wavelet-Based Visual Texture Compression System. Lode Nachtergaele, Bart Vanhoof, Mercedes Peón, Gauthier Lafruit, Jan Bormans, Ivo Bolsens |
| 1999 | Improved Approximate Reachability Using Auxiliary State Variables. Shankar G. Govindaraju, David L. Dill, Jules P. Bergmann |
| 1999 | Improved Selay Prediction for On-Chip Buses. Real G. Pomerleau, Paul D. Frazon, Griff L. Bilbro |
| 1999 | Improving Symbolic Traversals by Means of Activity Profiles. Gianpiero Cabodi, Paolo Camurati, Stefano Quer |
| 1999 | Improving the Test Quality for Scan-Based BIST Using a General Test Application Scheme. Huan-Chih Tsai, Kwang-Ting Cheng, Sudipta Bhawmik |
| 1999 | Interconnect Analysis: From 3-D Structures to Circuit Models. Mattan Kamon, Nuno Alexandre Marques, Yehia Massoud, Luís Miguel Silveira, Jacob White |
| 1999 | Interconnect Estimation and Dlanning for Deep Submicron Designs. Jason Cong, David Zhigang Pan |
| 1999 | Java Driven Codesign and Prototyping of Networked Embedded Systems. Josef Fleischmann, Klaus Buchenrieder, Rainer Kress |
| 1999 | Kernel-Based Power Optimization of RTL Components: Exact and Approximate Extraction Algorithms. Luca Benini, Giovanni De Micheli, Enrico Macii, Giuseppe Odasso, Massimo Poncino |
| 1999 | LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures. Stefan Pees, Andreas Hoffmann, Vojin Zivojnovic, Heinrich Meyr |
| 1999 | Layout Techniques Supporting the Use of Dual Supply Voltages for Cell-based Designs. Ching-Wei Yeh, Yin-Shuin Kang, Shan-Jih Shieh, Jinn-Shyan Wang |
| 1999 | Leakage Control with Efficient Use of Transistor Stacks in Single Threshold CMOS. Mark C. Johnson, Dinesh Somasekhar, Kaushik Roy |
| 1999 | Low-Power Behavioral Synthesis Optimization Using Multiple Precision Arithmetic. Milos D. Ercegovac, Darko Kirovski, Miodrag Potkonjak |
| 1999 | Lowering Power Consumption in Clock by Using Globally Asynchronous Locally Synchronous Design Style. Ahmed Hemani, Thomas Meincke, Shashi Kumar, Adam Postula, Thomas Olsson, Peter Nilsson, Johnny Öberg, Peeter Ellervee, Dan Lundqvist |
| 1999 | MAELSTROM: Efficient Simulation-Based Synthesis for Custom Analog Cells. Michael Krasnicki, Rodney Phelps, Rob A. Rutenbar, L. Richard Carley |
| 1999 | MEMS CAD Beyond Multi-Million Transistors (Panel). Kristofer S. J. Pister, Albert P. Pisano, Nicholas Swart, Mike Horton, John Rychcik, John R. Gilbert, Gerry K. Fedder |
| 1999 | MERLIN: Semi-Order-Independent Hierarchical Buffered Routing Tree Generation Using Local Neighborhood Search. Amir H. Salek, Jinan Lou, Massoud Pedram |
| 1999 | Maximizing Performance by Retiming and Clock Skew Scheduling. Xun Liu, Marios C. Papaefthymiou, Eby G. Friedman |
| 1999 | Memory Exploration for Low Power, Embedded Systems. Wen-Tsong Shiue, Chaitali Chakrabarti |
| 1999 | Micro Architecture Coverage Directed Generation of Test Programs. Shmuel Ur, Yaov Yadin |
| 1999 | Microprocessor Based Testing for Core-Based System on Chip. Christos A. Papachristou, F. Martin, Mehrdad Nourani |
| 1999 | Mixed- Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye, Vivek De |
| 1999 | Model Order-Reduction of RC(L) Interconnect Including Variational Analysis. Ying Liu, Lawrence T. Pileggi, Andrzej J. Strojwas |
| 1999 | Model-Reduction of Nonlinear Circuits Using Krylov-Space Techniques. Pavan K. Gunupudi, Michel S. Nakhla |
| 1999 | Module Placement for Analog Layout Using the Sequence-Pair Representation. Florin Balasa, Koen Lampaert |
| 1999 | Multi-Time Simulation of Voltage-Controlled Oscillators. Onuttom Narayan, Jaijeet S. Roychowdhury |
| 1999 | Multilevel George Karypis, Vipin Kumar |
| 1999 | Multiple Error Diagnosis Based on Xlists. Vamsi Boppana, Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita, Pradeep Bollineni |
| 1999 | Noise-Aware Repeater Insertion and Wire-Sizing for On-Chip Interconnect Using Hierarchical Moment-Matching. Chung-Ping Chen, Noel Menezes |
| 1999 | Noise-Constrained Performance Optimization by Simultaneous Gate and Wire Sizing Based on Lagrangian Relaxation. Iris Hui-Ru Jiang, Jing-Yang Jou, Yao-Wen Chang |
| 1999 | On ILP Formulations for Built-In Self-Testable Data Path Synthesis. Han Bin Kim, Dong Sam Ha, Takeshi Takahashi |
| 1999 | On Thermal Effects in Deep Sub-Micron VLSI Interconnects. Kaustav Banerjee, Amit Mehrotra, Alberto L. Sangiovanni-Vincentelli, Chenming Hu |
| 1999 | On-Chip Inductance Issues in Multiconductor Systems. Shannon V. Morton |
| 1999 | Optimization of Inductor Circuits via Geometric Programming. Maria del Mar Hershenson, Sunderarajan S. Mohan, Stephen P. Boyd, Thomas H. Lee |
| 1999 | Optimization-Intensive Watermarking Techniques for Decision Problems. Gang Qu, Jennifer L. Wong, Miodrag Potkonjak |
| 1999 | Panel: Cell Libraries - Build vs. Buy; Static vs. Dynamic. Kurt Keutzer, Kurt Wolf, David Pietromonaco, Jay Maxey, Jeff Lewis, Martin Lefebvre, Jeff Burns |
| 1999 | Panel: What is the Proper System on Chip Design Methodology. Richard Goering, Pierre Bricaud, James G. Dougherty, Steve Glaser, Michael Keating, Robert Payne, Davoud Samani |
| 1999 | Parallel Mixed-Level Power Simulation Based on Spatio-Temporal Circuit Partitioning. Mauro Chinosi, Roberto Zafalon, Carlo Guardiani |
| 1999 | Parametric Representations of Boolean Constraints. Mark D. Aagaard, Robert B. Jones, Carl-Johan H. Seger |
| 1999 | Parasitic Extraction Accuracy - How Much is Enough? Paul D. Franzon, Mark Basel, Aki Fujimara, Sharad Mehrotra, Ron Preston, Robin C. Sarma, Marty Walker |
| 1999 | Passive Reduced-Order Models for Interconnect Simulation and Their Computation via Krylov-Subspace Algorithms. Roland W. Freund |
| 1999 | Performance-Driven Integration of Retiming and Resynthesis. Peichen Pan |
| 1999 | Performance-Driven Scheduling with Bit-Level Chaining. Sanghun Park, Kiyoung Choi |
| 1999 | Power Conscious Fixed Priority Scheduling for Hard Real-Time Systems. Youngsoo Shin, Kiyoung Choi |
| 1999 | Power Efficient Mediaprocessors: Design Space Exploration. Johnson Kin, Chunho Lee, William H. Mangione-Smith, Miodrag Potkonjak |
| 1999 | Practical Advances in Asynchronous Design and in Asynchronous/Synchronous Interfaces. Erik Brunvand, Steven M. Nowick, Kenneth Y. Yun |
| 1999 | Proceedings of the 36th Conference on Design Automation, New Orleans, LA, USA, June 21-25, 1999. Mary Jane Irwin |
| 1999 | Proptest: A Property Based Test Pattern Generator for Sequential Circuits Using Test Compaction. Ruifeng Guo, Sudhakar M. Reddy, Irith Pomeranz |
| 1999 | Rapid Development of Optimized DSP Code from a High Level Description Through Software Estimations. Alain Pegatoquet, Emmanuel Gresset, Michel Auguin, Luc Bianco |
| 1999 | Reconfigurable Computing: What, Why, and Implications for Design Automation. André DeHon, John Wawrzynek |
| 1999 | Reducing Cross-Coupling Among Interconnect Wires in Deep-Submicron Datapath Design. Joon-Seo Yim, Chong-Min Kyung |
| 1999 | Relaxation and Clustering in a Local Search Framework: Application to Linear Placement. Sung-Woo Hur, John Lillis |
| 1999 | Reliability-Constrained Area Optimization of VLSI Power/Ground Networks via Sequence of Linear Programmings. Xiang-Dong Tan, Chuanjin Richard Shi, Dragos Lungeanu, Jyh-Chwen Lee, Li-Pen Yuan |
| 1999 | Representation of Function Variants for Embedded System Optimization and Synthesis. Kai Richter, Dirk Ziegenbein, Rolf Ernst, Lothar Thiele, Jürgen Teich |
| 1999 | Retiming for DSM with Area-Delay Trade-Offs and Delay Constraints. Abdallah Tabbara, Robert K. Brayton, A. Richard Newton |
| 1999 | Robust FPGA Intellectual Property Protection Through Multiple Small Watermarks. John C. Lach, William H. Mangione-Smith, Miodrag Potkonjak |
| 1999 | Robust Rational Function Approximation Algorithm for Model Generation. Carlos P. Coelho, Joel R. Phillips, Luís Miguel Silveira |
| 1999 | Robust Techniques for Watermarking Sequential Circuit Designs. Arlindo L. Oliveira |
| 1999 | SOI Digital CMOS VLSI - a Design Perspective. Ching-Te Chuang, Ruchir Puri |
| 1999 | Simulation Vector Generation from HDL Descriptions for Observability-Enhanced Statement Coverage. Farzan Fallah, Pranav Ashar, Srinivas Devadas |
| 1999 | Simultaneous Circuit Partitioning/Clustering with Retiming for Performance Optimization. Jason Cong, Honching Li, Chang Wu |
| 1999 | Simultaneous Routing and Buffer Insertion with Restrictions on Buffer Locations. Hai Zhou, D. F. Wong, I-Min Liu, Adnan Aziz |
| 1999 | Soft Scheduling in High Level Synthesis. Jianwen Zhu, Daniel Gajski |
| 1999 | Software Environment for a Multiprocessor DSP. Asawaree Kalavade, Joe Othmer, Bryan D. Ackland, Kanwar Jit Singh |
| 1999 | Stand-by Power Minimization Through Simultaneous Threshold Voltage Selection and Circuit Sizing. Supamas Sirichotiyakul, Tim Edwards, Chanhee Oh, Jingyan Zuo, Abhijit Dharchoudhury, Rajendran Panda, David T. Blaauw |
| 1999 | Substrate Modeling and Lumped Substrate Resistance Extraction for CMOS ESD/Latchup Circuit Simulation. Tong Li, Ching-Han Tsai, Elyse Rosenbaum, Sung-Mo Kang |
| 1999 | Subwavelength Lithography and Its Potential Impact on Design and EDA. Andrew B. Kahng, Y. C. Pati |
| 1999 | Subwavelength Lithography: How Will It Affect Your Design Flow? (Panel). Andrew B. Kahng, Y. C. Pati, Warren Grobman, Robert Pack, Lance A. Glasser |
| 1999 | Symbolic Model Checking Using SAT Procedures instead of BDDs. Armin Biere, Alessandro Cimatti, Edmund M. Clarke, Masahiro Fujita, Yunshan Zhu |
| 1999 | Synthesis of Embedded Software Using Free-Choice Petri Nets. Marco Sgroi, Luciano Lavagno |
| 1999 | Synthesis of Low Power CMOS VLSI Circuits Using Dual Supply Voltages. Vijay Sundararajan, Keshab K. Parhi |
| 1999 | Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses. Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi |
| 1999 | System-Level Hardware/Software Trade-offs. Samuel P. Harbison |
| 1999 | Technology Mapping for FPGAs with Nonuniform Pin Delays and Fast Interconnections. Jason Cong, Yean-Yow Hwang, Songjie Xu |
| 1999 | Test Generation for Gigahertz Processors Using an Automatic Functional Constraint Extractor. Raghuram S. Tupuri, Arun Krishnamachary, Jacob A. Abraham |
| 1999 | The Jini Architecture: Dynamic Services in a Flexible Network. Ken Arnold |
| 1999 | The Simulation and Design of Integrated Inductors. N. R. Belk, Michel R. Frei, M. Tsai, Andrew J. Becker, K. L. Tokuda |
| 1999 | Time-Mapped Harmonic Balance. Ognen J. Nastov, Jacob White |
| 1999 | Using Lower Bounds During Dynamic BDD Minimization. Rolf Drechsler, Wolfgang Günther |
| 1999 | Using Partitioning to Help Convergence in the Standard-Cell Design Automation Methodology. Hema Kapadia, Mark Horowitz |
| 1999 | Verification and Management of a Multimillion-Gate Embedded Core Design. Johann Notbauer, Thomas W. Albrecht, Georg Niedrist, Stefan Rohringer |
| 1999 | Verification of a Microprocessor Using Real World Applications. You-Sung Chang, Seungjong Lee, In-Cheol Park, Chong-Min Kyung |
| 1999 | Verifying Large-Scale Multiprocessors Using an Abstract Verification Environment. Dennis Abts, Mike Roberts |
| 1999 | Vertical Benchmarks for CAD. Christopher Inacio, Herman Schmit, David Nagle, Andrew Ryan, Donald E. Thomas, Yingfai Tong, Ben Klass |
| 1999 | Vex - A CAD Toolbox. Jules P. Bergmann, Mark Horowitz |
| 1999 | Virtual Simulation of Distributed IP-based Designs. Marcello Dalpasso, Alessandro Bogliolo, Luca Benini |
| 1999 | Wave Steering in YADDs: A Novel Non-Iterative Synthesis and Layout Technique. Arindam Mukherjee, Ranganathan Sudhakar, Malgorzata Marek-Sadowska, Stephen I. Long |
| 1999 | Why is ATPG Easy? Mukul R. Prasad, Philip Chong, Kurt Keutzer |
| 1999 | ipChinook: an Integrated IP-based Design Framework for Distributed Embedded Systems. Pai H. Chou, Ross B. Ortega, Ken Hines, Kurt Partridge, Gaetano Borriello |