DAC A*

155 papers

YearTitle / Authors
1998A BIST Scheme for RTL Controller-Data Paths Based on Symbolic Testability Analysis.
Indradeep Ghosh, Niraj K. Jha, Sudipta Bhawmik
1998A Case Study in Embedded System Design: An Engine Control Unit.
Tullio Cuatto, Claudio Passerone, Luciano Lavagno, Attila Jurecska, Antonino Damiano, Claudio Sansoè, Alberto L. Sangiovanni-Vincentelli
1998A DSM Design Flow: Putting Floorplanning, Technology-Napping, and Gate-Placement Together.
Amir H. Salek, Jinan Lou, Massoud Pedram
1998A Decision Procedure for Bit-Vector Arithmetic.
Clark W. Barrett, David L. Dill, Jeremy R. Levitt
1998A Fast Fanout Optimization Algorithm for Near-Continuous Buffer Libraries.
David S. Kung
1998A Fast Hierarchical Algorithm for 3-D Capacitance Extraction.
Weiping Shi, Jianguo Liu, Naveen Kakani, Tiejun Yu
1998A Fast Sequential Learning Technique for Real Circuits with Application to Enhancing ATPG Performance.
Aiman H. El-Maleh, Mark Kassab, Janusz Rajski
1998A Fast and Low Cost Testing Technique for Core-Based System-on-Chip.
Indradeep Ghosh, Sujit Dey, Niraj K. Jha
1998A Framework for Estimation and Minimizing Energy Dissipation of Embedded HW/SW Systems.
Yanbing Li, Jörg Henkel
1998A Geographically Distributed Framework for Embedded System Design and Validation.
Ken Hines, Gaetano Borriello
1998A Methodology for Guided Behavioral-Level Optimization.
Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey
1998A Mixed Nodal-Mesh Formulation for Efficient Extraction and Passive Reduced-Order Modeling of 3D Interconnects.
Nuno Alexandre Marques, Mattan Kamon, Jacob White, Luís Miguel Silveira
1998A Multiprocessor DSP System Using PADDI-2.
Roy A. Sutton, Vason P. Srini, Jan M. Rabaey
1998A Power Macromodeling Technique Based on Power Sensitivity.
Zhanping Chen, Kaushik Roy
1998A Practical Approach to Static Signal Electromigration Analysis.
N. S. Nagaraj, Frank Cano, Haldun Haznedar, Duane Young
1998A Practical Repeater Insertion Method in High Speed VLSI Circuits.
Julian Culetu, Chaim Amir, John Macdonald
1998A Programming Environment for the Design of Complex High Speed ASICs.
Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens
1998A Re-engineering Approach to Low Power FPGA Design Using SPFD.
Jan-Min Hwang, Feng-Yi Chiang, TingTing Hwang
1998A Reconfigurable Logic Machine for Fast Event-Driven Simulation.
Jerry Bauer, Michael Bershteyn, Ian Kaplan, Paul Vyedin
1998A Statistical Performance Simulation Methodology for VLSI Circuits.
Michael Orshansky, James C. Chen, Chenming Hu
1998A Tool for Performance Estimation of Networked Embedded End-systems.
Asawaree Kalavade, Pratyush Moghé
1998A Top-Down Design Environment for Developing Pipelined Datapaths.
Robert M. McGraw, James H. Aylor, Robert H. Klenke
1998A Video Signal Processor for MIMD Multiprocessing.
Jörg Hilgenstock, Klaus Herrmann, Jan Otterstedt, Dirk Niggemeyer, Peter Pirsch
1998Adjoint Transient Sensitivity Computation in Piecewise Linear Simulation.
Tuyen V. Nguyen, Anirudh Devgan, Ognen J. Nastov
1998An Implicit Algorithm for Finding Steady States and its Application to FSM Verification.
Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee
1998An Optimization-Based Error Calculation for Statistical Power Estimation of CMOS Logic Circuits.
Byunggyu Kwak, Eun Sei Park
1998Approximate Reachability with BDDs Using Overlapping Projections.
Shankar G. Govindaraju, David L. Dill, Alan J. Hu, Mark Horowitz
1998Approximation and Decomposition of Binary Decision Diagrams.
Kavita Ravi, Kenneth L. McMillan, Thomas R. Shiple, Fabio Somenzi
1998Arithmetic Optimization Using Carry-Save-Adders.
Taewhan Kim, William Jao, Steven W. K. Tjiang
1998Asynchronous Interface Specification, Analysis and Synthesis.
Michael Kishinevsky, Jordi Cortadella, Alex Kondratyev
1998Automated Composition of Hardware Components.
James Smith, Giovanni De Micheli
1998Automatic Generation of Assertions for Formal Verification of PowerPC Microprocessor Arrays Using Symbolic Trajectory Evaluation.
Li-C. Wang, Magdy S. Abadir, Nari Krishnamurthy
1998Automatic Synthesis of Interfaces Between Incompatible Protocols.
Roberto Passerone, James A. Rowson, Alberto L. Sangiovanni-Vincentelli
1998Boolean Matching for Large Libraries.
Uwe Hinsberger, Reiner Kolla
1998Boundary Element Method Macromodels for 2-D Hierachical Capacitance Extraction.
E. Aykut Dengi, Ronald A. Rohrer
1998Buffer Insertion for Noise and Delay Optimization.
Charles J. Alpert, Anirudh Devgan, Stephen T. Quay
1998Code Compression for Embedded Systems.
Haris Lekatsas, Wayne H. Wolf
1998Combining Theorem Proving and Trajectory Evaluation in an Industrial Environment.
Mark D. Aagaard, Robert B. Jones, Carl-Johan H. Seger
1998Compatible Class Encoding in Hyper-Function Decomposition for FPGA Synthesis.
Jie-Hong Roland Jiang, Jing-Yang Jou, Juinn-Dar Huang
1998Computational Kernels and their Application to Sequential Power Optimization.
Luca Benini, Giovanni De Micheli, Antonio Lioy, Enrico Macii, Giuseppe Odasso, Massimo Poncino
1998Congestion Driven Quadratic Placement.
Phiroze N. Parakh, Richard B. Brown, Karem A. Sakallah
1998Customers, Vendors, and Universities: Determining the Future of EDA Together (Panel).
Thomas Pennino
1998Data Security for Web-based CAD.
Scott Hauck, Stephen Knol
1998Delay Estimation VLSI Circuits from a High-Level View.
Mahadevamurty Nemani, Farid N. Najm
1998Delay-Optimal Technology Mapping by DAG Covering.
Yuji Kukimoto, Robert K. Brayton, Prashant Sawkar
1998Delay-Optimal Technology Mapping for FPGAs with Heterogeneous LUTs.
Jason Cong, Songjie Xu
1998Design Methodologies for Noise in Digital Integrated Circuits.
Kenneth L. Shepard
1998Design Methodology Used in a Single-Chip CMOS 900 MHz Spread-Spectrum Wireless Transceiver.
Jacob J. Rael, Ahmadreza Rofougaran, Asad A. Abidi
1998Design Methodology of Ultra Low-Power MPEG4 Codec Core Exploiting Voltage Scaling Techniques.
Kimiyoshi Usami, Mutsunori Igarashi, Takashi Ishikawa, Masahiro Kanazawa, Masafumi Takahashi, Mototsugu Hamada, Hideho Arakida, Toshihiro Terazawa, Tadahiro Kuroda
1998Design Methodology of a 200MHz Superscalar Microprocessor: SH-4.
Toshihiro Hattori, Yusuke Nitta, Mitsuho Seki, Susumu Narita, Kunio Uchiyama, Tsuyoshi Takahashi, Ryuichi Satomura
1998Design Productivity: How To Measure It, How To Improve It (Panel).
Carlos Dangelo
1998Design Reliability - Estimation through Statistical Analysis of Bug Discovery Data.
Yossi Malka, Avi Ziv
1998Design Space Exploration Algorithm for Heterogeneous Multi-Processor Embedded System Design.
Ireneusz Karkowski, Henk Corporaal
1998Design and Analysis of Power Distribution Networks in PowerPC Microprocessors.
Abhijit Dharchoudhury, Rajendran Panda, David T. Blaauw, Ravi Vaidyanathan, Bogdan Tutuianu, David Bearden
1998Design and Implementation of the NUMAchine Multiprocessor.
A. Grbic, Stephen Brown, S. Caranci, R. Grindley, M. Gusat, Guy G. Lemieux, K. Loveless, Naraig Manjikian, Sinisa Srbljic, Michael Stumm, Zvonko G. Vranesic, Zeljko Zilic
1998Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits.
Liqiong Wei, Zhanping Chen, Mark Johnson, Kaushik Roy, Vivek De
1998Design and Specification of Embedded Systems in Java Using Successive, Formal Refinement.
James Shin Young, Josh MacDonald, Michael Shilman, Abdallah Tabbara, Paul N. Hilfinger, A. Richard Newton
1998Design of a SPDIF Receiver Using Protocol Compiler.
Ulrich Holtmann, Peter Blinzer
1998Digital System Simulation: Methodologies and Examples.
Kunle Olukotun, Mark A. Heinrich, David Ofelt
1998Don't Care-Based BDD Minimization for Embedded Software.
Youpyo Hong, Peter A. Beerel, Luciano Lavagno, Ellen Sentovich
1998Efficient Analog Test Methodology Based on Adaptive Algorithms.
Luigi Carro, Marcelo Negreiros
1998Efficient Boolean Division and Substitution.
Shih-Chieh Chang, David Ihsin Cheng
1998Efficient Coloring of a Large Spectrum of Graphs.
Darko Kirovski, Miodrag Potkonjak
1998Efficient State Classification of Finite State Markov Chains.
Aiguo Xie, Peter A. Beerel
1998Efficient System Exploration and Synthesis of Applications with Dynamic Data Storage and Intensive Data Transfer.
Julio Leao da Silva Jr., Chantal Ykman-Couvreur, Miguel Miranda, Kris Croes, Sven Wuytack, Gjalt G. de Jong, Francky Catthoor, Diederik Verkest, Paul Six, Hugo De Man
1998Efficient Three-Dimensional Extraction Based on Static and Full-Wave Layered Green's Functions.
Jinsong Zhao, Wayne Wei-Ming Dai, Sharad Kapur, David E. Long
1998Electromagnetic Modeling and Signal Integrity Simulation of Power/Ground Networks in High Speed Digital Packages and Printed Circuit Boards.
Frank Y. Yuan
1998Enhanced Visibility and Performance in Functional Verification by Reconstruction.
Joshua Marantz
1998Exact Tree-based FPGA Technology Mapping for Logic Blocks with Independent LUTs.
Madhukar R. Korupolu, K. K. Lee, D. F. Wong
1998Extending Moment Computation to 2-Port Circuit Representations.
Fang-Jou Liu, Chung-Kuan Cheng
1998Fast Exact Minimization of BDDs.
Rolf Drechsler, Nicole Drechsler, Wolfgang Günther
1998Fast State Verification.
Dechang Sun, Bapiraju Vinnakota, Wanli Jiang
1998Fault-Simulation Based Design Error Diagnosis for Sequential Circuits.
Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Juin-Yeu Joseph Lu
1998Figures of Merit to Characterize the Importance of On-Chip Inductance.
Yehea I. Ismail, Eby G. Friedman, José Luis Neves
1998Finite State Machine Decomposition For Low Power.
José C. Monteiro, Arlindo L. Oliveira
1998Framework Encapsulations: A New Approach to CAD Tool Interoperability.
Peter R. Sutton, Stephen W. Director
1998Full-Chip Verification Methods for DSM Power Distribution Systems.
Gregory Steele, David Overhauser, Steffen Rochel, Syed Zakir Hussain
1998Functional Vector Generation for HDL Models Using Linear Programming and 3-Satisfiability.
Farzan Fallah, Srinivas Devadas, Kurt Keutzer
1998Functional Verification of Large ASICs.
Adrian Evans, Allan Silburt, Gary Vrckovnik, Thane Brown, Mario Dufresne, Geoffrey Hall, Tung Ho, Ying Liu
1998Functional Verification of a Multiple-issue, Out-of-Order, Superscalar Alpha Processor - The DEC Alpha 21264 Microprocessor.
Scott A. Taylor, Michael Quinn, Darren Brown, Nathan Dohm, Scot Hildebrandt, James Huggins, Carl Ramey
1998General AC Constraint Transformation for Analog ICs.
Bogdan G. Arsintescu, Edoardo Charbon, Enrico Malavasi, Umakanta Choudhury, William H. Kao
1998Generic Global Placement and Floorplanning.
Hans Eisenmann, Frank M. Johannes
1998Global Routing with Crosstalk Constraints.
Hai Zhou, D. F. Wong
1998HW/SW CoVerification Performance Estimation and Benchmark for a 24 Embedded RISC Core Design.
Thomas W. Albrecht, Johann Notbauer, Stefan Rohringer
1998Hardware/Software Co-Design: The Next Embedded System Design Challenge (Panel).
Peter Heller
1998Hierarchical Algorithms for Assessing Probabilistic Constraints on System Performance.
Gustavo de Veciana, Margarida F. Jacome, Jian-Huei Guo
1998Hierarchical Functional Timing Analysis.
Yuji Kukimoto, Robert K. Brayton
1998How Much Analog Does a Designer Need to Know for Successful Mixed-Signal Design? (Panel).
Stephan Ohr
1998Hybrid Techniques for Fast Functional Simulation.
Yufeng Luo, Tjahjadi Wongsonegoro, Adnan Aziz
1998Hybrid Verification Using Saturated Simulation.
Adnan Aziz, James H. Kukula, Thomas R. Shiple
1998In-Place Power Optimization for LUT-Based FPGAs.
Balakrishna Kumthekar, Luca Benini, Enrico Macii, Fabio Somenzi
1998Incorporating Speculative Execution into Scheduling of Control-Flow Intensive Behavioral Descriptions.
Ganesh Lakshminarayana, Anand Raghunathan, Niraj K. Jha
1998Incremental CTL Model Checking Using BDD Subsetting.
Abelardo Pardo, Gary D. Hachtel
1998Instruction Selection, Resource Allocation, and Scheduling in the AVIV Retargetable Code Generator.
Silvina Hanono, Srinivas Devadas
1998Introducing Redundant Computations in a Behavior for Reducing BIST Resources.
Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer
1998Layout Based Frequency Dependent Inductance and Resistance Extraction for On-Chip Interconnect Timing Analysis.
Byron Krauter, Sharad Mehrotra
1998Layout Extraction and Verification Methodology CMOS I/O Circuits.
Tong Li, Sung-Mo Kang
1998Layout Techniques for Minimizing On-Chip Interconnect Self Inductance.
Yehia Massoud, Steve S. Majors, Tareq Bustami, Jacob K. White
1998M32: A Constructive multilevel Logic Synthesis System.
Victor N. Kravets, Karem A. Sakallah
1998MTCMOS Hierarchical Sizing Based on Mutual Exclusive Discharge Patterns.
James T. Kao, Siva G. Narendra, Anantha P. Chandrakasan
1998Making Complex Timing Relationships Readable: Presburger Formula Simplicication Using Don't Cares.
Tod Amon, Gaetano Borriello, Jiwen Liu
1998Maximum Power Estimation Using the Limiting Distributions of Extreme Order Statistics.
Qinru Qiu, Qing Wu, Massoud Pedram
1998Media Architecture: General Purpose vs. Multiple Application-Specific Programmable Processor.
Chunho Lee, Johnson Kin, Miodrag Potkonjak, William H. Mangione-Smith
1998MetaCore: An Application Specific DSP Development System.
Jin-Hyuk Yang, Byoung-Woon Kim, Sang-Jun Nam, Jang-Ho Cho, Sung-Won Seo, Chang-Ho Ryu, Young-Su Kwon, Dae-Hyun Lee, Jong-Yeol Lee, Jong-Sun Kim, Hyun-Dhong Yoon, Jae-Yeol Kim, Kun-Moo Lee, Chan-Soo Hwang, In-Hyung Kim, Jun Sung Kim, Kwang-Il Park, Kyu Ho Park, Yong Hoon Lee, Seung Ho Hwang, In-Cheol Park, Chong-Min Kyung
1998Migration: A New Technique to Improve Synthesized Designs Through Incremental Customization.
Rajendran Panda, Abhijit Dharchoudhury, Tim Edwards, Joe Norton, David T. Blaauw
1998Modal Processes: Towards Enhanced Retargetability Through Control Composition of Distributed Embedded Systems.
Pai H. Chou, Gaetano Borriello
1998Multi-Pad Power/Ground Network Design for Uniform Distribution of Ground Bounce.
Jaewon Oh, Massoud Pedram
1998Multilevel Integral Equation Methods for the Extraction of Substrate Coupling Parameters in Mixed-Signal IC's.
Mike Chou, Jacob White
1998OCCOM: Efficient Computation of Observability-Based Code Coverage Metrics for Functional Verification.
Farzan Fallah, Srinivas Devadas, Kurt Keutzer
1998Optimal FPGA Mapping and Retiming with Efficient Initial State Computation.
Jason Cong, Chang Wu
1998PRIMO: Probability Interpretation of Moments for Delay Calculation.
Rony Kay, Lawrence T. Pileggi
1998Parallel Algorithms for Power Estimation.
Victor Kim, Prithviraj Banerjee
1998Partitioning and Optimizing Controllers Synthesized from Hierarchical High-Level Descriptions.
Andrew Seawright, Wolfgang Meyer
1998Performance Driven Multi-Layer General Area Routing for PCB/MCM Designs.
Jason Cong, Patrick H. Madden
1998Performance-Driven Multi-FPGA Partitioning Using Functional Clustering and Replication.
Wen-Jong Fang, Allen C.-H. Wu
1998Phase Noise in Oscillators: A Unifying Theory and Numerical Methods for Characterisation.
Alper Demir, Amit Mehrotra, Jaijeet S. Roychowdhury
1998Planning for Performance.
Ralph H. J. M. Otten, Robert K. Brayton
1998Policy Optimization for Dynamic Power Management.
Giuseppe A. Paleologo, Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
1998Potential-NRG: Placement with Incomplete Data.
Maogang Wang, Prithviraj Banerjee, Majid Sarrafzadeh
1998Power Considerations in the Design of the Alpha 21264 Microprocessor.
Michael K. Gowan, Larry L. Biro, Daniel B. Jackson
1998Power Optimization of Variable Voltage Core-Based Systems.
Inki Hong, Darko Kirovski, Gang Qu, Miodrag Potkonjak, Mani B. Srivastava
1998Practical Experiences with Standard-Cell Based Datapath Design Tools: Do We Really Need Regular Layouts?
Paolo Ienne, Alexander Grießing
1998Proceedings of the 35th Conference on Design Automation, Moscone center, San Francico, California, USA, June 15-19, 1998.
Basant R. Chawla, Randal E. Bryant, Jan M. Rabaey
1998Process Multi-Circuit Optimization.
Arun N. Lokanathan, Jay B. Brockman
1998RF IC Design Challenges.
Behzad Razavi
1998Rate Derivation and Its Applications to Reactive, Real-Time Embedded Systems.
Ali Dasdan, Dinesh Ramanathan, Rajesh K. Gupta
1998Rate Optimal VLSI Design from Data Flow Graph.
Moonwook Oh, Soonhoi Ha
1998Realization of a Programmable Parallel DSP for High Performance Image Processing Applications.
Jens Peter Wittenburg, Willm Hinrichs, Johannes Kneip, Martin Ohmacht, Mladen Berekovic, Hanno Lieske, Helge Kloos, Peter Pirsch
1998Reducing Power in High-Performance Microprocessors.
Vivek Tiwari, Deo Singh, Suresh Rajgopal, Gaurav Mehta, Rakesh Patel, Franklin Baez
1998Robust Elmore Delay Models Suitable for Full Chip Timing Verification of a 600MHz CMOS Microprocessor.
Nevine Nassif, Madhav P. Desai, Dale H. Hall
1998Robust IP Watermarking Methodologies for Physical Design.
Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe
1998Software Synthesis of Process-Based Concurrent Programs.
Bill Lin
1998Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions.
Ganesh Lakshminarayana, Niraj K. Jha
1998System Chip Test Challenges, Are There Solutions Today? (Panel).
Prab Varma
1998System-Chip Test Strategies (Tutorial).
Yervant Zorian
1998System-level exploration with SpecSyn.
Daniel Gajski, Frank Vahid, Sanjiv Narayan, Jie Gong
1998TETA: Transistor-Level Engine for Timing Analysis.
Florentin Dartu, Lawrence T. Pileggi
1998Table-Lookup Methods for Improved Performance-Driven Routing.
John Lillis, Premal Buch
1998Taming Noise in Deep Submicron Digital Integrated Circuits (Panel).
N. S. Nagaraj, Kenneth L. Shepard, Takahide Inone
1998Technical Challenges of IP and System-on-Chip: The ASIC Vendor Perspective (Panel).
A. Richard Newton
1998Technology Mapping for Large Complex PLDs.
Jason Helge Anderson, Stephen Dean Brown
1998The DT-Model: High-Level Synthesis Using Data Transfers.
Shantanu Tarafdar, Miriam Leeser
1998The EDA Start-up Experience: The First Product (Panel).
Erach Desai
1998Timing and Crosstalk Driven Area Routing.
Hsiao-Ping Tseng, Louis Scheffer, Carl Sechen
1998Tools and Methodology for RF IC Design.
Al Dunlop, Alper Demir, Peter Feldmann, Sharad Kapur, David E. Long, Robert C. Melville, Jaijeet S. Roychowdhury
1998User Defined Coverage - A Tool Supported Methodology for Design Verification.
Raanan Grinwald, Eran Harel, Michael Orgad, Shmuel Ur, Avi Ziv
1998User Experience with High Level Formal Verification (Panel).
Randal E. Bryant, Gerry Musgrave
1998Using Complementation and Resequencing to Minimize Transitions.
Rajeev Murgai, Masahiro Fujita, Arlindo L. Oliveira
1998Using Reconfigurable Computing Techniques to Accelerate Problems in the CAD Domain: A Case Study with Boolean Satisfiability.
Peixin Zhong, Pranav Ashar, Sharad Malik, Margaret Martonosi
1998Validation of an Architectural Level Power Analysis Technique.
Rita Yu Chen, Robert Michael Owens, Mary Jane Irwin, Raminder Singh Bajwa
1998Validation with Guided Search of the State Space.
C. Han Yang, David L. Dill
1998Virtual Chip: Making Functional Models Work on Real Target Systems.
Namseung Kim, Hoon Choi, Seungjong Lee, Seungwang Lee, In-Cheol Park, Chong-Min Kyung
1998WELD - An Environment for Web-based Electronic Design.
Francis L. Chan, Mark D. Spiller, A. Richard Newton
1998Watermarking Techniques for Intellectual Property Protection.
Andrew B. Kahng, John C. Lach, William H. Mangione-Smith, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe
1998What's Between Simulation and Formal Verification? (Extended Abstract).
David L. Dill