| 1997 | A C-Based RTL Design Verification Methodology for Complex Microprocessor. Joon-Seo Yim, Yoon-Ho Hwang, Chang-Jae Park, Hoon Choi, Woo-Seung Yang, Hun-Seung Oh, In-Cheol Park, Chong-Min Kyung |
| 1997 | A Dynamic Design Estimation and Exploration Environment. Ole Bentz, Jan M. Rabaey, David Lidsky |
| 1997 | A Fast And Accurate Technique To Optimize Characterization Tables For Logic Synthesis. John F. Croix, D. F. Wong |
| 1997 | A Fast Method of Moments Solver for Efficient Parameter Extraction of MCMs. Sharad Kapur, Jinsong Zhao |
| 1997 | A Graph-Based Synthesis Algorithm for AND/XOR Networks. Yibin Ye, Kaushik Roy |
| 1997 | A Hardware/Software Partitioner Using a Dynamically Determined Granularity. Jörg Henkel, Rolf Ernst |
| 1997 | A Hierarchy-Driven FPGA Partitioning Method. Helena Krupnova, Ali Abbara, Gabriele Saucier |
| 1997 | A Hybrid Algorithm for Test Point Selection for Scan-Based BIST. Huan-Chih Tsai, Kwang-Ting Cheng, Chih-Jen Lin, Sudipta Bhawmik |
| 1997 | A Network Flow Approach for Hierarchical Tree Partitioning. Ming-Ter Kuo, Chung-Kuan Cheng |
| 1997 | A Parallel/Serial Trade-Off Methodology for Look-Up Table Based Decoders. Claus Schneider |
| 1997 | A Power Estimation Framework for Designing Low Power Portable Video Applications. Chi-Ying Tsui, Kai-Keung Chan, Qing Wu, Chih-Shun Ding, Massoud Pedram |
| 1997 | A Real-Time RTL Engineering-Change Method Supporting On-Line Debugging for Logic-Emulation Applications. Wen-Jong Fang, Allen C.-H. Wu, Ti-Yen Yen |
| 1997 | A Scheme for Integrated Controller-Datapath Fault Testing. Mehrdad Nourani, Joan Carletta, Christos A. Papachristou |
| 1997 | A Task-Level Hierarchical Memory Model for System Synthesis of Multiprocessors. Yanbing Li, Wayne H. Wolf |
| 1997 | A Test Synthesis Approach to Reducing BALLAST DFT Overhead. Douglas Chang, Mike Tien-Chien Lee, Malgorzata Marek-Sadowska, Takashi Aikyo, Kwang-Ting Cheng |
| 1997 | ATPG for Heat Dissipation Minimization During Scan Testing. Seongmoon Wang, Sandeep K. Gupta |
| 1997 | Accurate and Efficient Macromodel of Submicron Digital Standard Cells. Cristiano Forzan, Bruno Franzini, Carlo Guardiani |
| 1997 | Algorithms for Coupled Domain MEMS Simulation. Narayan R. Aluru, James White |
| 1997 | Algorithms for Large-Scale Flat Placement. Jens Vygen |
| 1997 | Am Embedded System Case Study: The Firm Ware Development Environment for a Multimedia Audio Processor. Clifford Liem, Marco Cornero, Miguel Santana, Pierre G. Paulin, Ahmed Amine Jerraya, Jean-Marc Gentit, Jean Lopez, Xavier Figari, Laurent Bergher |
| 1997 | An Efficient Approach to Multi-Layer Layer Assignment with Application to Via Minimization. Chin-Chih Chang, Jason Cong |
| 1997 | An Efficient Assertion Checker for Combinational Properties. Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee |
| 1997 | An Efficient Implementation of Reactivity for Modeling Hardware in the Scenic Design Environment. Stan Y. Liao, Steven W. K. Tjiang, Rajesh K. Gupta |
| 1997 | An Efficient Transistor Folding Algorithm for Row-Based CMOS Layout Design. Jaewon Kim, Sung-Mo Kang |
| 1997 | An Improved Algorithm for Minimum-Area Retiming. Naresh Maheshwari, Sachin S. Sapatnekar |
| 1997 | An Integrated Design Environment for Performance and Dependability Analysis. Robert H. Klenke, Moshe Meyassed, James H. Aylor, Barry W. Johnson, Ramesh Rao, Anup Ghosh |
| 1997 | An Investigation of Power Delay Trade-Offs on PowerPC Circuits. Qi Wang, Sarma B. K. Vrudhula, Shantanu Ganguly |
| 1997 | Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures. Ashok Sudarsanam, Stan Y. Liao, Srinivas Devadas |
| 1997 | Analysis and Justification of a Simple, Practical 2 1/2-D Capacitance Extraction Methodology. Jason Cong, Lei He, Andrew B. Kahng, David Noice, Nagesh Shirali, Steve H.-C. Yen |
| 1997 | Analytical Estimation of Transition Activity From Word-Level Signal Statistics. Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj |
| 1997 | Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT. Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha P. Chandrakasan |
| 1997 | Automatic Generation of Synchronous Test Patterns for Asynchronous Circuits. Oriol Roig, Jordi Cortadella, Marco A. Peña, Enric Pastor |
| 1997 | Bounds for BEM Capacitance Extraction. Michael W. Beattie, Lawrence T. Pileggi |
| 1997 | CAD and Foundries for Microsystems. Jean-Michel Karam, Bernard Courtois, Hicham Boutamine, Paul Drake, András Poppe, Vladimír Székely, Márta Rencz, Klaus Hofmann, Manfred Glesner |
| 1997 | CAD at the Design-Manufacturing Interface. Hans T. Heineken, Jitendra Khare, Wojciech Maly, Pranab K. Nag, Charles H. Ouyang, Witold A. Pleskacz |
| 1997 | CELLERITY: A Fully Automatic Layout Synthesis System for Standard Cell Libraries. Mohankumar Guruswamy, Robert L. Maziasz, Daniel Dulitz, Srilata Raman, Venkat Chiluvuri, Andrea Fernández, Larry G. Jones |
| 1997 | CLIP: An Optimizing Layout Generator for Two-Dimensional CMOS Cells. Avaneendra Gupta, John P. Hayes |
| 1997 | COSYN: Hardware-Software Co-Synthesis of Embedded Systems. Bharat P. Dave, Ganesh Lakshminarayana, Niraj K. Jha |
| 1997 | Calculating Worst-Case Gate Delays Due to Dominant Capacitance Coupling. Florentin Dartu, Lawrence T. Pileggi |
| 1997 | Chip Parasitic Extraction and Signal Integrity Verification (Extended Abstract). Wayne Wei-Ming Dai |
| 1997 | Cluster Refinement for Block Placement. Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng |
| 1997 | Code Generation for Core Processors. Peter Marwedel |
| 1997 | Computer-Aided Design of Free-Space Opto-Electronic Systems. Steven P. Levitan, Philippe J. Marchand, Timothy P. Kurzweg, M. A. Rempel, Donald M. Chiarulli, C. Fan, F. B. McCormick |
| 1997 | Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets. Marleen Adé, Rudy Lauwereins, J. A. Peperstraete |
| 1997 | Data-Flow Assisted Behavioral Partitioning for Embedded Systems. Samir Agrawal, Rajesh K. Gupta |
| 1997 | Design and Synthesis of Array Structured Telecommunication Processing Applications. Wolfgang Meyer, Andrew Seawright, Fumiya Tada |
| 1997 | Designing High Performance CMOS Microprocessors Using Full Custom Techniques. William J. Grundmann, Dan Dobberpuhl, Randy L. Allmon, Nicholas L. Rethman |
| 1997 | Developing a Concurrent Methodology for Standard-Cell Library Generation. Donald G. Baltus, Thomas Varga, Robert C. Armstrong, John Duh, T. G. Matheson |
| 1997 | Device-Circuit Optimization for Minimal Energy and Power Consumption in CMOS Random Logic Networks. Pankaj Pant, Vivek De, Abhijit Chatterjee |
| 1997 | Disjunctive Partitioning and Partial Iterative Squaring: An Effective Approach for Symbolic Traversal of Large Circuits. Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer |
| 1997 | Dynamic Communication Models in Embedded System Co-Simulation. Ken Hines, Gaetano Borriello |
| 1997 | Education for the Deep Submicron Age: Business as Usual? Hugo De Man |
| 1997 | Efficient Latch Optimization Using Exclusive Sets. Ellen Sentovich, Horia Toma, Gérard Berry |
| 1997 | Efficient Methods for Simulating Highly Nonlinear Multi-Rate Circuits. Jaijeet S. Roychowdhury |
| 1997 | Efficient Testing of Clock Regenerator Circuits in Scan Designs. Rajesh Raina, Robert Bailey, Charles Njinda, Robert F. Molyneaux, Charlie Beh |
| 1997 | Electronic Component Information Exchange (ECIX). Donald R. Cottrell |
| 1997 | Equivalence Checking Using Cuts and Heaps. Andreas Kuehlmann, Florian Krohm |
| 1997 | Exact Coloring of Real-Life Graphs is Easy. Olivier Coudert |
| 1997 | Exact Required Time Analysis via False Path Detection. Yuji Kukimoto, Robert K. Brayton |
| 1997 | Executable Workflows: A Paradigm for Collaborative Design on the Internet. Hemang Lavana, Amit Khetawat, Franc Brglez, Krzysztof Kozminski |
| 1997 | FPGA Synthesis with Retiming and Pipelining for Clock Period Minimization of Sequential Circuits. Jason Cong, Chang Wu |
| 1997 | Fast Hardware/Software Co-Simulation for Virtual Prototyping and Trade-Off Analysis. Claudio Passerone, Luciano Lavagno, Massimiliano Chiodo, Alberto L. Sangiovanni-Vincentelli |
| 1997 | Fault Simulation under the Multiple Observation Time Approach using Backward Implications. Irith Pomeranz, Sudhakar M. Reddy |
| 1997 | Formal Verification in a Commercial Setting. Robert P. Kurshan |
| 1997 | Formal Verification of Content Addressable Memories Using Symbolic Trajectory Evaluation. Manish Pandey, Richard Raimi, Randal E. Bryant, Magdy S. Abadir |
| 1997 | Formal Verification of FIRE: A Case Study. Jae-Young Jang, Shaz Qadeer, Matt Kaufmann, Carl Pixley |
| 1997 | Formal Verification of a Superscalar Execution Unit. Kyle L. Nelson, Alok Jain, Randal E. Bryant |
| 1997 | Frequency-Domain Compatibility in Digital Filter BIST. Laurence Goodby, Alex Orailoglu |
| 1997 | Generation of Software Tools from Processor Descriptions for Hardware/Software Codesign. Mark R. Hartoog, James A. Rowson, Prakash D. Reddy, Soumya Desai, Douglas D. Dunlop, Edwin A. Harcourt, Neeti Khullar |
| 1997 | Hardware/Software Co-Simulation in a VHDL-Based Test Bench Approach. Matthias Bauer, Wolfgang Ecker |
| 1997 | Hardware/Software Partitioning and Pipelining. Smita Bakshi, Daniel Gajski |
| 1997 | Hierarchical 2-D Field Solution for Capacitance Extraction for VLSI Interconnect Modeling. E. Aykut Dengi, Ronald A. Rohrer |
| 1997 | Hierarchical Random Simulation Approach for the Verification of S/390 CMOS Multiprocessors. Jörg A. Walter, Jens Leenstra, Gerhard Döttling, Bernd Leppla, Hans-Jürgen Münster, Kevin W. Kark, Bruce Wile |
| 1997 | Hierarchical Sequence Compaction for Power Estimation. Radu Marculescu, Diana Marculescu, Massoud Pedram |
| 1997 | Hierarchical Test Generation and Design for Testability of ASPPs and ASIPs. Indradeep Ghosh, Anand Raghunathan, Niraj K. Jha |
| 1997 | High-Level Power Modeling, Estimation, and Optimization. Enrico Macii, Massoud Pedram, Fabio Somenzi |
| 1997 | ISDL: An Instruction Set Description Language for Retargetability. George Hadjiyiannis, Silvina Hanono, Srinivas Devadas |
| 1997 | Incorporating Imprecise Computation into System-Level Design of Application-Specific Heterogeneous Multiprocessors. Yosef Gavriel Tirat-Gefen, Diógenes Cecilio da Silva Jr., Alice C. Parker |
| 1997 | InfoPad - An Experiment in System Level Design and Integration. Robert W. Brodersen |
| 1997 | Interface Timing Verification Drives System Design. Ajay J. Daga, Peter Suaris |
| 1997 | Interface-Based Design. James A. Rowson, Alberto L. Sangiovanni-Vincentelli |
| 1997 | Layout Driven Re-synthesis for Low Power Consumption LSIs. Masako Murofushi, Takashi Ishioka, Masami Murakata, Takashi Mitsuhashi |
| 1997 | Limited Exception Modeling and Its Use in Presynthesis Optimizations. Jian Li, Rajesh K. Gupta |
| 1997 | Linear Sifting of Decision Diagrams. Christoph Meinel, Fabio Somenzi, Thorsten Theobald |
| 1997 | Low Energy Memory and Register Allocation Using Network Flow. Catherine H. Gebotys |
| 1997 | Low Power FPGA Design - A Re-engineering Approach. Chau-Shen Chen, TingTing Hwang, C. L. Liu |
| 1997 | Lumped Interconnect Models Via Gaussian Quadrature. Keith Nabors, Tze-Ting Fang, Hung-Wen Chang, Kenneth S. Kundert |
| 1997 | Memory-CPU Size Optimization for Embedded System Designs. Barry Shackleford, Mitsuhiro Yasuda, Etsuko Okushi, Hisao Koizumi, Hiroyuki Tomiyama, Hiroto Yasuura |
| 1997 | Methodology for Behavioral Synthesis-Based Algorithm-Level Design Space Exploration: DCT Case Study. Miodrag Potkonjak, Kyosun Kim, Ramesh Karri |
| 1997 | Modeling Design Tasks and Tools: The Link Between Product and Flow Model. Bernd Schürmann, Joachim Altmeyer |
| 1997 | More Practical Bounded-Skew Clock Routing. Andrew B. Kahng, Chung-Wen Albert Tsao |
| 1997 | Multi-Way FPGA Partitioning by Fully Exploiting Design Hierarchy. Wen-Jong Fang, Allen C.-H. Wu |
| 1997 | Multilevel Circuit Partitioning. Charles J. Alpert, Jen-Hsin Huang, Andrew B. Kahng |
| 1997 | Multilevel Hypergraph Partitioning: Application in VLSI Domain. George Karypis, Rajat Aggarwal, Vipin Kumar, Shashi Shekhar |
| 1997 | Optimal Wire-Sizing Function with Fringing Capacitance Consideration. Chung-Ping Chen, D. F. Wong |
| 1997 | Optimizing Designs Containing Black Boxes. Tai-Hung Liu, Khurram Sajid, Adnan Aziz, Vigyan Singhal |
| 1997 | Overview of Microelectromechanical Systems and Design Processes. William C. Tang |
| 1997 | Post-Layout Logic Restructuring for Performance Optimization. Yi-Min Jiang, Angela Krstic, Kwang-Ting Cheng, Malgorzata Marek-Sadowska |
| 1997 | Potential-Driven Statistical Ordering of Transformations. Inki Hong, Darko Kirovski, Miodrag Potkonjak |
| 1997 | Power Macromodeling for High Level Power Estimation. Subodh Gupta, Farid N. Najm |
| 1997 | Power Management Techniques for Control-Flow Intensive Designs. Anand Raghunathan, Sujit Dey, Niraj K. Jha, Kazutoshi Wakabayashi |
| 1997 | Power Supply Noise Analysis Methodology for Deep-Submicron VLSI Chip Design. Howard H. Chen, David D. Ling |
| 1997 | Power-conscious High Level Synthesis Using Loop Folding. Daehong Kim, Kiyoung Choi |
| 1997 | Predicting Timing Behavior in Architectural Design Exploration of Real-Time Embedded Systems. Rajeshkumar S. Sambandam, Xiaobo Hu |
| 1997 | Preservation of Passivity During RLC Network Reduction via Split Congruence Transformations. Kevin J. Kerns, Andrew T. Yang |
| 1997 | Proceedings of the 34st Conference on Design Automation, Anaheim, California, USA, Anaheim Convention Center, June 9-13, 1997. Ellen J. Yoffa, Giovanni De Micheli, Jan M. Rabaey |
| 1997 | Profile-Driven Program Synthesis for Evaluation of System Power Dissipation. Cheng-Ta Hsieh, Massoud Pedram, Gaurav Mehta, Fred Rastgar |
| 1997 | Quadratic Placement Revisited. Charles J. Alpert, Tony F. Chan, Dennis J.-H. Huang, Igor L. Markov, Kenneth Yan |
| 1997 | RASSP Virtual Prototyping of DSP Systems. C. Hein, J. Pridgen, W. Kline |
| 1997 | Rapid Frequency-Domain Analog Fault Simulation Under Parameter Tolerances. Michael W. Tian, Chuanjin Richard Shi |
| 1997 | Remembrance of Things Past: Locality and Memory in BDDs. Srilatha Manne, Dirk Grunwald, Fabio Somenzi |
| 1997 | SPIE: Sparse Partial Inductance Extraction. Zhijiang He, Mustafa Celik, Lawrence T. Pileggi |
| 1997 | STARBIST: Scan Autocorrelated Random Pattern Generation. Kun-Han Tsai, Sybille Hellebrand, Janusz Rajski, Malgorzata Marek-Sadowska |
| 1997 | SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems. Salvador Mir, Adoración Rueda, Thomas Olbrich, Eduardo J. Peralías, José Luis Huertas |
| 1997 | Safe BDD Minimization Using Don't Cares. Youpyo Hong, Peter A. Beerel, Jerry R. Burch, Kenneth L. McMillan |
| 1997 | Schedule Validation for Embedded Reactive Real-Time Systems. Felice Balarin, Alberto L. Sangiovanni-Vincentelli |
| 1997 | Sequence Compaction for Probabilistic Analysis of Finite-State Machines. Diana Marculescu, Radu Marculescu, Massoud Pedram |
| 1997 | Solving Covering Problems Using LPR-Based Lower Bounds. Stan Y. Liao, Srinivas Devadas |
| 1997 | Static Timing Analysis of Embedded Software. Sharad Malik, Margaret Martonosi, Yau-Tsun Steven Li |
| 1997 | Statistical Estimation of Average Power Dissipation in Sequential Circuits. Li-Pen Yuan, Chin-Chi Teng, Sung-Mo Kang |
| 1997 | Statistical Estimation of the Cumulative Distribution Function for Power Dissipation in VLSI Cirucits. Chih-Shun Ding, Qing Wu, Cheng-Ta Hsieh, Massoud Pedram |
| 1997 | Structured Design of Microelectromechanical Systems. Tamal Mukherjee, Gary K. Fedder |
| 1997 | Symbolic Evaluation of Performance Models for Tradeoff Visualization. Jeffrey Walrath, Ranga Vemuri |
| 1997 | Symbolic Timing Verification of Timing Diagrams using Presburger Formulas. Tod Amon, Gaetano Borriello, Taokuan Hu, Jiwen Liu |
| 1997 | Synthesis of Application Specific Programmable Processors. Kyosun Kim, Ramesh Karri, Miodrag Potkonjak |
| 1997 | Synthesis of Speed-Independent Circuits from STG-Unfolding Segment. Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella |
| 1997 | System Level Fixed-Point Design Based on an Interpolative Approach. Markus Willems, Volker Bürsgens, Holger Keding, Thorsten Grötker, Heinrich Meyr |
| 1997 | System-Level Synthesis of Low-Power Hard Real-Time Systems. Darko Kirovski, Miodrag Potkonjak |
| 1997 | Technology Retargeting for IC Layout. John Lakos |
| 1997 | Technology-Dependent Transformations for Low-Power Synthesis. Rajendran Panda, Farid N. Najm |
| 1997 | Telescopic Units: Increasing the Average Throughput of Pipelined Designs by Adaptive Latency Control. Luca Benini, Enrico Macii, Massimo Poncino |
| 1997 | The Future of Custom Cell Generation in Physical Synthesis. Martin Lefebvre, David Marple, Carl Sechen |
| 1997 | Timing Optimization for Multi-Source Nets: Characterization and Optimal Repeater Insertion. John Lillis, Chung-Kuan Cheng |
| 1997 | Tools and Methodologies for Low Power Design. Jerry Frenkil |
| 1997 | Toward Formalizing a Validation Methodology Using Simulation Coverage. Aarti Gupta, Sharad Malik, Pranav Ashar |
| 1997 | Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology. James T. Kao, Anantha P. Chandrakasan, Dimitri A. Antoniadis |
| 1997 | Unification of Budgeting and Placement. Majid Sarrafzadeh, David A. Knol, Gustavo E. Téllez |
| 1997 | Vector Generation for Maximum Instantaneous Current Through Supply Lines for CMOS Circuits. Angela Krstic, Kwang-Ting Cheng |
| 1997 | Very Rapid Prototyping of Wearable Computers: A Case Study of Custom versus Off-the-Shelf Design Methodologies. Asim Smailagic, Daniel P. Siewiorek, Richard L. Martin, John Stivoric |
| 1997 | Wire Segmenting for Improved Buffer Insertion. Charles J. Alpert, Anirudh Devgan |
| 1997 | Zeros and Passivity of Arnoldi-Reduced-Order Models for Interconnect Networks. Ibrahim M. Elfadel, David D. Ling |