| 1995 | A Design and Validation System for Asynchronous Circuits. Peter Vanbekbergen, Albert R. Wang, Kurt Keutzer |
| 1995 | A Fast State Assignment Procedure for Large FSMs. Shihming Liu, Massoud Pedram, Alvin M. Despain |
| 1995 | A Fast and Flexible Performance Simulator for Micro-Architecture Trade-off Analysis on UltraSPARC-I. Marc Tremblay, Guillermo Maturana, Atsushi Inoue, Leslie Kohn |
| 1995 | A Fresh Look at Retiming Via Clock Skew Optimization. Rahul B. Deokar, Sachin S. Sapatnekar |
| 1995 | A General Method for Compiling Event-Driven Simulations. Robert S. French, Monica S. Lam, Jeremy R. Levitt, Kunle Olukotun |
| 1995 | A Method for Finding Good Ashenhurst Decompositions and Its Application to FPGA Synthesis. Ted Stanion, Carl Sechen |
| 1995 | A Methodology for HW-SW Codesign in ATM. Giovanni Mancini, Dave Yurach, Spiros Boucouris |
| 1995 | A Partitioning-Based Logic Optimization Method for Large Scale Circuits with Boolean Matrix. Yuichi Nakamura, Takeshi Yoshimura |
| 1995 | A Performance and Routability Driven Router for FPGAs Considering Path Delays. Yuh-Sheng Lee, Allen C.-H. Wu |
| 1995 | A Survey of Optimization Techniques Targeting Low Power VLSI Circuits. Srinivas Devadas, Sharad Malik |
| 1995 | A Transformation-Based Approach for Storage Optimization. Wei-Kai Cheng, Youn-Long Lin |
| 1995 | Accelerating Concurrent Hardware Design with Behavioural Modelling and System Simulation. Allan Silburt, Ian Perryman, Janick Bergeron, Stacy Nichols, Mario Dufresne, Greg Ward |
| 1995 | Accurate Estimation of Combinational Circuit Activity. Huzefa Mehta, Manjit Borah, Robert Michael Owens, Mary Jane Irwin |
| 1995 | Accurate and Efficient Fault Simulation of Realistic CMOS Network Breaks. Haluk Konuk, F. Joel Ferguson, Tracy Larrabee |
| 1995 | Advanced Verification Techniques Based on Learning. Jawahar Jain, Rajarshi Mukherjee, Masahiro Fujita |
| 1995 | An Algorithm for Incremental Timing Analysis. Jin-Fuw Lee, Donald T. Tang |
| 1995 | An Assigned Probability Technique to Derive Realistic Worst-Case Timing Models of Digital Standard Cells. Alessandro Dal Fabbro, Bruno Franzini, Luigi Croce, Carlo Guardiani |
| 1995 | An Efficient Algorithm for Local Don't Care Sets Calculation. Shih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng |
| 1995 | Analysis of Switch-Level Faults by Symbolic Simulation. Lluís Ribas, Jordi Carrabina |
| 1995 | Asynchronous, Distributed Event Driven Simulation Algorithm for Execution of VHDL on Parallel Processors. Peter A. Walker, Sumit Ghosh |
| 1995 | Automatic Clock Abstraction from Sequential Circuits. Samir Jain, Randal E. Bryant, Alok Jain |
| 1995 | Automatic Layout Synthesis of Leaf Cells. Sanjay Rekhi, J. Donald Trotter, Daniel H. Linder |
| 1995 | Behavioral Synthesis Methodology for HDL-Based Specification and Validation. David Knapp, Tai Ly, Don MacMillen, Ron Miller |
| 1995 | Benchmarking An Interdisciplinary Concurrent Design Methodology for Electronic/Mechanical Systems. Asim Smailagic, Daniel P. Siewiorek, Drew Anderson, Chris Kasabach, Thomas L. Martin, John Stivoric |
| 1995 | Boolean Matching for Incompletely Specified Functions. Kuo-Hua Wang, TingTing Hwang |
| 1995 | Buffer Insertion and Sizing Under Process Variations for Low Power Clock Distribution. Joe G. Xi, Wayne Wei-Ming Dai |
| 1995 | CAD Methodology for the Design of UltraSPARC-I Microprocessor at Sun Microsystems Inc. A. Cao, A. Adalal, J. Bauman, P. Delisle, P. Dedood, P. Donehue, M. Dell'OcaKhouja, T. Doan, Manjunath Doreswamy, Philip A. Ferolito, O. Geva, D. Greenhill, S. Gopaladhine, J. Irwin, L. Lev, J. MacDonald, M. Ma, Samir Mitra, P. Patel, A. Prabhu, R. Puranik, S. Rozanski, N. Ross, P. Saggurti, Slobodan Simovich, R. Sunder, B. Sur, W. Vercruysse, Michelle Wong, P. Yip, Robert K. Yu, J. Zhou, Gregory B. Zyner |
| 1995 | Code Optimization Techniques for Embedded DSP Microprocessors. Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Steven W. K. Tjiang, Albert R. Wang |
| 1995 | Combining Deterministic and Genetic Approaches for Sequential Circuit Test Generation. Elizabeth M. Rudnick, Janak H. Patel |
| 1995 | Computing the Maximum Power Cycles of a Sequential Circuit. Srilatha Manne, Abelardo Pardo, R. Iris Bahar, Gary D. Hachtel, Fabio Somenzi, Enrico Macii, Massimo Poncino |
| 1995 | Concurrent Design Methodology and Configuration Management of the SIEMENS EWSD - CCS7E Processor System Simulation. Thomas W. Albrecht |
| 1995 | Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores. Adwin H. Timmer, Marino T. J. Strik, Jef L. van Meerbergen, Jochen A. G. Jess |
| 1995 | Constrained Register Allocation in Bus Architectures. Elof Frank, Salil Raje, Majid Sarrafzadeh |
| 1995 | DARWIN: CMOS Opamp Synthesis by Means of a Genetic Algorithm. Wim Kruiskamp, Domine Leenaerts |
| 1995 | DELAY: An Efficient Tool for Retiming with Realistic Delay Modeling. Kumar N. Lalgudi, Marios C. Papaefthymiou |
| 1995 | Data Path Allocation for Synthesizing RTL Designs with Low BIST Area Overhead. Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer |
| 1995 | Delay Analysis of the Distributed RC Line. Vasant B. Rao |
| 1995 | Delayed Frontal Solution for Finite-Element Based Resistance Extraction. N. P. van der Meijs, Arjan J. van Genderen |
| 1995 | Deriving Efficient Area and Delay Estimates by Modeling Layout Tools. Donald S. Gelosh, Dorothy E. Setliff |
| 1995 | Design-Flow and Synthesis for ASICs: A Case Study. Massimo Bombana, Patrizia Cavalloro, Salvatore Conigliaro, Roger B. Hughes, Gerry Musgrave, Giuseppe Zaza |
| 1995 | Digital Receiver Design Using VHDL Generation from Data Flow Graphs. Peter Zepter, Thorsten Grötker, Heinrich Meyr |
| 1995 | Direct Performance-Driven Placement of Mismatch-Sensitive Analog Circuits. Koen Lampaert, Georges G. E. Gielen, Willy M. C. Sansen |
| 1995 | Effects of FPGA Architecture on FPGA Routing. Steven Trimberger |
| 1995 | Efficient Generation of Counterexamples and Witnesses in Symbolic Model Checking. Edmund M. Clarke, Orna Grumberg, Kenneth L. McMillan, Xudong Zhao |
| 1995 | Efficient OBDD-Based Boolean Manipulation in CAD beyond Current Limits. Jochen Bern, Christoph Meinel, Anna Slobodová |
| 1995 | Efficient Power Estimation for Highly Correlated Input Streams. Radu Marculescu, Diana Marculescu, Massoud Pedram |
| 1995 | Efficient Reduced-Order Modeling of Frequency-Dependent Coupling Inductances Associated with 3-D Interconnect Structures. Luís Miguel Silveira, Mattan Kamon, Jacob White |
| 1995 | Efficient Steady-State Analysis Based on Matrix-Free Krylov-Subspace Methods. Ricardo Telichevesky, Kenneth S. Kundert, Jacob White |
| 1995 | Equivalence Checking of Datapaths Based on Canonical Arithmetic Expressions. Zheng Zhou, Wayne P. Burleson |
| 1995 | Externally Hazard-Free Implementations of Asynchronous Circuits. Milton H. Sawasaki, Chantal Ykman-Couvreur, Bill Lin |
| 1995 | Extreme Delay Sensitivity and the Worst-Case Switching Activity in VLSI Circuits. Farid N. Najm, Michael Y. Zhang |
| 1995 | Fast Identification of Robust Dependent Path Delay Faults. Uwe Sparmann, D. Luxenburger, Kwang-Ting Cheng, Sudhakar M. Reddy |
| 1995 | Feedback, Correlation, and Delay Concerns in the Power Estimation of VLSI Circuits. Farid N. Najm |
| 1995 | Functional Multiple-Output Decomposition: Theory and an Implicit Algorithm. Bernd Wurth, Klaus Eckl, Kurt Antreich |
| 1995 | Generating ECAD Framework Code from Abstract Models. Joachim Altmeyer, Bernd Schürmann, Martin Schütze |
| 1995 | Hierarchical Optimization of Asynchronous Circuits. Bill Lin, Gjalt G. de Jong, Tilman Kolks |
| 1995 | Incorporating Design Schedule Management into a Flow Management System. Eric W. Johnson, Jay B. Brockman |
| 1995 | Information Models of VHDL. Cristian A. Giumale, Hilary J. Kahn |
| 1995 | Interfacing Incompatible Protocols Using Interface Process Generation. Sanjiv Narayan, Daniel Gajski |
| 1995 | Interval Scheduling: Fine-Grained Code Scheduling for Embedded Systems. Pai H. Chou, Gaetano Borriello |
| 1995 | Lambda Set Selection in Roth-Karp Decomposition for LUT-Based FPGA Technology Mapping. Wen-Zen Shen, Juinn-Dar Huang, Shih-Min Chao |
| 1995 | Logic Clause Analysis for Delay Optimization. Bernhard Rohfleisch, Bernd Wurth, Kurt Antreich |
| 1995 | Logic Extraction and Factorization for Low Power. Sasan Iman, Massoud Pedram |
| 1995 | Logic Synthesis for Engineering Change. Chih-Chang Lin, Kuang-Chien Chen, Shih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng |
| 1995 | Logic Verification Methodology for PowerPC Microprocessors. Charles H. Malley, Max Dieudonné |
| 1995 | Measures of Syntactic Complexity for Modeling Behavioral VHDL. Neal S. Stollon, John D. Provence |
| 1995 | Memory Segmentation to Exploit Sleep Mode Operation. Amir H. Farrahi, Gustavo E. Téllez, Majid Sarrafzadeh |
| 1995 | Minimizing the Routing Cost During Logic Extraction. Hirendu Vaishnav, Massoud Pedram |
| 1995 | Mixed-Signal Switching Noise Analysis Using Voronoi-Tessellated Substrate Macromodels. Ivan L. Wemple, Andrew T. Yang |
| 1995 | Model Checking in Industrial Hardware Design. Jörg Bormann, Jörg Lohse, Michael Payer, Gerd Venzl |
| 1995 | Multi-Level Logic Minimization Based on Multi-Signal Implications. Masayuki Yuguchi, Yuichi Nakamura, Kazutoshi Wakabayashi, Tomoyuki Fujita |
| 1995 | Multi-way Partitioning for Minimum Delay for Look-Up Table Based FPGAs. Prashant Sawkar, Donald E. Thomas |
| 1995 | New Ideas for Solving Covering Problems. Olivier Coudert, Jean Christophe Madre |
| 1995 | New Performance-Driven FPGA Routing Algorithms. Michael J. Alexander, Gabriel Robins |
| 1995 | Novel Verification Framework Combining Structural and OBDD Methods in a Synthesis Environment. Subodh M. Reddy, Wolfgang Kunz, Dhiraj K. Pradhan |
| 1995 | On Optimal Board-Level Routing for FPGA-Based Logic Emulation. Wai-Kei Mak, D. F. Wong |
| 1995 | On Synthesis-for-Testability of Combinational Logic Circuits. Irith Pomeranz, Sudhakar M. Reddy |
| 1995 | On Test Set Preservation of Retimed Circuits. Aiman H. El-Maleh, Thomas E. Marchok, Janusz Rajski, Wojciech Maly |
| 1995 | On the Bounded-Skew Clock and Steiner Routing Problems. Dennis J.-H. Huang, Andrew B. Kahng, Chung-Wen Albert Tsao |
| 1995 | Optimal ILP-Based Approach for Throughput Optimization Using Simultaneous Algorithm/Architecture Matching and Retiming. Y. G. DeCastelo-Vide-e-Souza, Miodrag Potkonjak, Alice C. Parker |
| 1995 | Orthogonal Greedy Coupling - A New Optimization Approach to 2-D FPGA Routing. Yu-Liang Wu, Malgorzata Marek-Sadowska |
| 1995 | Parallel Logic Simulation of VLSI Systems. Roger D. Chamberlain |
| 1995 | Partial Scan with Pre-selected Scan Signals. Peichen Pan, C. L. Liu |
| 1995 | Performance Analysis of Embedded Software Using Implicit Path Enumeration. Yau-Tsun Steven Li, Sharad Malik |
| 1995 | Performance Driven Global Routing and Wiring Rule Generation for High Speed PCBs and MCMs. Sharad Mehrotra, Paul D. Franzon, Michael B. Steer |
| 1995 | Performance-Driven Partitioning Using a Replication Graph Approach. Lung-Tien Liu, Ming-Ter Kuo, Chung-Kuan Cheng, T. C. Hu |
| 1995 | Power Distribution Topology Design. Ashok Vittal, Malgorzata Marek-Sadowska |
| 1995 | Power Estimation in Sequential Circuits. Farid N. Najm, Shashank Goel, Ibrahim N. Hajj |
| 1995 | Power Optimal Buffered Clock Tree Design. Ashok Vittal, Malgorzata Marek-Sadowska |
| 1995 | Power-Profiler: Optimizing ASICs Power Consumption at the Behavioral Level. Raul San Martin, John P. Knight |
| 1995 | Proceedings of the 32st Conference on Design Automation, San Francisco, California, USA, Moscone Center, June 12-16, 1995. Bryan Preas |
| 1995 | Productivity Issues in High-Level Design: Are Tools Solving the Real Problems? Reinaldo A. Bergamaschi |
| 1995 | Quantified Suboptimality of VLSI Layout Heuristics. Lars W. Hagen, Dennis J.-H. Huang, Andrew B. Kahng |
| 1995 | Rapid Diagnostic Fault Simulation of Stuck-at Faults in Sequential Circuits Using Compact Lists. Srikanth Venkataraman, Ismed Hartanto, W. Kent Fuchs, Elizabeth M. Rudnick, Sreejit Chakravarty, Janak H. Patel |
| 1995 | Reduced-Order Modeling of Large Linear Subcircuits via a Block Lanczos Algorithm. Peter Feldmann, Roland W. Freund |
| 1995 | Register Allocation and Binding for Low Power. Jui-Ming Chang, Massoud Pedram |
| 1995 | Register Minimization beyond Sharing among Variables. Tsung-Yi Wu, Youn-Long Lin |
| 1995 | Rephasing: A Transformation Technique for the Manipulation of Timing Constraints. Miodrag Potkonjak, Mani B. Srivastava |
| 1995 | Requirements-Based Design Evaluation. Stephen T. Frezza, Steven P. Levitan, Panos K. Chrysanthis |
| 1995 | Residue BDD and Its Application to the Verification of Arithmetic Circuits. Shinji Kimura |
| 1995 | Retargetable Self-Test Program Generation Using Constraint Logic Programming. Ulrich Bieker, Peter Marwedel |
| 1995 | Retiming Synchronous Circuitry with Imprecise Delays. Ireneusz Karkowski, Ralph H. J. M. Otten |
| 1995 | Scheduling Using Behavioral Templates. Tai Ly, David Knapp, Ron Miller, Don MacMillen |
| 1995 | Simultaneous Gate and Interconnect Sizing for Circuit-Level Delay Optimization. Noel Menezes, Satyamurthy Pullela, Lawrence T. Pileggi |
| 1995 | Software Accelerated Functional Fault Simulation for Data-Path Architectures. Mark Kassab, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer |
| 1995 | Spectral Partitioning: The More Eigenvectors, The Better. Charles J. Alpert, So-Zen Yao |
| 1995 | Symbolic Fault Simulation for Sequential Circuits and the Multiple Observation Time Test Strategy. Rolf Krieger, Bernd Becker, Martin Keim |
| 1995 | Symbolic Modeling and Evaluation of Data Paths. Chuck Monahan, Forrest Brewer |
| 1995 | Synthesis of Software Programs for Embedded Control Applications. Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Luciano Lavagno, Harry Hsieh, Kei Suzuki, Alberto L. Sangiovanni-Vincentelli, Ellen Sentovich |
| 1995 | System Design Methodology of UltraSPARC-I. Lawrence Yang, David Gao, Jamshid Mostoufi, Raju Joshi, Paul Loewenstein |
| 1995 | System-Level Design for Test of Fully Differential Analog Circuits. Bapiraju Vinnakota, Ramesh Harjani, Nicholas J. Stessman |
| 1995 | Test Program Generation for Functional Verification of PowerPC Processors in IBM. Aharon Aharon, Dave Goodman, Moshe Levinger, Yossi Lichtenstein, Yossi Malka, Charlotte Metzger, Moshe Molcho, Gil Shurek |
| 1995 | The Aurora RAM Compiler. Ajay Chandna, C. David Kibler, Richard B. Brown, Mark Roberts, Karem A. Sakallah |
| 1995 | The Case for Design Using the World Wide Web. Mário J. Silva, Randy H. Katz |
| 1995 | The Elmore Delay as a Bound for RC Trees with Generalized Input Signals. Rohini Gupta, Byron Krauter, Bogdan Tutuianu, John Willis, Lawrence T. Pileggi |
| 1995 | The Validity of Retiming Sequential Circuits. Vigyan Singhal, Carl Pixley, Richard L. Rudell, Robert K. Brayton |
| 1995 | Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool. Luciano Lavagno, Patrick C. McGeer, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli |
| 1995 | Timing Driven Placement for Large Standard Cell Circuits. William Swartz, Carl Sechen |
| 1995 | Tool Integration and Construction Using Generated Graph-Based Design Representations. Ansgar Bredenfeld, Raul Camposano |
| 1995 | Transient Simulations of Three-Dimensional Integrated Circuit Interconnect Using a Mixed Surface-Volume Approach. Mike Chou, Tom Korsmeyer, Jacob White |
| 1995 | Transmission Line Synthesis. Byron Krauter, Rohini Gupta, John Willis, Lawrence T. Pileggi |
| 1995 | UltraSPARC-I Emulation. James Gateley, Miriam Blatt, Dennis Chen, Scott Cooke, Piyush Desai, Manjunath Doreswamy, Mark Elgood, Gary Feierbach, Tim Goldsbury, Dale Greenley, Raju Joshi, Mike Khosraviani, Robert Kwong, Manish Motwani, Chitresh Narasimhaiah, Sam J. Nicolino Jr., Tooru Ozeki, Gary Peterson, Chris Salzmann, Nasser Shayesteh, Jeffrey Whitman, Pak Wong |
| 1995 | Verification of Arithmetic Circuits with Binary Moment Diagrams. Randal E. Bryant, Yirng-An Chen |