| 1992 | A Boundary-Element Approach to Transient simulation of Three-Dimensional Integrated Circuit Interconnect. David D. Ling, S. Kim, J. White |
| 1992 | A Graph Theoretic Technique to Speed up Floorplan Area Optimization. Ting-Chi Wang, D. F. Wong |
| 1992 | A Methodology to Reduce the Computational Cost of Behavioral Test Pattern Generation. Jean François Santucci, Gérard Dray, Norbert Giambiasi, Marc Boumédine |
| 1992 | A Mixed-Integer Nonlinear Programming Approach to Analog Circuit Synthesis. Prabir C. Maulik, L. Richard Carley, Rob A. Rutenbar |
| 1992 | A Multi-Layer Channel Router with New Style of Over-the-Cell Routing. Takashi Fujii, Yoko Mima, Tsuneo Matsuda, Takeshi Yoshimura |
| 1992 | A Near Optimal Algorithm for Technology Mapping Minimizing Area under Delay Constraints. Kamal Chaudhary, Massoud Pedram |
| 1992 | A New Efficient Approach to Multilayer Channel Routing Problem. Sung-Chuan Fang, Wu-Shiung Feng, Shian-Lang Lee |
| 1992 | A New Hierarchical Layout Compactor Using Simplified Graph Models. Wonjong Kim, Joohack Lee, Hyunchul Shin |
| 1992 | A New Model for Improving symbolic Product Machine Traversal. Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Silvano Gai, Paolo Prinetto, Matteo Sonza Reorda |
| 1992 | A Novel Approach to Delay-Fault Diagnosis. Patrick Girard, Christian Landrault, Serge Pravossoudovitch |
| 1992 | A Path-Oriented Approach for Reducing Hazards in Asynchronous Designs. Meng-Lin Yu, P. A. Subrahmanyam |
| 1992 | A Performance Driven Macro-Cell Placement Algorithm. Tong Gao, Pravin M. Vaidya, C. L. Liu |
| 1992 | A Pin Permutation Algorithm for Improving Over-the-Cell Channel Routing. Cliff Yungchin Hou, C. Y. Roger Chen |
| 1992 | A Wire Length Estimation Technique Utilizing Neighborhood Density Equations. Takeo Hamada, Chung-Kuan Cheng, Paul M. Chau |
| 1992 | APT: An Area-Performance-Testability Driven Placement Algorithm. Sungho Kim, Prithviraj Banerjee, Vivek Chickermane, Janak H. Patel |
| 1992 | AWESpice: A General Tool for the Accurate and Efficient Simulation of Interconnect Problems. Vivek Raghavan, J. Eric Bracken, Ronald A. Rohrer |
| 1992 | AWEsymbolic: Compiled Analysis of Linear(ized) Circuits using Asymptotic Waveform Evaluation. John Y. Lee, Ronald A. Rohrer |
| 1992 | Acquiring and Maintaining State-of-the-Art DA Systems. Patrick M. Hefferan, Steve Sapiro |
| 1992 | Algorithms for Current Monitor Based Diagnosis of Bridging and Leakage Faults. Sreejit Chakravarty, Minsheng Liu |
| 1992 | An Approach to Symbolic Timing Verification. Tod Amon, Gaetano Borriello |
| 1992 | An Efficient Routing Algorithm for SOG Cell Generation on a Dense Gate-Isolated Layout Style. Ryosuke Okuda, Sumio Oguri |
| 1992 | An Efficient algorithm for Microword Length Minimization. Ruchir Puri, Jun Gu |
| 1992 | An Engineering Environment for Hardware/Software Co-Simulation. David Becker, Raj K. Singh, Stephen G. Tell |
| 1992 | An Improved Synthesis Algorithm for Multiplexor-Based PGA's. Rajeev Murgai, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1992 | An Integrated Approach to Realistic Worst-Case Design Optimization of MOS Analog Circuits. Abhijit Dharchoudhury, Sung-Mo Kang |
| 1992 | An Interpreter for General Netlist Design Rule Checking. Georg Peltz |
| 1992 | Analyzing Cycle Stealing on Synchronous Circuits with Level-Sensitive Latches. Ichiang Lin, John A. Ludwig, Kwok Eng |
| 1992 | Application-Driven Design Automation for Microprocessor Design. Iksoo Pyo, Ching-Long Su, Ing-Jer Huang, Kuo-Rueih Pan, Yong-Seon Koh, Chi-Ying Tsui, Hsu-Tsun Chen, Gino Cheng, Shihming Liu, Shiqun Wu, Alvin M. Despain |
| 1992 | Area and Delay Mapping for Table-Look-Up Based Field Programmable Gate Arrays. Prashant Sawkar, Donald E. Thomas |
| 1992 | At-Speed Delay Testing of Synchronous Sequential Circuits. Irith Pomeranz, Sudhakar M. Reddy |
| 1992 | Automated Design Decision Support System. Robert Beggs, John Sawaya, Catharine Ciric, Julius Etzl |
| 1992 | Automatic Test Knowledge Extraction from VHDL (ATKET). Praveen Vishakantaiah, Jacob A. Abraham, Magdy S. Abadir |
| 1992 | BDDMAP: A Technology Mapper Based on a New Covering Algorithm. David S. Kung, Robert F. Damiano, Theresa A. Nix, David J. Geiger |
| 1992 | CAD Framework Initiative - A User Perspective. Todd J. Scallan |
| 1992 | Canonical Embedding of Rectangular Duals with Applications to VLSI Floorplanning. Susmita Sur-Kolay, Bhargab B. Bhattacharya |
| 1992 | Certified Timing Verification and the Transition Delay of a Logic Circuit. Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert R. Wang |
| 1992 | Challenges and Advances in Electrical Interconnect Analysis. Albert E. Ruehli, Hansruedi Heeb |
| 1992 | Characterization of Boolean Functions for Rapid Matching in FPGA Technology Mapping. Ulf Schlichtmann, Franc Brglez, Michael Hermann |
| 1992 | Circuit Enhancement by Eliminating Long False Paths. Hsi-Chuan Chen, David Hung-Chang Du, Siu-Wing Cheng |
| 1992 | Circuit Structure Relations to Redundancy and Delay: The KMS Algorithm Revisited. Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1992 | Coalgebraic Division for Multilevel Logic Synthesis. Wen-Jun Hsu, Wen-Zen Shen |
| 1992 | Computing Optimal Clock Schedules. Thomas G. Szymanski |
| 1992 | Concurrent Fault Simulation of Logic Gates and Memory Blocks on Message Passing Multicomputers. Soumitra Bose, Prathima Agrawal |
| 1992 | Control Optimization in High-Level Synthesis Using Behavioral Don't Cares. Reinaldo A. Bergamaschi, Donald A. Lobo, Andreas Kuehlmann |
| 1992 | Data Path Allocation using an Extended Binding Model. Ganesh Krishnamoorthy, John A. Nestor |
| 1992 | Delay Fault Models and Test Generation for Random Logic Sequential Circuits. Tapan J. Chakraborty, Vishwani D. Agrawal, Michael L. Bushnell |
| 1992 | Delay Fault Test Generation for Scan/Hold Circuits Using Boolean Expressions. Debashis Bhattacharya, Prathima Agrawal, Vishwani D. Agrawal |
| 1992 | Design Process Management for CAD Frameworks. Margarida F. Jacome, Stephen W. Director |
| 1992 | Design and Integration Services (Panel Abstract). Ronald Collet |
| 1992 | Directions to Watch in Design Technology (Tutorial Abstract). Gerry Langeler |
| 1992 | Distributed Design-Space Exploration for High-Level Synthesis Systems. Rajiv Dutta, Jayanta Roy, Ranga Vemuri |
| 1992 | Edge-Valued Binary Decision Diagrams for Multi-Level Hierarchical Verification. Yung-Te Lai, Sarma Sastry |
| 1992 | Efficient Sum-to-One Subsets Algorithm for Logic Optimization. Kuang-Chien Chen, Masahiro Fujita |
| 1992 | Equivalence of Robust Delay-Fault and Single Stuck-Fault Test Generation. Alexander Saldanha, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1992 | Estimation of Average Switching Activity in Combinational and Sequential Circuits. Abhijit Ghosh, Srinivas Devadas, Kurt Keutzer, Jacob K. White |
| 1992 | Exact Calculation of Synchronization Sequences Based on Binary Decision Diagrams. Carl Pixley, Seh-Woong Jeong, Gary D. Hachtel |
| 1992 | Exact Evaluation of Diagnostic Test Resolution. Ken Kubiak, Steven Parkes, W. Kent Fuchs, Resve A. Saleh |
| 1992 | Experiments with a Performance Driven Module Generator. Soohong Kim, Robert Michael Owens, Mary Jane Irwin |
| 1992 | FARM: An Efficient Feed-Through Pin Assignment Algorithm. Xianlong Hong, Jin Huang, Chung-Kuan Cheng, Ernest S. Kuh |
| 1992 | FPGA Design Principles (A Tutorial). Dwight D. Hill, Ewald Detjens |
| 1992 | Fast Exact and Quasi-Minimal Minimization of Highly Testable Fixed-Polarity AND/XOR Canonical Networks. Andisheh Sarabi, Marek A. Perkowski |
| 1992 | Finite State Machine Synthesis with Fault Tolerant Test Function. Srimat T. Chakradhar, Suman Kanjilal, Vishwani D. Agrawal |
| 1992 | Frameworks - User's Perspective (Panel Abstract). L. Lanzo |
| 1992 | Freeze!: A New Approach for Testing Sequential Circuits. Miron Abramovici, Krishna B. Rajan, David T. Miller |
| 1992 | Functional Approaches to Generating Orderings for Efficient Symbolic Representations. M. Ray Mercer, Rohit Kapur, Don E. Ross |
| 1992 | Functional Synthesis Using Area and Delay Optimization. Elke A. Rundensteiner, Daniel Gajski |
| 1992 | Fuzzy Logic Approach to Placement Problem. Rung-Bin Lin, Eugene Shragowitz |
| 1992 | Generalized Moment-Matching Methods for Transient Analysis of Interconnect Networks. Eli Chiprout, Michel S. Nakhla |
| 1992 | Global Scheduling Independent of Control Dependencies Based on Condition Vectors. Kazutoshi Wakabayashi, Hirohito Tanaka |
| 1992 | HLSIM - A New Hierarchical Logic Simulator and Netlist Converter. David A. Zein, Oliver P. Engel, Gary S. Ditlow |
| 1992 | HOPE: An Efficient Parallel Fault Simulator for Synchronous Sequential Circuits. Hyung Ki Lee, Dong Sam Ha |
| 1992 | Hcompare: A Hierarchical Netlist Comparison Program. Pradeep Batra, David Cooke |
| 1992 | Hierarchical Pitchmatching Compaction Using Minimum Design. Cyrus Bamji, Ravi Varadarajan |
| 1992 | Hierarchical Test Generation under Intensive Global Functional Constraints. Jaushin Lee, Janak H. Patel |
| 1992 | High Level Synthesis of Pipelined Instruction Set Processors and Back-End Compilers. Ing-Jer Huang, Alvin M. Despain |
| 1992 | High-Level Synthesis from VHDL with Exact Timing Constraints. A. Stoll, Peter Duzy |
| 1992 | High-Level Synthesis with Pin Constraints for Multiple-Chip Designs. Yung-Hua Hung, Alice C. Parker |
| 1992 | IPDA: Interconnect Performance Design Assistant. Norman H. Chang, Keh-Jeng Chang, John Leo, Ken Lee, Soo-Young Oh |
| 1992 | ISIS: A System for Performance Driven Resource Sharing. Brent Gregory, Don MacMillen, Dennis Fogg |
| 1992 | Implicit and Incremental Computation of Primes and Essential Primes of Boolean Functions. Olivier Coudert, Jean Christophe Madre |
| 1992 | Incremental Circuit Simulation Using Waveform Relaxation. Yun-Cheng Ju, Resve A. Saleh |
| 1992 | Inductive Verification of Iterative Systems. June-Kyung Rho, Fabio Somenzi |
| 1992 | Is Technology-Independent Design Really Practical? (Panel Abstract). Peter Hillen |
| 1992 | Iterative and Adaptive Slack Allocation for Performance-Driven Layout and FPGA Routing. Jon Frankle |
| 1992 | LATTIS: An Iterative Speedup Heuristic for Mapped Logic. John P. Fishburn |
| 1992 | Manufacturing Interface (Panel Abstract). Charles A. Shaw |
| 1992 | Maximum Current Estimation in CMOS Circuits. Harish Kriplani, Farid N. Najm, Ibrahim N. Hajj |
| 1992 | Move Frame Scheduling and Mixed Scheduling-Allocation for the Automated Synthesis of Digital Systems. Mehrdad Nourani, Christos A. Papachristou |
| 1992 | Multipole-Accelerated 3-D Capacitance Extraction Algorithms for Structures with Conformal Dielectrics. Keith Nabors, Jacob K. White |
| 1992 | Net Partitions Yield Better Module Partitions. Jason Cong, Lars W. Hagen, Andrew B. Kahng |
| 1992 | New Models for Four- and Five-Layer Channel Routing. Tai-Tsung Ho |
| 1992 | On Efficient Concurrent Fault Simulation for Synchronous Sequential Circuits. Dong-Ho Lee, Sudhakar M. Reddy |
| 1992 | On the Circuit Implementation Problem. Wing Ning Li, Andrew Lim, Prathima Agrawal, Sartaj Sahni |
| 1992 | On the Distribution of Fault Coverage and Test length in Random Testing of Combinational Circuits. Amitava Majumdar, Sarma Sastry |
| 1992 | On the Over-Specification Problem in Sequential ATPG Algorithms. Kwang-Ting Cheng, Hi-Keung Tony Ma |
| 1992 | On the Stability of Moment-Matching Approximations in Asymptotic Waveform Evaluation. Demos F. Anastasakis, Nanda Gopal, Seok-Yoon Kim, Lawrence T. Pillage |
| 1992 | On the Temporal Equivalence of Sequential Circuits. Narendra V. Shenoy, Kanwar Jit Singh, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1992 | Optimal Allocation and Binding in High-Level Synthesis. Minjoong Rim, Rajiv Jain, Renato De Leone |
| 1992 | Optimal Scheduling and Allocation of Embedded VLSI Chips. Catherine H. Gebotys |
| 1992 | Optimization of Primitive Gate Networks Using Multiple Output Two-Level Minimization. Abdul A. Malik |
| 1992 | Over-the-Cell Channel Routing for High Performance Circuits. Sivakumar Natarajan, Naveed A. Sherwani, Nancy D. Holmes, Majid Sarrafzadeh |
| 1992 | Over-the-Cell Routers for New Cell Model. Bo Wu, Naveed A. Sherwani, Nancy D. Holmes, Majid Sarrafzadeh |
| 1992 | Parallel Waveform Relaxation of Circuits with Global Feedback Loops. T. A. Johnson, Albert E. Ruehli |
| 1992 | Partitioning by Regularity Extraction. D. Sreenivasa Rao, Fadi J. Kurdahi |
| 1992 | Performance Evaluation of an Event-Driven Logic Simulation Machine. Fumiyasu Hirose |
| 1992 | Performance-Driven System Partitioning on Multi-Chip Modules. Minshine Shih, Ernest S. Kuh, Ren-Song Tsay |
| 1992 | Plane Parallel a Maze Router and Its Application to FPGAs. Mikael Palczewski |
| 1992 | Power and Ground Network Topology Optimization for Cell Based VLSIs. Takashi Mitsuhashi, Ernest S. Kuh |
| 1992 | Proceedings of the 29th Design Automation Conference, Anaheim, California, USA, June 8-12, 1992. Daniel G. Schweikert |
| 1992 | Process Independent Constraint Graph Compaction. David G. Boyer |
| 1992 | Recurrence Equations and the Optimization of Synchronous Logic Circuits. Maurizio Damiani, Giovanni De Micheli |
| 1992 | Representing Conditional Branches for High-Level Synthesis Applications. Minjoong Rim, Rajiv Jain |
| 1992 | Routing Considerations in Symbolic Layout Synthesis. Youlin Liao, Stan Chow |
| 1992 | SWiTEST: A Switch Level Test Generation System for CMOS Combinational Circuits. Kuen-Jong Lee, Charles Njinda, Melvin A. Breuer |
| 1992 | Simulating Lossy Interconnect with High Frequency Nonidealities in Linear Time. Jaijeet S. Roychowdhury, A. Richard Newton, Donald O. Pederson |
| 1992 | Solving the State Assignment Problem for Signal Transition Graphs. Luciano Lavagno, Cho W. Moon, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1992 | Specification Partitioning for System Design. Frank Vahid, Daniel Gajski |
| 1992 | State Assignment Using Input/Output Functions. Irith Pomeranz, Kwang-Ting Cheng |
| 1992 | Superpipelined Control and Data Path Synthesis. Usha Prabhu, Barry M. Pangrle |
| 1992 | Symbolic Prime Generation for Multiple-Valued Functions. Bill Lin, Olivier Coudert, Jean Christophe Madre |
| 1992 | Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components. Rajesh K. Gupta, Claudionor José Nunes Coelho Jr., Giovanni De Micheli |
| 1992 | Synthesis from Production-Based Specifications. Andrew Seawright, Forrest Brewer |
| 1992 | TEMPT: Technology Mapping for the Exploration of FPGA Architectures with Hard-Wired Connections. Kevin Chung, Jonathan Rose |
| 1992 | Test-Set Preserving Logic Transformations. Michael J. Batek, John P. Hayes |
| 1992 | The Automatic Generation of Bus-Interface Models. Yew-Hong Leong, William P. Birmingham |
| 1992 | The Electronic Design Interchange Format EDIF: Present and Future. Hilary J. Kahn, Richard Goldman |
| 1992 | The Princeton University Behavioral Synthesis System. Wayne H. Wolf, Andrés Takach, Chun-Yao Huang, Richard Manno, Ephrem Wu |
| 1992 | The Role of Long and Short Paths in Circuit Performance Optimization. Siu-Wing Cheng, Hsi-Chuan Chen, David Hung-Chang Du, Andrew Lim |
| 1992 | The State of EDA Standards (Panel Abstract). John P. Eurich |
| 1992 | Time Constrained Allocation and Assignment Techniques for High Throughput Signal Processing. Werner Geurts, Francky Catthoor, Hugo De Man |
| 1992 | Tools to Aid in Wiring Rule Generation for High Speed Interconnects. Paul D. Franzon, Slobodan Simovich, Michael B. Steer, Mark Basel, Sharad Mehrotra, Tom Mills |
| 1992 | Transformation-Based High-Level Synthesis of Fault-Tolerant ASICs. Ramesh Karri, Alex Orailoglu |
| 1992 | Transient Simulation of Lossy Interconnect. Shen Lin, Ernest S. Kuh |
| 1992 | Two New Techniques for Compiled Multi-Delay Logic Simulation. Yun Sik Lee, Peter M. Maurer |
| 1992 | Validating Discrete Event Simulations Using Event Pattern Mappings. Benoit A. Gennart, David C. Luckham |
| 1992 | Which ASIC Technology Will Dominate the 1990's (Panel Abstract). Ronald Collet |
| 1992 | Why Data Models Will Become the Fastest Growing Segment of the EDA Market (Panel Abstract). William Lattin |
| 1992 | Why is Today's CAD Inadequate for Designing Tomorrow's Computers (Panel Abstract). Arny Goldfein |
| 1992 | Why it doesn't work for CAD (Panel Abstract). Rick Potter |
| 1992 | Zero Delay versus Positive Delay in an Incremental Switch-Level Simulator. Larry G. Jones |
| 1992 | Zero Skew Clock Net Routing. Ting-Hai Chao, Yu-Chin Hsu, Jan-Ming Ho |