| 1991 | 3D Scheduling: High-Level Synthesis with Floorplanning. Jen-Pin Weng, Alice C. Parker |
| 1991 | A Branching Process Model for Observability Analysis of Combinational Circuits. Sarma Sastry, Amitava Majumdar |
| 1991 | A CAD System for the Design of Field Programmable Gate Arrays. Dwight D. Hill |
| 1991 | A Configuration Management System in a Data Management Framework. Steve Banks, Catherine Bunting, Russ Edwards, Laura Fleming, Peter Hackett |
| 1991 | A Constraint Based Approach to Automatic Design of Analog Cells. Louis-Oliver Donzelle, Pierre-François Dubois, B. Hennion, J. Parissis, Patrice Senn |
| 1991 | A Data Path Synthesis Method for Self-Testable Designs. Christos A. Papachristou, Scott Chiu, Haidar Harmanani |
| 1991 | A Design for Testability Scheme with Applications to Data Path Synthesis. Scott Chiu, Christos A. Papachristou |
| 1991 | A Fast Physical Constraint Generator for Timing Driven Layout. Wing K. Luk |
| 1991 | A Framework for Satisfying Input and Output Encoding Constraints. Alexander Saldanha, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1991 | A General Multi-Layer Area Router. Mohankumar Guruswamy, D. F. Wong |
| 1991 | A General Purpose Multiple Way Partitioning Algorithm. Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin |
| 1991 | A Global Router Using An Efficient Approximate Multicommodity Multiterminal Flow Algorithm. Robert C. Carden IV, Chung-Kuan Cheng |
| 1991 | A Heuristic Method for FPGA Technology Mapping Based on the Edge Visibility. Nam Sung Woo |
| 1991 | A Layout Improvement Method Based on Constraint Propagation for Analog LSI's. Masato Mogaki, Naoki Kato, Naomi Shimada, Yuriko Yamada |
| 1991 | A New Approach to Hierarchical Adaptation Using Sequence-Control Based on Cell Interactions. Matthias C. Utesch |
| 1991 | A New Hypergraph Based Rip-Up and Reroute Strategy. Manuela Raith, Marc Bartholomeus |
| 1991 | A New Nonlinear Driver Model for Interconnect Analysis. Vivek Raghavan, Ronald A. Rohrer |
| 1991 | A Probabilistic Testability Measure for Delay Faults. Wen Ching Wu, Chung-Len Lee |
| 1991 | A Resynthesis Approach for Network Optimization. Kuang-Chien Chen, Yusuke Matsunaga, Saburo Muroga, Masahiro Fujita |
| 1991 | A Semiconductor Wafer Representation Database and Its Use in the PREDITOR Process Editor and Statistical Simulator. D. M. H. Walker, Chris S. Kellen, Andrzej J. Strojwas |
| 1991 | A Synthesis-Based Test Generation and Compaction Algorithm for Multifaults. Srinivas Devadas, Kurt Keutzer, Sharad Malik |
| 1991 | A System for Fault Diagnosis and Simulation of VHDL Descriptions. Vijay Pitchumani, Pankaj Mayor, Nimish Radia |
| 1991 | A Technology Mapping Method Based On Perfect And Semi-Perfect Matchings. M. Crastes, K. Sakouti, Gabriele Saucier |
| 1991 | A Transitive Closure Based Algorithm for Test Generation. Srimat T. Chakradhar, Vishwani D. Agrawal |
| 1991 | A Transmission Line Simulator for GaAs Integrated Circuits. Javed Sabir Barkatullah, S. Chowdhury |
| 1991 | A Two-Dimensional Topological Compactor With Octagonal Geometry. Paul de Dood, John Wawrzynek, Erwin Liu, Roberto Suaya |
| 1991 | A Unified Approach for the Synthesis of Self-Testable Finite State Machines. Bernhard Eschermann, Hans-Joachim Wunderlich |
| 1991 | A Unified Approach to Input-Output Encoding for FSM State Assignment. Maciej J. Ciesielski, Jia-Jye Shen, Marc Davio |
| 1991 | ADAPTS: A Digital Transient Simulation Strategy for Integrated Circuits. Alexander D. Stein, Tuyen V. Nguyen, Binay J. George, Ronald A. Rohrer |
| 1991 | ATPG Based on a Novel Grid-Addressable Latch Element. Susheel J. Chandra, Tom Ferry, Tushar Gheewala, Kerry Pierce |
| 1991 | Accelerating Switch-Level Simulation by Function Caching. Larry G. Jones |
| 1991 | Algorithms for Fast, Memory Efficient Switch-Level Fault Simulation. Evstratios Vandris, Gerald E. Sobelman |
| 1991 | Algorithms for Synthesis of Hazard-Free Asynchronous Circuits. Luciano Lavagno, Kurt Keutzer, Alberto L. Sangiovanni-Vincentelli |
| 1991 | Amap: A Technology Mapper for Selector-Based Field-Programmable Gate Arrays. Kevin Karplus |
| 1991 | An Algorithm for Performance-Driven Initial Placement of Small-Cell ICs. Arvind Srinivasan |
| 1991 | An Analytic Net Weighting Approach for Performance Optimization in Circuit Placement. Ren-Song Tsay, Jürgen Koehl |
| 1991 | An ECL Logic Synthesis System. Van Morgan, David Gregory |
| 1991 | An Efficient Layout Style for 2-Metal CMOS Leaf Cells And Their Automatic Generation. Chi-Yi Hwang, Yung-Ching Hsieh, Youn-Long Lin, Yu-Chin Hsu |
| 1991 | An Efficient Parallel Critical Path Algorithm. Li-Ren Liu, David Hung-Chang Du, Hsi-Chuan Chen |
| 1991 | Analytical Placement: A Linear or a Quadratic Objective Function? Georg Sigl, Konrad Doll, Frank M. Johannes |
| 1991 | Are Formal Methods in Design for Real? (Panel Abstract). Gerd Venzl |
| 1991 | Automated Micro-Roll-back Self-Recovery Synthesis. Vijay Raghavendra, Chidchanok Lursinsap |
| 1991 | Automatic Generation of Compiled Simulations through Program Specialization. Wing Yee Au, Daniel Weise, Scott Seligman |
| 1991 | Automatic Synthesis of Asynchronous Circuits. Kuan-Jen Lin, Chen-Shang Lin |
| 1991 | Basic Concepts of Timing-oriented Design Automation for High-performance Mainframe Computers. Hidekazu Terai, Fumio Goto, Katsuro Wakai, Tokinori Kozawa, Mitsugu Edagawa, Satoshi Hososaka, Masahiro Hashimoto |
| 1991 | Benchmarks for Layout Synthesis - Evolution and Current Status. Krzysztof Kozminski |
| 1991 | Bottom Up Synthesis Based on Fuzzy Schedules. Tai A. Ly, Jack T. Mowchenko |
| 1991 | Branch-and-Bound Placement for Building Block Layout. Hidetoshi Onodera, Yo Taniguchi, Keikichi Tamaru |
| 1991 | Breadth-First Manipulation of SBDD of Boolean Functions for Vector Processing. Hiroyuki Ochi, Nagisa Ishiura, Shuzo Yajima |
| 1991 | Breaking the Barrier of Parallel Simulation of Digital Systems. Jack V. Briner Jr., John L. Ellis, Gershon Kedem |
| 1991 | Bridging High-Level Synthesis to RTL Technology Libraries. Nikil D. Dutt, James R. Kipps |
| 1991 | CHOP: A Constraint-Driven System-Level Partitioner. Kayhan Küçükçakar, Alice C. Parker |
| 1991 | CLOVER: A Timing Constraints Verification System. Dimitris Doukas, Andrea S. LaPaugh |
| 1991 | Cathedral-III: Architecture-Driven High-level Synthesis for High Throughput DSP Applications. Stefaan Note, Werner Geurts, Francky Catthoor, Hugo De Man |
| 1991 | Channel Density Reduction by Routing Over The Cells. Min-Siang Lin, Hourng-Wern Perng, Chi-Yi Hwang, Youn-Long Lin |
| 1991 | Chortle-crf: Fast Technology Mapping for Lookup Table-Based FPGAs. Robert J. Francis, Jonathan Rose, Zvonko G. Vranesic |
| 1991 | Constrained via Minimization with Practical Considerations for Multi-Layer VLSI/PCB Routing Problems. Sung-Chuan Fang, Kuo-En Chang, Wu-Shiung Feng, Sao-Jie Chen |
| 1991 | Constraint improvements for MILP-based hardware synthesis. Louis J. Hafer |
| 1991 | Control Optimization Based on Resynchronization of Operations. David C. Ku, Dave Filo, Giovanni De Micheli |
| 1991 | Correlation-Reduced Scan-path Design To Improve Delay Fault Coverage. Weiwei Mao, Michael D. Ciletti |
| 1991 | Creator: General and Efficient Multilevel Concurrent Fault Simulation. Pier Luca Montessoro, Silvano Gai |
| 1991 | Critical Path Selection for Performance Optimization. Hsi-Chuan Chen, David Hung-Chang Du, Li-Ren Liu |
| 1991 | Data-Path Synthesis Using Path Analysis. Reinaldo A. Bergamaschi, Raul Camposano, Michael Payer |
| 1991 | Datapath Scheduling for Two-Level Pipelining. C. Y. Roger Chen, Michael Z. Moricz |
| 1991 | Delay Test Effectiveness Evaluation of LSSD-Based VLSI Vogic Circuits. David M. Wu, Charles E. Radke |
| 1991 | Design Automation in the Soviet Union: History and Status (Abstract). Gennady G. Kazyonnov |
| 1991 | Design Flow Management in the NELSIS CAD Framework. K. Olav ten Bosch, Peter Bingley, Pieter van der Wolf |
| 1991 | Design Version Management in the GARDEN Framework. Flávio Rech Wagner, Arnaldo Hilário Viegas de Lima |
| 1991 | Dynamic Prediction of Critical Paths and Nets for Constructive Timing-Driven Placement. Suphachai Sutanthavibul, Eugene Shragowitz |
| 1991 | Efficient Simulation of Bipolar Digital ICs. Chandramouli Visweswariah, Ronald A. Rohrer |
| 1991 | Efficient Transient Simulation of Lossy Interconnect. Jaijeet S. Roychowdhury, Donald O. Pederson |
| 1991 | Empirical Evaluation of Some High-Level Synthesis Scheduling Heuristics. Rajiv Jain, Ashutosh Mujumdar, Alok Sharma, Hueymin Wang |
| 1991 | Enhanced Controllability for Tapan J. Chakraborty, Sudipta Bhawmik, Robert Bencivenga, Chih-Jen Lin |
| 1991 | Exact Width and Height Minimization of CMOS Cells. Robert L. Maziasz, John P. Hayes |
| 1991 | FSM Decomposition Revisited: Algebraic Structure Theory Applied to MCNC Benchmark FSMs. Martin Geiger, Thomas Müller-Wipperfürth |
| 1991 | Fast and Near Optimal Scheduling in Automatic Data Path Aynthesis. In-Cheol Park, Chong-Min Kyung |
| 1991 | Flexible Transistor Matrix (FTM). King C. Ho, Sarma Sastry |
| 1991 | Formal Hardware Verification by Symbolic Ternary Trajectory Evaluation. Randal E. Bryant, Derek L. Beatty, Carl-Johan H. Seger |
| 1991 | Framework Standards: How Important are They? (Panel Abstract). A. Richard Newton |
| 1991 | GOALSERVER: A Multiobjective Design Optimization Tool for IC Fabrication Process. Lifeng Wu, Zhilian Yang, Zhiping Yu, Zhijian Li |
| 1991 | Generation of Correlated Random Patterns for the Complete Testing of Synthesized Multi-level Circuits. Stephen Pateras, Janusz Rajski |
| 1991 | Generation of Performance Sensitivities for Analog Cell Layout. George Gad-El-Karim, Ronald S. Gyurcsik |
| 1991 | Global Stratgies for Electronic Design (Panel Abstract). Harvey Jones |
| 1991 | Graph Partitioning for Concurrent Test Scheduling in VLSI Circuit. Chien-In Henry Chen |
| 1991 | Heuristics to Compute Variable Orderings for Efficient Manipulation of Ordered Binary Decision Diagrams. Kenneth M. Butler, Don E. Ross, Rohit Kapur, M. Ray Mercer |
| 1991 | High-Performance Clock Routing Based on Recursive Geometric Aatching. Andrew B. Kahng, Jason Cong, Gabriel Robins |
| 1991 | ILLIADS: A New Fast MOS Timing Simulator Using Direct Equation-Solving Approach. Yung-Ho Shih, Sung-Mo Kang |
| 1991 | Implementing the Vision: Electronic Design in the 1990's (Panel Abstract). Andrew Rappaport |
| 1991 | Incremental Techniques for the Identification of Statically Sensitizable Critical Paths. Yun-Cheng Ju, Resve A. Saleh |
| 1991 | Incremental Tree Height Reduction for High Level Synthesis. Alexandru Nicolau, Roni Potasman |
| 1991 | Industrial Extensions to University High Level Synthesis Tools: Making It Work in the Real World. Thomas E. Fuhrman |
| 1991 | Intellectual Property (Panel Abstract). Michael C. McFarland |
| 1991 | Layout Driven Technology Mapping. Massoud Pedram, Narasimha B. Bhat |
| 1991 | Linking TCAD to EDA - Benefits and Issues. Goodwin R. Chin, Walter C. Dietrich Jr., Duane S. Boning, Alexander S. Wong, Andrew R. Neureuther, Robert W. Dutton |
| 1991 | Logic Minimization using Two-column Rectangle Replacement. Søren Søe, Kevin Karplus |
| 1991 | Logic Optimization of MOS Networks. Johnson Chan Limqueco, Saburo Muroga |
| 1991 | Logic Synthesis for Efficient Pseudoexhaustive Testability. Andrzej Krasniewski |
| 1991 | Mapping Switch-Level Simulation onto Gate-Level Hardware Accelerators. Alok Jain, Randal E. Bryant |
| 1991 | Minimizing the Number of Delay Buffers in the Synchronization of Pipelined Systems. Xiaobo Hu, Ronald G. Harber, Steven C. Bass |
| 1991 | Modeling and Simulation of High-Frequency Integrated Circuits Based on Scattering Parameters. Andrew T. Yang, C. H. Chan, Jack T. Yao, R. R. Daniels, J. P. Harrang |
| 1991 | New Algorithm for Over-the-Cell Channel Routing Using Vacant Terminals. Nancy D. Holmes, Naveed A. Sherwani, Majid Sarrafzadeh |
| 1991 | Novel Routing Schemes for IC Layout, Part I: Two-Layer Channel Routing. Deborah C. Wang |
| 1991 | OEsim: A Simulator for Timing Behavior. Tod Amon, Gaetano Borriello |
| 1991 | Object Oriented Lisp Implementation of the CHEOPS VLSI Floor Planning and Routing System. Christian Masson, Remy Escassut, Denis Barbier, Daniel Winer, Gregory Chevallier |
| 1991 | On Achieving a Complete Fault Coverage for Sequential Machines Using the Transition Fault Model. Irith Pomeranz, Sudhakar M. Reddy |
| 1991 | On Minimal Closure Constraint Generation for Symbolic Cell Assembly. Debaprosad Dutt, Chi-Yuan Lo |
| 1991 | On Minimizing the Number of L-Shaped Channels. Yang Cai, D. F. Wong |
| 1991 | On Removing Redundancy in Sequential Circuits. Kwang-Ting Cheng |
| 1991 | Optimal Ordering of Analog Integrated Circuit Tests to Minimize Test Time. Scott D. Huss, Ronald S. Gyurcsik |
| 1991 | Parallel Test Generation for Sequential Circuits on General-Purpose Multiprocessors. Srinivas Patil, Prithviraj Banerjee, Janak H. Patel |
| 1991 | Placement for Clock Period Minimization With Multiple Wave Propagation. Donald A. Joy, Maciej J. Ciesielski |
| 1991 | Probabilistic CTSS: Analysis of Timing Error Probability in Asynchronous Logic Circuits. Yutaka Deguchi, Nagisa Ishiura, Shuzo Yajima |
| 1991 | Proceedings of the 28th Design Automation Conference, San Francisco, California, USA, June 17-21, 1991. A. Richard Newton |
| 1991 | Proof-Aided Design of Verified Hardware. Holger Busch, Gerd Venzl |
| 1991 | Propagation Delay Calculation for Interconnection Nets on Printed Circuit Boards by Reflected Waves. Heinz Mattes, Wolfgang Weisenseel, Gerhard Bischof, Reimund Dachauer |
| 1991 | REX - A VLSI Parasitic Extraction Tool for Electromigration and Signal Analysis. Jerry P. Hwang |
| 1991 | RICE: Rapid Interconnect Circuit Evaluator. Curtis L. Ratzlaff, Nanda Gopal, Lawrence T. Pillage |
| 1991 | Redundant Operator Creation: A Scheduling Optimization Technique. Donald A. Lobo, Barry M. Pangrle |
| 1991 | Relevant Issues in High-Level Connectivity Synthesis. Barry M. Pangrle, Forrest Brewer, Donald A. Lobo, Andrew Seawright |
| 1991 | Representing Circuits More Efficiently in Symbolic Model Checking. Jerry R. Burch, Edmund M. Clarke, David E. Long |
| 1991 | Robust Delay-Fault Test Generation and Synthesis for Testability Under A Standard Scan Design Methodology. Kwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer |
| 1991 | Routability of a Rubber-Band Sketch. Wayne Wei-Ming Dai, Raymond Kong, Masao Sato |
| 1991 | Routing the 3-D Chip. Richard J. Enbody, Gary Lynn, Kwee Heong Tan |
| 1991 | SIDECAR: Design Support for Reliability. Charles R. Yount, Daniel P. Siewiorek |
| 1991 | Scheduling for Functional Pipelining and Loop Winding. Cheng-Tsung Hwang, Yu-Chin Hsu, Youn-Long Lin |
| 1991 | Sequential Circuit Fault Simulation by Fault Information Tracing Algorithm: FIT. Yoshihiro Kitamura |
| 1991 | Simultaneous Scheduling and Allocation for Cost Constrained Optimal Architectural Synthesis. Catherine H. Gebotys, Mohamed I. Elmasry |
| 1991 | Sizing Synchronization Queues: A Case Study in Higher Level Synthesis. Tod Amon, Gaetano Borriello |
| 1991 | Synthesis of Application-Specific Multiprocessor Architectures. Shiv Prakash, Alice C. Parker |
| 1991 | Synthesis of Multiple-Input Change Asynchronous Finite state Machines. Maureen Ladd, William P. Birmingham |
| 1991 | Technology Mapping for Electrically Programmable Gate Arrays. Silvia Ercolani, Giovanni De Micheli |
| 1991 | Testability Solutions: Who Really Wants Them? (Panel Abstract). Alberto L. Sangiovanni-Vincentelli |
| 1991 | Testability of Asynchronous Timed Control Circuits with Delay Assumptions. Peter A. Beerel, Teresa H.-Y. Meng |
| 1991 | The Effects of Physical Design Characteristics on the Area-Performance Tradeoff Curve. Alice C. Parker, Pravil Gupta, Agha Hussain |
| 1991 | The Interdependence Between Delay-Optimization of Synthesized Networks and Testing. Thomas W. Williams, Bill Underwood, M. Ray Mercer |
| 1991 | The MCC CAD Framework Methodology Management System. Wayne Allen, Douglas Rosenthal, Kenneth W. Fiduk |
| 1991 | The Role of Timing Verification in Layout Synthesis. Jacques Benkoski, Andrzej J. Strojwas |
| 1991 | Timing Optimization on Mapped Circuits. Ko Yoshikawa, Hiroshi Ichiryu, Hisato Tanishita, Shigenobu Suzuki, Nobuyoshi Nomizu, Akira Kondoh |
| 1991 | Timing Verification on a 1.2M-Device Full-Custom CMOS Design. Jengwei Pan, Larry L. Biro, Joel Grodstein, William J. Grundmann, Yao-Tsung Yen |
| 1991 | Timing- and Constraint-Oriented Placement for Interconnected LSIs in Mainframe Design. Yasushi Ogawa, Tsutomu Itoh, Yoshio Miki, Tatsuki Ishii, Yasuo Sato, Reiji Toyoshima |
| 1991 | Topological Routing in SURF: Generating a Rubber-Band sketch. Wayne Wei-Ming Dai, Tal Dayan, David Staepelaere |
| 1991 | Transition Density, A Stochastic Measure of Activity in Digital Circuits. Farid N. Najm |
| 1991 | Using BDDs to Verify Multipliers. Jerry R. Burch |
| 1991 | Utilizing Logic Information in Multi-Level Timing Simulation. Marko P. Chew, Andrzej J. Strojwas |
| 1991 | VLSI Layout Compaction Using Radix Priority Search Trees. Andrew J. Harrison |
| 1991 | What is Design for Manufacturability (DFM)? (Panel Abstract). Wojciech Maly |
| 1991 | Will the Field-Programmable Gata Array Replace the Mask-Programmable Gate Array? (Panel Abstract). Jonathan Rose |
| 1991 | Xmap: A Technology Mapper for Table-Lookup Field-Programmable Gate Arrays. Kevin Karplus |