| 1988 | A Channelless, Multilayer Router. R. Eric Lunow |
| 1988 | A Circuit Comparison System with Rule-Based Functional Isomorphism Checking. Makoto Takashima, Atsuhiko Ikeuchi, Shoichi Kojima, Toshikazu Tanaka, Tamaki Saitou, Jun-ichi Sakata |
| 1988 | A Context Mechanism to Control Sharing in a Design Database. Denise J. Ecklund, Fred M. Tonge |
| 1988 | A Data Structure for Circuit Net Lists. Steve Meyer |
| 1988 | A Database Management System for a VLSI Design System. Gwo-Dong Chen, Tai-Ming Parng |
| 1988 | A Defect-Tolerant and Fully Testable PLA. Norbert Wehn, Manfred Glesner, K. Caesar, P. Mann, A. Roth |
| 1988 | A Digit-Serial Silicon Compiler. Richard I. Hartley, Peter F. Corbett |
| 1988 | A Dynamically-Directed Switch Model for MOS Logic Simulation. Dan Adler |
| 1988 | A Fast Algorithm to Minimize Multi-Output Mixed-Polarity Generalized Reed-Muller Forms. Martin Helliwell, Marek A. Perkowski |
| 1988 | A Graph Compaction Approach to Fault Simulation. Dov Harel, Balakrishnan Krishnamurthy |
| 1988 | A Graphical Hardware Design Language. Paul J. Drongowski, Jwahar R. Bami, Ranganathan Ramaswamy, Sundar Iyengar, Tsu-Hua Wang |
| 1988 | A High Packing Density Module Generator for CMOS Logic Cells. Yoichi Shiraishi, Jun'ya Sakemi, Makoto Kutsuwada, Akira Tsukizoe, Takashi Satoh |
| 1988 | A Human Machine Interface for Silicon Compilation. Gotaro Odawara, Masahiro Tomita, Kazuhiko Hattori, Osamu Okuzawa, Toshiaki Hirata, Masayasu Ochiai |
| 1988 | A Kernel-Finding State Assignment Algorithm for Multi-Level Logic. Wayne H. Wolf, Kurt Keutzer, Janaki Akella |
| 1988 | A Method of Delay Fault Test Generation. C. Thomas Glover, M. Ray Mercer |
| 1988 | A Module Area Estimator for VLSI Layout. Xinghao Chen, Michael L. Bushnell |
| 1988 | A New Approach to the Pin Assignment Problem. Xianji Yao, Masaaki Yamada, C. L. Liu |
| 1988 | A New Area and Shape Function Estimation Technique for VLSI Layouts. Gerhard Zimmermann |
| 1988 | A New Two Task Algorithm for Clock Mode Fault Simulation in Sequential Circuits. Fredrick J. Hill, Eltayeb Abuelyamen, Wei-Kang Huang, Guo-Qiang Shen |
| 1988 | A Notation for Describing Multiple Views of VLSI Circuits. Jean-Loup Baer, Meei-Chiueh Liem, Larry McMurchie, Rudolf Nottrott, Lawrence Snyder, Wayne Winder |
| 1988 | A Path Selection Algorithm for Timing Analysis. H. C. Yen, Subbarao Ghanta, David Hung-Chang Du |
| 1988 | A Programmable Hardware Accelerator for Compiled Electrical Simulation. David M. Lewis |
| 1988 | A Prolog-Based Connectivity Verification Tool. Alexander C. Papaspyrdis |
| 1988 | A Quadratic Metric with a Simple Solution Scheme for Initial Placement. Lawrence T. Pillage, Ronald A. Rohrer |
| 1988 | A Structural Representation for VLSI Design. Richard Barth, Bertrand Serlet |
| 1988 | ATV: An Abstract Timing Verifier. David E. Wallace, Carlo H. Séquin |
| 1988 | Advances in Functional Abstraction from Structure. Richard H. Lathrop, Robert J. Hall, Gavan Duffy, K. Mark Alexander, Robert S. Kirk |
| 1988 | Algorithm for Vectorizing Logic Simulation and Evaluation of "VELVET" Performance. Yoshiharu Kazama, Yoshiaki Kinoshita, Motonobu Nagafuji, Hiroshi Murayama |
| 1988 | Algorithms for Timing Requirement Analysis and Generation. Steven K. Sherman |
| 1988 | An Accurate and Efficient Gate Level Delay Calculator for MOS Circuits. Foong-Charn Chang, Chin-Fu Chen, Prasad Subramaniam |
| 1988 | An Approach to Fast Hierarchical Fault Simulation. Akira Motohara, Motohide Murakami, Miki Urano, Yasuo Masuda, Masahide Sugano |
| 1988 | An Automated BIST Approach for General Sequential Logic Synthesis. Charles E. Stroud |
| 1988 | An Efficient Compactor for 45° Layout. David Marple, Michiel Smulders, Henk Hegen |
| 1988 | An Electrical Optimizer that Considers Physical Layout. Fred W. Obermeier, Randy H. Katz |
| 1988 | An Empirical Study of On-chip Parallelism. Mary L. Bailey, Lawrence Snyder |
| 1988 | An Enhanced Data Model for CAD/CAM Database Systems. Ying-Kuei Yang |
| 1988 | An Interactive Maze Router with Hints. Michael H. Arnold, Walter S. Scott |
| 1988 | Analog Compilation Based on Successive Decompositions. E. Berkcan, Manuel A. d'Abreu, W. Laughton |
| 1988 | Analyzing CMOS Power Supply Networks Using Ariel. Don Stark, Mark Horowitz |
| 1988 | Automated Design Software for Switched-Capacitor IC's with Symbolic Simulator SCYMBAL. Agnieszka Konczykowska, M. Bon |
| 1988 | Automatic Building of Graphs for Rectangular Dualisation. Marwan A. Jabri |
| 1988 | Automatic Functional Test Program Generation for Microprocessors. Chen-Shang Lin, Hong-Fa Ho |
| 1988 | Automatic Insertion of BIST Hardware Using VHDL. Kwanghyun Kim, Joseph G. Tront, Dong Sam Ha |
| 1988 | Automatic Layout Procedures for Serial Routing Devices. Yasushi Ogawa, Hidekazu Terai, Tokinori Kozawa |
| 1988 | Automating the Design of Electronic Packaging (tutorial). Barry Whalen |
| 1988 | BECOME: Behavior Level Circuit Synthesis Based on Structure Mapping. Ruey-Sing Wei, Steven G. Rothweiler, Jing-Yang Jou |
| 1988 | Behavioral Modeling for System Design (panel). Tom Blank |
| 1988 | Bridge: A Versatile Behavioral Synthesis System. Chia-Jeng Tseng, Ruey-Sing Wei, Steven G. Rothweiler, Michael M. Tong, Ajoy K. Bose |
| 1988 | Browsing in Chip Design Database. David Gedye, Randy H. Katz |
| 1988 | CAD Tool Needs for System Designers. Randal E. Bryant |
| 1988 | CATAPULT: Concurrent Automatic Testing Allowing Parallelization and Using Limited Topology. Rhonda Kay Gaede, Don E. Ross, M. Ray Mercer, Kenneth M. Butler |
| 1988 | CORAL II: Linking Behavior and Structure in an IC Design System. Robert L. Blackburn, Donald E. Thomas, Patti M. Koenig |
| 1988 | Chip-Planning, Placement, and Global Routing of Macro/Custom Cell Integrated Circuits Using Simulated Annealing. Carl Sechen |
| 1988 | Circuit Compilers don't have to be Slow. William C. Diss |
| 1988 | Clock Event Suppression Algorithm of VELVET and Its Application to S-820 Development. Yoshio Takamine, Shunsuke Miyamoto, Shigeo Nagashima, Masayuki Miyoshi, Shun Kawabe |
| 1988 | Clustering Based Simulated Annealing for Standard Cell Placement. Sivanarayana Mallela, Lov K. Grover |
| 1988 | Compaction with Incremental Over-Constraint Resolution. Werner L. Schiele |
| 1988 | Concurrency Control in a VLSI Design Database. Ing Widya, T. G. R. M. van Leuken, Pieter van der Wolf |
| 1988 | Connectivity Biased Channel Construction and Ordering for Building-Block Layout. H. Cai |
| 1988 | Constraint Propagation in an Object-Oriented IC Design Environment. Tai A. Ly, Emil F. Girczyc |
| 1988 | Contest: A Concurrent Test Generator for Sequential Circuits. Vishwani D. Agrawal, Kwang-Ting Cheng, Prathima Agrawal |
| 1988 | DECOMPOSER: A Synthesizer for Systolic Systems. Pao-Po Hou, Robert Michael Owens, Mary Jane Irwin |
| 1988 | Delay Modeling and Time of Bipolar Digital Circuits. Daniel G. Saab, Andrew T. Yang, Ibrahim N. Hajj |
| 1988 | Design Automation for the Component Parts Industry. Sheldon S. L. Chang |
| 1988 | Design Process Model in the Yorktown Silicon Compiler. Raul Camposano |
| 1988 | Dytest: A Self-Learning Algorithm Using Dynamic Testability Measures to Accelerate Test Generation. Weiwei Mao, Michael D. Ciletti |
| 1988 | Fast Algorithm for Optimal Layer Assignment. Yue-Sun Kuo, T. C. Chern, Wei-Kuan Shih |
| 1988 | Fast Incremental Circuit Analysis Using Extracted Hierarchy. Derek L. Beatty, Randal E. Bryant |
| 1988 | Fault Simulation in a Distributed Environment. Patrick A. Duba, Rabindra K. Roy, Jacob A. Abraham, William A. Rogers |
| 1988 | Formal Specification and Verification of Hardware: A Comparative Case Study. Victoria Stavridou, Howard Barringer, David A. Edwards |
| 1988 | Formal Verification of the Sobel Image Processing Chip. Paliath Narendran, Jonathan Stillman |
| 1988 | Future Computing Environments for DA (panel). Andrew Rappaport |
| 1988 | Future Developments in Information Technology (abstract). Ian M. Ross |
| 1988 | HERCULES - a System for High-Level Synthesis. Giovanni De Micheli, David C. Ku |
| 1988 | Hardware Logic Simulation by Compilation. Craig Hansen |
| 1988 | High-Level Synthesis: Current Status and Future Directions. Gaetano Borriello, Ewald Detjens |
| 1988 | How to Obtain More Compactable Channel Routing Solutions. Jingsheng Cong, D. F. Wong |
| 1988 | Improved Channel Routing by Via Minimization and Shifting. Chung-Kuan Cheng, David N. Deutsch |
| 1988 | Improved Methods of Simulating RLC Couple and Uncoupled Transmission Lines Based on the Method of Characteristics. Carol V. Gura, Jacob A. Abraham |
| 1988 | Incremental-in-time Algorithm for Digital Simulation. Kiyoung Choi, Sun Young Hwang, Tom Blank |
| 1988 | LOGEX - an Automatic Logic Extractor Form Transistor to Gate Level for CMOS Technology. Michael Boehner |
| 1988 | LocusRoute: A Parallel Global Router for Standard Cells. Jonathan Rose |
| 1988 | Logic Simulation System Using Simulation Processor (SP). Minoru Saitoh, Kenji Iwata, Akiko Nokamura, Makoto Kakegawa, Junichi Masuda, Hirofumi Hamamura, Fumiyasu Hirose, Nobuaki Kawato |
| 1988 | MILO: A Microarchitecture and Logic Optimizer. Nels Vander Zanden, Daniel Gajski |
| 1988 | Mask Verification on the Connection Machine. Erik C. Carlson, Rob A. Rutenbar |
| 1988 | Micro-operation Perturbations in Chip Level Fault Modeling. Chien-Hung Chao, F. Gail Gray |
| 1988 | Model Development and Verification for High Level Analog Blocks. Chandramouli Visweswariah, Rakesh Chadha, Chin-Fu Chen |
| 1988 | Module Selection for Pipelined Synthesis. Rajiv Jain, Alice C. Parker, Nohbyung Park |
| 1988 | Multi-Pads, Single Layer Power Net Routing in VLSI Circuits. H. Cai |
| 1988 | Object Type Oriented Data Modeling for VLSI Data Management. Pieter van der Wolf, T. G. R. M. van Leuken |
| 1988 | On Path Selection in Combinational Logic Circuits. Wing Ning Li, Sudhakar M. Reddy, Sartaj Sahni |
| 1988 | Opportunities in Computer Integrated Manufacturing. David A. Hodges |
| 1988 | Optimal Aspect Ratios of Building Blocks in VLSI. Shmuel Wimer, Israel Koren, Israel Cederbaum |
| 1988 | PLAYGROUND: Minimization of PLAs with Mixed Ground True Outputs. Chin-Long Wey, Tsin-Yuan Chang |
| 1988 | Parallel Channel Routing. Mehdi R. Zargham |
| 1988 | Parallel Logic Simulation on General Purpose Machines. Larry Soulé, Tom Blank |
| 1988 | Parallel Placement on Reduced Array Architecture. C. P. Ravikumar, Sarma Sastry |
| 1988 | Parameterized Schematics. Richard Barth, Bertrand Serlet, Pradeep S. Sindhu |
| 1988 | Patchwork: Layout from Schematic Annotations. Richard Barth, Louis Monier, Bertrand Serlet |
| 1988 | Pattern-Independent Current Estimation for Reliability Analysis of CMOS Circuits. Richard Burch, Farid N. Najm, Ping Yang, Dale E. Hocevar |
| 1988 | Pearl: A CMOS Timing Analyzer. James J. Cherry |
| 1988 | Performance of a New Annealing Schedule. Jimmy Lam, Jean-Marc Delosme |
| 1988 | Proceedings of the 25th ACM/IEEE Conference on Design Automation, DAC '88, Anaheim, CA, USA, June 12-15, 1988. Dennis W. Shaklee, A. Richard Newton |
| 1988 | Proud: A Fast Sea-of-Gates Placement Algorithm. Ren-Song Tsay, Ernest S. Kuh, Chi-Ping Hsu |
| 1988 | Proving Circuit Correctness Using Formal Comparison Between Expected and Extracted Behaviour. Jean Christophe Madre, Jean-Paul Billon |
| 1988 | RISCE - A Reduced Instruction Set Circuit Extractor for Hierarchical VLSI Layout Verification. Volker Henkel, Ulrich Golze |
| 1988 | Recursive Channel Router. Walter Heyns, K. Van Nieuwenhove |
| 1988 | Routing Algorithm for Gate Array Macro Cells. Atreyi Chakraverti, Moon-Jung Chung |
| 1988 | SMART: Tools and Methods for Synthesis of VLSI Chips with Processor Architecture. Thomas Bergstraesser, Jürgen Gessner, Karlheinz Hafner, Stefan Wallstab |
| 1988 | SOLO: A Generator of Efficient Layouts from Optimized MOS Circuit Schematics. Donald G. Baltus, Jonathan Allen |
| 1988 | Spare Allocation and Reconfiguration in Large Area VLSI. Sy-Yen Kuo, W. Kent Fuchs |
| 1988 | Splicer: A Heuristic Approach to Connectivity Binding. Barry M. Pangre |
| 1988 | Split Circuit Model for Test Generation. Wu-Tung Cheng |
| 1988 | Switch Level Random Pattern Testability Analysis. Mehmet A. Cirit |
| 1988 | Symbolic Layout Compaction Review. David G. Boyer |
| 1988 | The Architecture of a Highly Integrated Simulation System. Michel Heydemann, Alain Plaignaud, Daniel Dure |
| 1988 | The Constrained Via Minimization Problem for PCB and VLSI Design. Xiao-Ming Xiong, Ernest S. Kuh |
| 1988 | The IBM Engineering Verification Engine. Daniel K. Beece, George Deibert, Georgina Papp, Frank Villante |
| 1988 | The Min-cut Shuffle: Toward a Solution for the Global Effect Problem of Min-cut Placement. Inderpal S. Bhandari, Mark Hirsch, Daniel P. Siewiorek |
| 1988 | The Performance of the Concurrent Fault Simulation Algorithms in MOZART. Silvano Gai, Pier Luca Montessoro, Fabio Somenzi |
| 1988 | The Role of VHDL in the MCC CAD System. Ramón D. Acosta, Mark Alexandre, Gary Imken, Bill Read |
| 1988 | The System Architect's Workbench. Donald E. Thomas, Elizabeth M. Dirkes, Robert A. Walker, Jayanth V. Rajan, John A. Nestor, Robert L. Blackburn |
| 1988 | The Use of Petri Nets for Modeling Pipelined Processors. Rami R. Razouk |
| 1988 | Time Efficient VLSI Artwork Analysis Algorithms in GOALIE2. Kuang-Wei Chiang, Surendra Nahar, Chi-Yuan Lo |
| 1988 | Tutorial on High-Level Synthesis. Michael C. McFarland, Alice C. Parker, Raul Camposano |
| 1988 | Twenty-Five Years of Electronic Design Automation. A. Richard Newton |
| 1988 | VHDL: A Call for Standards. David R. Coelho |
| 1988 | VLSI Design Synthesis with Testability. Catherine H. Gebotys, Mohamed I. Elmasry |
| 1988 | Verification of VHDL Designs Using VAL. Larry M. Augustin, Benoit A. Gennart, Youm Huh, David C. Luckham, Alec G. Stanculescu |
| 1988 | Versions and Change Notification in an Object-Oriented Database System. Hong-Tai Chou, Won Kim |
| 1988 | What Is a Design Automation Framework, Anyway? (panel). Wayne H. Wolf |
| 1988 | Why Partial Design Verification Works Better Than It Should. Jacob Savir |
| 1988 | Will Cell Generation Displace Standard Cells? Alfred E. Dunlop |