DAC A*

178 papers

YearTitle / Authors
20173 Channel Dependency-Based Power Model for Mobile AMOLED Displays.
Seongwoo Hong, Suk-Won Kim, Young-Jin Kim
2017A 700fps Optimized Coarse-to-Fine Shape Searching Based Hardware Accelerator for Face Alignment.
Qiang Wang, Leibo Liu, Wenping Zhu, Huiyu Mo, Chenchen Deng, Shaojun Wei
2017A Clock Skewing Strategy to Reduce Power and Area of ASIC Circuits.
Niranjan Kulkarni, Aykut Dengi, Sarma B. K. Vrudhula
2017A Clock Tree Optimization Framework with Predictable Timing Quality.
Rickard Ewetz
2017A Comprehensive Framework for Synthesizing Stencil Algorithms on FPGAs using OpenCL Model.
Shuo Wang, Yun Liang
2017A Discrete Model for Networked Labs-on-Chips: Linking the Physical World to Design Automation.
Andreas Grimmer, Werner Haselmayr, Andreas Springer, Robert Wille
2017A Fast and Power Efficient Architecture to Parallelize LSTM based RNN for Cognitive Intelligence Applications.
Peng Ouyang, Shouyi Yin, Shaojun Wei
2017A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications.
Sebastian Haas, Tobias Seifert, Benedikt Nöthen, Stefan Scholze, Sebastian Höppner, Andreas Dixius, Esther Pérez Adeva, Thomas R. Augustin, Friedrich Pauls, Sadia Moriam, Mattis Hasler, Erik Fischer, Yong Chen, Emil Matús, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Love Cederström, Dennis Walter, Stephan Henker, Stefan Hänzsche, Johannes Uhlig, Holger Eisenreich, Stefan Weithoffer, Norbert Wehn, René Schüffny, Christian Mayr, Gerhard P. Fettweis
2017A Kernel Decomposition Architecture for Binary-weight Convolutional Neural Networks.
Hyeonuk Kim, Jaehyeong Sim, Yeongjae Choi, Lee-Sup Kim
2017A New Paradigm for Synthesis of Linear Decompressors.
Emil Gizdarski, Peter Wohl, John A. Waicukauski
2017A New Stochastic Computing Multiplier with Application to Deep Convolutional Neural Networks.
Hyeon Uk Sim, Jongeun Lee
2017A Novel ReRAM-based Main Memory Structure for Optimizing Access Latency and Reliability.
Yang Zhang, Dan Feng, Jingning Liu, Wei Tong, Bing Wu, Caihua Fang
2017A Pathway to Enable Exponential Scaling for the Beyond-CMOS Era: Invited.
Jianping Wang, Sachin S. Sapatnekar, Chris H. Kim, Paul A. Crowell, Steven J. Koester, Supriyo Datta, Kaushik Roy, Anand Raghunathan, Xiaobo Sharon Hu, Michael T. Niemier, Azad Naeemi, Chia-Ling Chien, Caroline A. Ross, Roland Kawakami
2017A Scaling Compatible, Synthesis Friendly VCO-based Delta-sigma ADC Design and Synthesis Methodology.
Biying Xu, Shaolan Li, Nan Sun, David Z. Pan
2017A Spectral Graph Sparsification Approach to Scalable Vectorless Power Grid Integrity Verification.
Zhiqiang Zhao, Zhuo Feng
2017A Systems Approach to Computing in Beyond CMOS Fabrics: Invited.
Ameya Patil, Naresh R. Shanbhag, Lav R. Varshney, Eric Pop, H.-S. Philip Wong, Subhasish Mitra, Jan M. Rabaey, Jeffrey A. Weldon, Larry T. Pileggi, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young
2017A Testbed to Verify the Timing Behavior of Cyber-Physical Systems: Invited.
Aviral Shrivastava, Mohammadreza Mehrabian, Mohammad Khayatian, Patricia Derler, Hugo A. Andrade, Kevin B. Stanton, Ya-Shian Li-Baboud, Edward R. Griffor, Marc Weiss, John C. Eidson
2017A-TEAM: Automatic template-based assertion miner.
Alessandro Danese, Nicolò Dalla Riva, Graziano Pravadelli
2017ASSURE: Authentication Scheme for SecURE Energy Efficient Non-Volatile Memories.
Joydeep Rakshit, Kartik Mohanram
2017Accelerating Graph Community Detection with Approximate Updates via an Energy-Efficient NoC.
Karthi Duraisamy, Hao Lu, Partha Pratim Pande, Ananth Kalyanaraman
2017Accelerator Design for Deep Learning Training: Extended Abstract: Invited.
Ankur Agrawal, Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Jinwook Oh, Sunil Shukla, Viji Srinivasan, Swagath Venkataramani, Wei Zhang
2017Accurate High-level Modeling and Automated Hardware/Software Co-design for Effective SoC Design Space Exploration.
Wei Zuo, Louis-Noël Pouchet, Andrey Ayupov, TaeMin Kim, Chung-Wei Lin, Shinichi Shiraishi, Deming Chen
2017Adaptation of Enhanced TSV Capacitance as Membrane Property in 3D Brain-inspired Computing System.
M. Amimul Ehsan, Hongyu An, Zhen Zhou, Yang Yi
2017Adaptive Thermal Management for 3D ICs with Stacked DRAM Caches.
Dawei Li, Kaicheng Zhang, Akhil Guliani, Seda Ogrenci Memik
2017Advances in Formal Methods for the Design of Analog/Mixed-Signal Systems: Invited.
Vladimir Dubikhin, Chris J. Myers, Danil Sokolov, Ioannis Syranidis, Alexandre Yakovlev
2017Age-aware Logic and Memory Co-Placement for RRAM-FPGAs.
Yuan Xue, Chengmo Yang, Jingtong Hu
2017An Architecture for Learning Stream Distributions with Application to RNG Testing.
Alric Althoff, Ryan Kastner
2017An Efficient Memristor-based Distance Accelerator for Time Series Data Mining on Data Centers.
Xiaowei Xu, Dewen Zeng, Wenyao Xu, Yiyu Shi, Yu Hu
2017An Ultra-Low Power Address-Event Sensor Interface for Energy-Proportional Time-to-Information Extraction.
Alfio Di Mauro, Francesco Conti, Luca Benini
2017Analyzing Hardware Based Malware Detectors.
Nisarg Patel, Avesta Sasan, Houman Homayoun
2017Arbitrary Precision and Complexity Tradeoffs for Gate-Level Information Flow Tracking.
Andrew Becker, Wei Hu, Yu Tai, Philip Brisk, Ryan Kastner, Paolo Ienne
2017ArchEx: An Extensible Framework for the Exploration of Cyber-Physical System Architectures.
Dmitrii Kirov, Pierluigi Nuzzo, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli
2017Automated Systolic Array Architecture Synthesis for High Throughput CNN Inference on FPGAs.
Xuechao Wei, Cody Hao Yu, Peng Zhang, Youxiang Chen, Yuxin Wang, Han Hu, Yun Liang, Jason Cong
2017Bandwidth Optimization Through On-Chip Memory Restructuring for HLS.
Jason Cong, Peng Wei, Cody Hao Yu, Peipei Zhou
2017Boosting the Performance of 3D Charge Trap NAND Flash with Asymmetric Feature Process Size Characteristic.
Shuo-Han Chen, Yen-Ting Chen, Hsin-Wen Wei, Wei-Kuan Shih
2017CFPU: Configurable Floating Point Multiplier for Energy-Efficient Computing.
Mohsen Imani, Daniel Peroni, Tajana Rosing
2017Closing the Accuracy Gap of Static Performance Analysis of Asynchronous Circuits.
Cheng-Yu Shih, Chun-Hong Shih, Jie-Hong R. Jiang
2017Co-training of Feature Extraction and Classification using Partitioned Convolutional Neural Networks.
Wei-Yu Tsai, Jinhang Choi, Tulika Parija, Priyanka Gomatam, Chita R. Das, John Sampson, Vijaykrishnan Narayanan
2017Compiler Techniques to Reduce the Synchronization Overhead of GPU Redundant Multithreading.
Manish Gupta, Daniel Lowell, John Kalamatianos, Steven Raasch, Vilas Sridharan, Dean M. Tullsen, Rajesh K. Gupta
2017Component-Oriented High-level Synthesis for Continuous-Flow Microfluidics Considering Hybrid-Scheduling.
Mengchu Li, Tsun-Ming Tseng, Bing Li, Tsung-Yi Ho, Ulf Schlichtmann
2017Concurrent Pin Access Optimization for Unidirectional Routing.
Xiaoqing Xu, Yibo Lin, Vinicius S. Livramento, David Z. Pan
2017Convergence-Boosted Graph Partitioning using Maximum Spanning Trees for Iterative Solution of Large Linear Circuits.
Ya Wang, Wenrui Zhang, Peng Li, Jian Gong
2017Cooperative DVFS for energy-efficient HEVC decoding on embedded CPU-GPU architecture.
Fan Gong, Lei Ju, Deshan Zhang, Mengying Zhao, Zhiping Jia
2017Correlated Rare Failure Analysis via Asymptotic Probability Evaluation.
Jun Tao, Handi Yu, Dian Zhou, Yangfeng Su, Xuan Zeng, Xin Li
2017Coupled circuit/EM simulation for radio frequency circuits.
Kai Bittner, Hans Georg Brachtendorf, Wim Schoenmaker, Pascal Reynier
2017Cross-level Monte Carlo Framework for System Vulnerability Evaluation against Fault Attack.
Meng Li, Liangzhen Lai, Vikas Chandra, David Z. Pan
2017Crossroads: Time-Sensitive Autonomous Intersection Management Technique.
Edward Andert, Mohammad Khayatian, Aviral Shrivastava
2017Cryo-CMOS Electronic Control for Scalable Quantum Computing: Invited.
Fabio Sebastiano, Harald Homulle, Bishnu Patra, Rosario M. Incandela, Jeroen P. G. van Dijk, Lin Song, Masoud Babaie, Andrei Vladimirescu, Edoardo Charbon
2017Cryptography for Next Generation TLS: Implementing the RFC 7748 Elliptic Curve448 Cryptosystem in Hardware.
Pascal Sasdrich, Tim Güneysu
2017DIMP: A Low-Cost Diversity Metric Based on Circuit Path Analysis.
Sergi Alcaide, Carles Hernández, Antoni Roca, Jaume Abella
2017Dadu: Accelerating Inverse Kinematics for High-DOF Robots.
Shiqi Lian, Yinhe Han, Ying Wang, Yungang Bao, Hang Xiao, Xiaowei Li, Ninghui Sun
2017Dealing with Uncertainties in Analog/Mixed-Signal Systems: Invited.
Christoph Grimm, Michael Rathmair
2017Deep Reinforcement Learning for Building HVAC Control.
Tianshu Wei, Yanzhi Wang, Qi Zhu
2017Deep3: Leveraging Three Levels of Parallelism for Efficient Deep Learning.
Bita Darvish Rouhani, Azalia Mirhoseini, Farinaz Koushanfar
2017Delay Locking: Security Enhancement of Logic Locking against IC Counterfeiting and Overproduction.
Yang Xie, Ankur Srivastava
2017Design Methodology for Thin-Film Transistor Based Pseudo-CMOS Logic Array with Multi-Layer Interconnect Architecture.
Qinghang Zhao, Yongpan Liu, Wenyu Sun, Jiaqing Zhao, Hailong Yao, Xiaojun Guo, Huazhong Yang
2017Design of an Energy-Efficient Accelerator for Training of Convolutional Neural Networks using Frequency-Domain Computation.
Jong Hwan Ko, Burhan Ahmad Mudassar, Taesik Na, Saibal Mukhopadhyay
2017Detailed Placement for Two-Dimensional Directed Self-Assembly Technology.
Zhi-Wen Lin, Yao-Wen Chang
2017Developing Dynamic Profiling and Debugging Support in OpenCL for FPGAs.
Anshuman Verma, Huiyang Zhou, Skip Booth, Robbie King, James Coole, Andy Keep, John Marshall, Wu-chun Feng
2017Disturbance Aware Memory Partitioning for Parallel Data Access in STT-RAM.
Shouyi Yin, Zhicong Xie, Shaojun Wei
2017Dynamic Platforms for Uncertainty Management in Future Automotive E/E Architectures: Invited.
Philipp Mundhenk, Ghizlane Tibba, Licong Zhang, Felix Reimann, Debayan Roy, Samarjit Chakraborty
2017EDiFy: An Execution time Distribution Finder.
Boudewijn Braams, Sebastian Altmeyer, Andy D. Pimentel
2017ESL Design in SystemC AMS: Introducing a top-down design methodology for mixed-signal systems: Invited.
Martin Barnasconi, Sumit Adhikari
2017Efficient Bayesian Yield Optimization Approach for Analog and SRAM Circuits.
Mengshuo Wang, Fan Yang, Changhao Yan, Xuan Zeng, Xiangdong Hu
2017Efficient Hierarchical Performance Modeling for Integrated Circuits via Bayesian Co-Learning.
Mohamad Baker Alawieh, Fa Wang, Xin Li
2017Enabling Write-Reduction Strategy for Journaling File Systems over Byte-addressable NVRAM.
Tseng-Yi Chen, Yuan-Hao Chang, Shuo-Han Chen, Chih-Ching Kuo, Ming-Chang Yang, Hsin-Wen Wei, Wei-Kuan Shih
2017Energy and Performance Trade-off in Nanophotonic Interconnects using Coding Techniques.
Cédric Killian, Daniel Chillet, Sébastien Le Beux, Van-Dung Pham, Olivier Sentieys, Ian O'Connor
2017Energy-Aware Standby-Sparing on Heterogeneous Multicore Systems.
Abhishek Roy, Hakan Aydin, Dakai Zhu
2017Energy-Efficient Execution for Repetitive App Usages on big.LITTLE Architectures.
Xianfeng Li, Guikang Chen, Wen Wen
2017Error Propagation Aware Timing Relaxation For Approximate Near Threshold Computing.
Anteneh Gebregiorgis, Saman Kiamehr, Mehdi Baradaran Tahoori
2017Estimation of Safe Sensor Measurements of Autonomous System Under Attack.
Raj Gautam Dutta, Xiaolong Guo, Teng Zhang, Kevin A. Kwiat, Charles A. Kamhoua, Laurent Njilla, Yier Jin
2017Exploiting Parallelism for Convolutional Connections in Processing-In-Memory Architecture.
Yi Wang, Mingxu Zhang, Jing Yang
2017Exploiting Thread and Data Level Parallelism for Ultimate Parallel SystemC Simulation.
Tim Schmidt, Guantao Liu, Rainer Dömer
2017Exploring Heterogeneous Algorithms for Accelerating Deep Convolutional Neural Networks on FPGAs.
Qingcheng Xiao, Yun Liang, Liqiang Lu, Shengen Yan, Yu-Wing Tai
2017Extensibility in Automotive Security: Current Practice and Challenges: Invited.
Sandip Ray, Wen Chen, Jayanta Bhadra, Mohammad Abdullah Al Faruque
2017Extensibility-Driven Automotive In-Vehicle Architecture Design: Invited.
Qi Zhu, Hengyi Liang, Licong Zhang, Debayan Roy, Wenchao Li, Samarjit Chakraborty
2017FFD: A Framework for Fake Flash Detection.
Zimu Guo, Xiaolin Xu, Mark Tehranipoor, Domenic Forte
2017Fast Embedding of Constrained Satisfaction Problem to Quantum Annealer with Minimizing Chain Length.
Juexiao Su, Lei He
2017Fast Predictive Useful Skew Methodology for Timing-Driven Placement Optimization.
Seungwon Kim, SangGi Do, Seokhyeong Kang
2017Fast and Energy-Efficient Digital Filters for Signal Conditioning in Low-Power Microcontrollers.
Carlos Moreno, Sebastian Fischmeister
2017Fault-Tolerant Training with On-Line Fault Detection for RRAM-Based Neural Computing Systems.
Lixue Xia, Mengyun Liu, Xuefei Ning, Krishnendu Chakrabarty, Yu Wang
2017Fixed-Parameter Tractable Algorithms for Optimal Layout Decomposition and Beyond.
Jian Kuang, Evangeline F. Y. Young
2017FlexCL: An Analytical Performance Model for OpenCL Workloads on Flexible FPGAs.
Shuo Wang, Yun Liang, Wei Zhang
2017Fogging Effect Aware Placement in Electron Beam Lithography.
Yu-Chen Huang, Yao-Wen Chang
2017Formal Techniques for Effective Co-verification of Hardware/Software Co-designs.
Rajdeep Mukherjee, Mitra Purandare, Raphael Polig, Daniel Kroening
2017Graph-Based Logic Bit Slicing for Datapath-Aware Placement.
Chau-Chin Huang, Bo-Qiao Lin, Hsin-Ying Lee, Yao-Wen Chang, Kuo-Sheng Wu, Jun-Zhi Yang
2017Greybox Design Methodology: A Program Driven Hardware Co-optimization with Ultra-Dynamic Clock Management.
Tianyu Jia, Russ Joseph, Jie Gu
2017Group Scissor: Scaling Neuromorphic Computing Design to Large Neural Networks.
Yandan Wang, Wei Wen, Beiye Liu, Donald M. Chiarulli, Hai (Helen) Li
2017HALWPE: Hardware-Assisted Light Weight Performance Estimation for GPUs.
Kenneth O'Neal, Philip Brisk, Emily Shriver, Michael Kishinevsky
2017Hardware ODE Solvers using Stochastic Circuits.
Siting Liu, Jie Han
2017Hardware-Software Codesign of Accurate, Multiplier-free Deep Neural Networks.
Hokchhay Tann, Soheil Hashemi, R. Iris Bahar, Sherief Reda
2017Hierarchical Dataflow Modeling of Iterative Applications.
Hyesun Hong, Hyunok Oh, Soonhoi Ha
2017Hierarchical Reversible Logic Synthesis Using LUTs.
Mathias Soeken, Martin Roetteler, Nathan Wiebe, Giovanni De Micheli
2017HyCUBE: A CGRA with Reconfigurable Single-cycle Multi-hop Interconnect.
Manupa Karunaratne, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh
2017INVITED Challenges and Potential for Incorporating Model-Based Design in Medical Device Development: Extended Abstract.
Louis Lintereur
2017Improving Performance and Lifetime of Large-Page NAND Storages Using Erase-Free Subpage Programming.
Myungsuk Kim, Jaehoon Lee, Sungjin Lee, Jisung Park, Jihong Kim
2017In Quest of the Next Information Processing Substrate: Extended Abstract: Invited.
Suman Datta, Alan C. Seabaugh, Michael T. Niemier, Arijit Raychowdhury, Darrell Schlom, Debdeep Jena, Huili Grace Xing, H.-S. Philip Wong, Eric Pop, Sayeef S. Salahuddin, Sumeet Kumar Gupta, Supratik Guha
2017InCheck: An In-application Recovery Scheme for Soft Errors.
Moslem Didehban, Sai Ram Dheeraj Lokam, Aviral Shrivastava
2017Incorporating the Role of Stress on Electromigration in Power Grids with Via Arrays.
Vivek Mishra, Palkesh Jain, Sravan K. Marella, Sachin S. Sapatnekar
2017Instruction-Level Data Isolation for the Kernel on ARM.
Yeongpil Cho, Donghyun Kwon, Yunheung Paek
2017Ivory: Early-Stage Design Space Exploration Tool for Integrated Voltage Regulators.
An Zou, Jingwen Leng, Yazhou Zu, Tao Tong, Vijay Janapa Reddi, David M. Brooks, Gu-Yeon Wei, Xuan Zhang
2017LO-FAT: Low-Overhead Control Flow ATtestation in Hardware.
Ghada Dessouky, Shaza Zeitouni, Thomas Nyman, Andrew Paverd, Lucas Davi, Patrick Koeberl, N. Asokan, Ahmad-Reza Sadeghi
2017LSC: A Large-Scale Consensus-Based Clustering Algorithm for High-Performance FPGAs.
Love Singhal, Mahesh A. Iyer, Saurabh N. Adya
2017LSTA: Learning-Based Static Timing Analysis for High-Dimensional Correlated On-Chip Variations.
Song Bian, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato
2017Latency-Aware Packet Processing on CPU-GPU Heterogeneous Systems.
Arian Maghazeh, Unmesh D. Bordoloi, Usman Dastgeer, Alexandru Andrei, Petru Eles, Zebo Peng
2017Layout Hotspot Detection with Feature Tensor Generation and Deep Biased Learning.
Haoyu Yang, Jing Su, Yi Zou, Bei Yu, Evangeline F. Y. Young
2017Learning to Produce Direct Tests for Security Verification Using Constrained Process Discovery.
Kuo-Kai Hsieh, Li-C. Wang, Wen Chen, Jayanta Bhadra
2017Leave the Cache Hierarchy Operation as It Is: A New Persistent Memory Accelerating Approach.
Chun-Hao Lai, Jishen Zhao, Chia-Lin Yang
2017Leveraging Compiler Optimizations to Reduce Runtime Fault Recovery Overhead.
Fateme S. Hosseini, Pouya Fotouhi, Chengmo Yang, Guang R. Gao
2017LibAbs: An Efficient and Accurate Timing Macro-Modeling Algorithm for Large Hierarchical Designs.
Tin-Yin Lai, Tsung-Wei Huang, Martin D. F. Wong
2017Linear Periodically Time-Varying (LPTV) Circuits Enable New Radio Architectures for Emerging Wireless Communication Paradigms: Extended Abstract: Invited.
Negar Reiskarimian, Linxiao Zhang, Harish Krishnaswamy
2017LiveSynth: Towards an Interactive Synthesis Flow.
Rafael Trapani Possignolo, Jose Renau
2017Low-Power On-Chip Network Providing Guaranteed Services for Snoopy Coherent and Artificial Neural Network Systems.
Bhavya K. Daya, Li-Shiuan Peh, Anantha P. Chandrakasan
2017Low-overhead Aging-aware Resource Management on Embedded GPUs.
Haeseung Lee, Muhammad Shafique, Mohammad Abdullah Al Faruque
2017MOCA: an Inter/Intra-Chip Optical Network for Memory.
Zhehui Wang, Zhengbin Pang, Peng Yang, Jiang Xu, Xuanqi Chen, Rafael K. V. Maeda, Zhifei Wang, Luan H. K. Duong, Haoran Li, Zhe Wang
2017Making DRAM Stronger Against Row Hammering.
Mungyu Son, Hyunsun Park, Junwhan Ahn, Sungjoo Yoo
2017Maximizing Forward Progress with Cache-aware Backup for Self-powered Non-volatile Processors.
Jing Li, Mengying Zhao, Lei Ju, Chun Jason Xue, Zhiping Jia
2017Minimizing Cluster Number with Clip Shifting in Hotspot Pattern Classification.
Kuan-Jung Chen, Yu-Kai Chuang, Bo-Yi Yu, Shao-Yun Fang
2017Minimizing Pipeline Stalls in Distributed-Controlled Coarse-Grained Reconfigurable Arrays with Triggered Instruction Issue and Execution.
Yanan Lu, Leibo Liu, Yangdong Deng, Jian Weng, Zhaoshi Li, Chenchen Deng, Shaojun Wei
2017Minimizing Thermal Gradient and Pumping Power in 3D IC Liquid Cooling Network Design.
Gengjie Chen, Jian Kuang, Zhiliang Zeng, Hang Zhang, Evangeline F. Y. Young, Bei Yu
2017Modeling the Effects of AUTOSAR Overheads on Application Timing and Schedulability.
Manish Chauhan, Rodolfo Pellizzoni, Krzysztof Czarnecki
2017Multi-variable Dynamic Power Management for the GPU Subsystem.
Pietro Mercati, Raid Ayoub, Michael Kishinevsky, Eric Samson, Marc Beuchat, Francesco Paterna, Tajana Simunic Rosing
2017Network Synthesis for Database Processing Units.
Andrea Lottarini, Stephen A. Edwards, Kenneth A. Ross, Martha A. Kim
2017No-Jump-into-Basic-Block: Enforce Basic Block CFI on the Fly for Real-world Binaries.
Wenjian He, Sanjeev Das, Wei Zhang, Yang Liu
2017ObfusCADe: Obfuscating Additive Manufacturing CAD Models Against Counterfeiting: Invited.
Nikhil Gupta, Fei Chen, Nektarios Georgios Tsoutsos, Michail Maniatakos
2017On Characterizing Near-Threshold SRAM Failures in FinFET Technology.
Shrikanth Ganapathy, John Kalamatianos, Keith Kasprak, Steven Raasch
2017On Mitigation of Side-Channel Attacks in 3D ICs: Decorrelating Thermal Patterns from Power and Activity.
Johann Knechtel, Ozgur Sinanoglu
2017On Quality Trade-off Control for Approximate Computing Using Iterative Training.
Chengwen Xu, Xiangyu Wu, Wenqi Yin, Qiang Xu, Naifeng Jing, Xiaoyao Liang, Li Jiang
2017Optimal Circuits for Parallel Bit Reversal.
Ren Chen, Viktor K. Prasanna
2017Optimized Design of a Human Intranet Network.
Ali Moin, Pierluigi Nuzzo, Alberto L. Sangiovanni-Vincentelli, Jan M. Rabaey
2017Optimizing Memory Efficiency for Convolution Kernels on Kepler GPUs.
Xiaoming Chen, Jianxu Chen, Danny Z. Chen, Xiaobo Sharon Hu
2017Optimizing Message Routing and Scheduling in Automotive Mixed-Criticality Time-Triggered Networks.
Fedor Smirnov, Michael Glaß, Felix Reimann, Jürgen Teich
2017Path-Specific Functional Timing Verification under Floating and Transition Modes of Operation.
Chun-Ning Lai, Jie-Hong R. Jiang
2017Pauli Frames for Quantum Computer Architectures.
Leon Riesebos, Xiang Fu, Savvas Varsamopoulos, Carmen G. Almudéver, Koen Bertels
2017Phase-driven Learning-based Dynamic Reliability Management For Multi-core Processors.
Zhiyuan Yang, Caleb Serafy, Tiantao Lu, Ankur Srivastava
2017Pin Accessibility-Driven Cell Layout Redesign and Placement Optimization.
Jaewoo Seo, Jinwook Jung, Sangmin Kim, Youngsoo Shin
2017Power and Area Efficient Hold Time Fixing by Free Metal Segment Allocation.
Wei-Lun Chiu, Iris Hui-Ru Jiang, Chien-Pang Lu, Yu-Tung Chang
2017Power-aware Performance Tuning of GPU Applications Through Microbenchmarking.
Nicola Bombieri, Federico Busato, Franco Fummi
2017PriSearch: Efficient Search on Private Data.
M. Sadegh Riazi, Ebrahim M. Songhori, Farinaz Koushanfar
2017Proceedings of the 54th Annual Design Automation Conference, DAC 2017, Austin, TX, USA, June 18-22, 2017
2017QuAd: Design and Analysis of Quality-Area Optimal Low-Latency Approximate Adders.
Muhammad Abdullah Hanif, Rehan Hafiz, Osman Hasan, Muhammad Shafique
2017RESPARC: A Reconfigurable and Energy-Efficient Architecture with Memristive Crossbars for Deep Spiking Neural Networks.
Aayush Ankit, Abhronil Sengupta, Priyadarshini Panda, Kaushik Roy
2017RIC: Relaxed Inclusion Caches for Mitigating LLC Side-Channel Attacks.
Mehmet Kayaalp, Khaled N. Khasawneh, Hodjat Asghari Esfeden, Jesse Elwell, Nael B. Abu-Ghazaleh, Dmitry V. Ponomarev, Aamer Jaleel
2017Real-Time Meets Approximate Computing: An Elastic CNN Inference Accelerator with Adaptive Trade-off between QoS and QoR.
Ying Wang, Huawei Li, Xiaowei Li
2017Real-Time Multi-Scale Pedestrian Detection for Driver Assistance Systems.
Maryam Hemmati, Morteza Biglari-Abhari, Smaïl Niar, Stevan Berber
2017Reducing LDPC Soft Sensing Latency by Lightweight Data Refresh for Flash Read Performance Improvement.
Yajuan Du, Qiao Li, Liang Shi, Deqing Zou, Hai Jin, Chun Jason Xue
2017Rescuing Memristor-based Neuromorphic Design with High Defects.
Chenchen Liu, Miao Hu, John Paul Strachan, Hai (Helen) Li
2017Retiming of Two-Phase Latch-Based Resilient Circuits.
Hsiao-Lun Wang, Minghe Zhang, Peter A. Beerel
2017SABER: Selection of Approximate Bits for the Design of Error Tolerant Circuits.
Deepashree Sengupta, Farhana Sharmin Snigdha, Jiang Hu, Sachin S. Sapatnekar
2017Safety Guard: Runtime Enforcement for Safety-Critical Cyber-Physical Systems: Invited.
Meng Wu, Haibo Zeng, Chao Wang, Huafeng Yu
2017Secure Information Flow Verification with Mutable Dependent Types.
Andrew Ferraiuolo, Weizhe Hua, Andrew C. Myers, G. Edward Suh
2017Secure and Reliable XOR Arbiter PUF Design: An Experimental Study based on 1 Trillion Challenge Response Pair Measurements.
Chen Zhou, Keshab K. Parhi, Chris H. Kim
2017SmartSwap: High-Performance and User Experience Friendly Swapping in Mobile Systems.
Xiao Zhu, Duo Liu, Kan Zhong, Jinting Ren, Tao Li
2017Sneak-Path Based Test and Diagnosis for 1R RRAM Crossbar Using Voltage Bias Technique.
Tianjian Li, Xiangyu Bi, Naifeng Jing, Xiaoyao Liang, Li Jiang
2017Specification, Verification and Design of Evolving Automotive Software: Invited.
S. Ramesh, Birgit Vogel-Heuser, Wanli Chang, Debayan Roy, Licong Zhang, Samarjit Chakraborty
2017Statistical Error Analysis for Low Power Approximate Adders.
Muhammad Kamran Ayub, Osman Hasan, Muhammad Shafique
2017Statistical Pattern Based Modeling of GPU Memory Access Streams.
Reena Panda, Xinnian Zheng, Jiajun Wang, Andreas Gerstlauer, Lizy K. John
2017Streak: Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups.
Derong Liu, Vinicius S. Livramento, Salim Chowdhury, Duo Ding, Huy Vo, Akshay Sharma, David Z. Pan
2017Stress-Aware Loops Mapping on CGRAs with Considering NBTI Aging Effect.
Jiangyuan Gu, Shouyi Yin, Shaojun Wei
2017TIME: A Training-in-memory Architecture for Memristor-based Deep Neural Networks.
Ming Cheng, Lixue Xia, Zhenhua Zhu, Yi Cai, Yuan Xie, Yu Wang, Huazhong Yang
2017Task Mapping on SMART NoC: Contention Matters, Not the Distance.
Lei Yang, Weichen Liu, Peng Chen, Nan Guan, Mengquan Li
2017Template Aware Coverage: Taking Coverage Analysis to the Next Level.
Raviv Gal, Einat Kermany, Bilal Saleh, Avi Ziv, Michael L. Behm, Bryan G. Hickerson
2017Test Methodology for Dual-rail Asynchronous Circuits.
Kuan-Yen Huang, Ting-Yu Shen, Chien-Mo James Li
2017Timing Driven Incremental Multi-Bit Register Composition Using a Placement-Aware ILP formulation.
Ioannis Seitanidis, Giorgos Dimitrakopoulos, Pavlos M. Mattheakis, Laurent Masse-Navette, David G. Chinnery
2017Toggle MUX: How X-Optimism Can Lead to Malicious Hardware.
Christian Krieg, Clifford Wolf, Axel Jantsch, Tanja Zseby
2017Toss-up Wear Leveling: Protecting Phase-Change Memories from Inconsistent Write Patterns.
Xian Zhang, Guangyu Sun
2017Toward Optimal Legalization for Mixed-Cell-Height Circuit Designs.
Jianli Chen, Ziran Zhu, Wenxing Zhu, Yao-Wen Chang
2017Towards Aging-Induced Approximations.
Hussam Amrouch, Behnam Khaleghi, Andreas Gerstlauer, Jörg Henkel
2017Towards Design and Automation of Hardware-Friendly NOMA Receiver with Iterative Multi-User Detection.
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