| 2010 | 3-D stacked die: now or future? Samta Bansal, Juan C. Rey, Andrew Yang, Myung-Soo Jang, L. C. Lu, Philippe Magarshack, Pol Marchal, Riko Radojcic |
| 2010 | A complete design-flow for the generation of ultra low-power WSN node architectures based on micro-tasking. Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys |
| 2010 | A correlation-based design space exploration methodology for multi-processor systems-on-chip. Giovanni Mariani, Aleksandar Brankovic, Gianluca Palermo, Jovana Jovic, Vittorio Zaccaria, Cristina Silvano |
| 2010 | A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms. Yiannis Iosifidis, Arindam Mallik, Stylianos Mamagkakis, Eddy de Greef, Alexandros Bartzas, Dimitrios Soudris, Francky Catthoor |
| 2010 | A framework for optimizing thermoelectric active cooling systems. Jieyi Long, Seda Ogrenci Memik |
| 2010 | A holistic approach for statistical SRAM analysis. Paul Zuber, Petr Dobrovolný, Miguel Miranda |
| 2010 | A linear algorithm for full-chip statistical leakage power analysis considering weak spatial correlation. Ruijing Shen, Sheldon X.-D. Tan, Jinjun Xiong |
| 2010 | A mixed-mode vector-based dataflow approach for modeling and simulating LTE physical layer. Chia-Jui Hsu, José Luis Pino, Fei-Jiang Hu |
| 2010 | A multilayer nanophotonic interconnection network for on-chip many-core communications. Xiang Zhang, Ahmed Louri |
| 2010 | A new IP lookup cache for high performance IP routers. Guangdeng Liao, Heeyeol Yu, Laxmi N. Bhuyan |
| 2010 | A novel optimal single constant multiplication algorithm. Jason Thong, Nicola Nicolici |
| 2010 | A parallel integer programming approach to global routing. Tai-Hsuan Wu, Azadeh Davoodi, Jeffrey T. Linderoth |
| 2010 | A probabilistic and energy-efficient scheduling approach for online application in real-time systems. Thorsten Zitterell, Christoph Scholl |
| 2010 | A robust periodic arnoldi shooting algorithm for efficient analysis of large-scale RF/MM ICs. Xuexin Liu, Hao Yu, Sheldon X.-D. Tan |
| 2010 | A statistical simulation method for reliability analysis of SRAM core-cells. Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine |
| 2010 | A system for online power prediction in virtualized environments using Gaussian mixture models. Gaurav Dhiman, Kresimir Mihic, Tajana Rosing |
| 2010 | A universal state-of-charge algorithm for batteries. Bingjun Xiao, Yiyu Shi, Lei He |
| 2010 | ACES: application-specific cycle elimination and splitting for deadlock-free routing on irregular network-on-chip. Jason Cong, Chunyue Liu, Glenn Reinman |
| 2010 | Abstraction of RTL IPs into embedded software. Nicola Bombieri, Franco Fummi, Graziano Pravadelli |
| 2010 | Adaptive and autonomous thermal tracking for high performance computing systems. Yufu Zhang, Ankur Srivastava |
| 2010 | An AIG-Based QBF-solver using SAT for preprocessing. Florian Pigorsch, Christoph Scholl |
| 2010 | An effective GPU implementation of breadth-first search. Lijuan Luo, Martin D. F. Wong, Wen-mei W. Hwu |
| 2010 | An efficient algorithm to verify generalized false paths. Olivier Coudert |
| 2010 | An efficient dual algorithm for vectorless power grid verification under linear current constraints. Xuanxing Xiong, Jia Wang |
| 2010 | An efficient dynamically reconfigurable on-chip network architecture. Mehdi Modarressi, Hamid Sarbazi-Azad, Arash Tavakkol |
| 2010 | An efficient phase detector connection structure for the skew synchronization system. Yu-Chien Kao, Hsuan-Ming Chou, Kun-Ting Tsai, Shih-Chieh Chang |
| 2010 | An efficient test vector generation for checking analog/mixed-signal functional models. ByongChan Lim, Jaeha Kim, Mark A. Horowitz |
| 2010 | An error tolerance scheme for 3D CMOS imagers. Hsiu-Ming Chang, Jiun-Lang Huang, Ding-Ming Kwai, Kwang-Ting (Tim) Cheng, Cheng-Wen Wu |
| 2010 | An optimal algorithm for finding disjoint rectangles and its application to PCB routing. Hui Kong, Qiang Ma, Tan Yan, Martin D. F. Wong |
| 2010 | Analyzing Max Thalmaier, Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Jörg Bormann, Wolfgang Kunz |
| 2010 | Application-aware NoC design for efficient SDRAM access. Wooyoung Jang, David Z. Pan |
| 2010 | Automated compact dynamical modeling: an enabling tool for analog designers. Bradley N. Bond, Luca Daniel |
| 2010 | Automated modeling and emulation of interconnect designs for many-core chip multiprocessors. Colin J. Ihrig, Rami G. Melhem, Alex K. Jones |
| 2010 | Automatic multithreaded pipeline synthesis from transactional datapath specifications. Eriko Nurvitadhi, James C. Hoe, Shih-Lien Lu, Timothy Kam |
| 2010 | BLoG: post-silicon bug localization in processors using bug localization graphs. Sung-Boem Park, Anne Bracy, Hong Wang, Subhasish Mitra |
| 2010 | Bayesian virtual probe: minimizing variation characterization cost for nanoscale IC technologies via Bayesian inference. Wangyang Zhang, Xin Li, Rob A. Rutenbar |
| 2010 | Behavior-level yield enhancement approach for large-scaled analog circuits. Chin-Cheng Kuo, Yen-Lung Chen, I-Ching Tsai, Li-Yu Chan, Chien-Nan Jimmy Liu |
| 2010 | Best-effort computing: re-thinking parallel software and hardware. Srimat T. Chakradhar, Anand Raghunathan |
| 2010 | BooM: a decision procedure for boolean matching with abstraction and dynamic learning. Chih-Fan Lai, Jie-Hong R. Jiang, Kuo-Hua Wang |
| 2010 | Bridging pre-silicon verification and post-silicon validation. Amir Nahir, Avi Ziv, Rajesh Galivanche, Alan J. Hu, Miron Abramovici, Albert Camilleri, Bob Bentley, Harry Foster, Valeria Bertacco, Shakti Kapoor |
| 2010 | CPS foundations. Edward A. Lee |
| 2010 | Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement. Jie Zhang, Shashikanth Bobba, Nishant Patil, Albert Lin, H.-S. Philip Wong, Giovanni De Micheli, Subhasish Mitra |
| 2010 | Circuit modeling for practical many-core architecture design exploration. Dean Truong, Bevan M. Baas |
| 2010 | Classification rule learning using subgroup discovery of cross-domain attributes responsible for design-silicon mismatch. Nicholas Callegari, Dragoljub Gagi Drmanac, Li-C. Wang, Magdy S. Abadir |
| 2010 | Clock tree synthesis under aggressive buffer insertion. Ying-Yu Chen, Chen Dong, Deming Chen |
| 2010 | Clock tree synthesis with pre-bond testability for 3D stacked IC designs. Tak-Yung Kim, Taewhan Kim |
| 2010 | Closed-form modeling of layout-dependent mechanical stress. Vivek Joshi, Valeriy Sukharev, Andres Torres, Kanak Agarwal, Dennis Sylvester, David T. Blaauw |
| 2010 | Compact modeling and robust layout optimization for contacts in deep sub-wavelength lithography. Yongchan Ban, David Z. Pan |
| 2010 | Compilation and virtualization in the HiPEAC vision. Christian Bertin, Christophe Guillon, Koen De Bosschere |
| 2010 | Consistent runtime thermal prediction and control through workload phase detection. Ryan Cochran, Sherief Reda |
| 2010 | Cost-aware three-dimensional (3D) many-core multiprocessor design. Jishen Zhao, Xiangyu Dong, Yuan Xie |
| 2010 | Cost-driven 3D integration with interconnect layers. Xiaoxia Wu, Guangyu Sun, Xiangyu Dong, Reetuparna Das, Yuan Xie, Chita R. Das, Jian Li |
| 2010 | Coverage in interpolation-based model checking. Hana Chockler, Daniel Kroening, Mitra Purandare |
| 2010 | Cross-contamination aware design methodology for pin-constrained digital microfluidic biochips. Cliff Chiung-Yu Lin, Yao-Wen Chang |
| 2010 | Crosstalk noise and bit error rate analysis for optical network-on-chip. Yiyuan Xie, Mahdi Nikdast, Jiang Xu, Wei Zhang, Qi Li, Xiaowen Wu, Yaoyao Ye, Xuan Wang, Weichen Liu |
| 2010 | Cyber-physical energy systems: focus on smart buildings. Jan Kleissl, Yuvraj Agarwal |
| 2010 | Cyber-physical systems: the next computing revolution. Ragunathan Rajkumar, Insup Lee, Lui Sha, John A. Stankovic |
| 2010 | Design and analysis of compact ultra energy-efficient logic gates using laterally-actuated double-electrode NEMS. Hamed F. Dadgour, Muhammad Mustafa Hussain, Casey Smith, Kaustav Banerjee |
| 2010 | Detachable nano-carbon chip with ultra low power. Shinobu Fujita, Shinichi Yasuda, Daesung Lee, Xiangyu Chen, Deji Akinwande, H.-S. Philip Wong |
| 2010 | Detecting tangled logic structures in VLSI netlists. Tanuj Jindal, Charles J. Alpert, Jiang Hu, Zhuo Li, Gi-Joon Nam, Charles B. Winn |
| 2010 | Device hypervisors. Johan Fornaeus |
| 2010 | Distributed task migration for thermal management in many-core systems. Yang Ge, Parth Malani, Qinru Qiu |
| 2010 | Distributed time, conservative parallel logic simulation on GPUs. Bo D. Wang, Yuhao Zhu, Yangdong Deng |
| 2010 | Does IC design have a future in the clouds? Andreas Kuehlmann, Raul Camposano, James Colgan, John Chilton, Samuel George, Rean Griffith, Paul Leventis, Deepak Singh |
| 2010 | Double patterning lithography aware gridless detailed routing with innovative conflict graph. Yen-Hung Lin, Yih-Lang Li |
| 2010 | ECR: a low complexity generalized error cancellation rewiring scheme. Xiaoqing Yang, Tak-Kei Lam, Yu-Liang Wu |
| 2010 | EDA challenges and options: investing for the future. Ruchir Puri, William H. Joyner, Raj Jammy, Ahmed Jerraya, Jan M. Rabaey, Walden C. Rhines, Leon Stok |
| 2010 | Education panel: designing the always connected car of the future. Arkadeb Ghosal, Paolo Giusto, Alberto L. Sangiovanni-Vincentelli, Joseph D'Ambrosio, Ed Nuckolls, Harald Wilhelm, Jim Tung, Markus Kuhl, Peter van Staa |
| 2010 | Efficient fault simulation on many-core processors. Michael A. Kochte, Marcel Schaal, Hans-Joachim Wunderlich, Christian G. Zoellin |
| 2010 | Efficient simulation of oscillatory combinational loops. Morteza Fayyazi, Laurent Kirsch |
| 2010 | Efficient smart monte carlo based SSTA on graphics processing units with improved resource utilization. Vineeth Veetil, Yung-Hsu Chang, Dennis Sylvester, David T. Blaauw |
| 2010 | Efficient tail estimation for massive correlated log-normal sums: with applications in statistical leakage analysis. Mingzhi Gao, Zuochang Ye, Yan Wang, Zhiping Yu |
| 2010 | Electronic design automation for social networks. Andrew DeOrio, Valeria Bertacco |
| 2010 | Embedded memory binding in FPGAs. Kaveh Elizeh, Nicola Nicolici |
| 2010 | Exploiting finite precision information to guide data-flow mapping. David Novo, Min Li, Robert Fasthuber, Praveen Raghavan, Francky Catthoor |
| 2010 | Exploiting reconfigurability for low-cost in-situ test and monitoring of digital PLLs. Leyi Yin, Peng Li |
| 2010 | Eyecharts: constructive benchmarking of gate sizing heuristics. Puneet Gupta, Andrew B. Kahng, Amarnath Kasibhatla, Puneet Sharma |
| 2010 | Fast identification of operating current for toggle MRAM by spiral search. Sheng-Hung Wang, Ching-Yi Chen, Cheng-Wen Wu |
| 2010 | Fast timing-model independent buffered clock-tree synthesis. Xin-Wei Shih, Yao-Wen Chang |
| 2010 | Find your flow: increasing flow experience by designing "human" embedded systems. Chen-Ling Chou, Anca M. Miron, Radu Marculescu |
| 2010 | Fine-grained I/O access control based on Xen virtualization for 3G/4G mobile devices. Sung-Min Lee, Sang-Bum Suh, Jong-Deok Choi |
| 2010 | Formal modeling and reasoning for reliability analysis. Natasa Miskov-Zivanov, Diana Marculescu |
| 2010 | Fortifying analog models with equivalence checking and coverage analysis. Mark Horowitz, Metha Jeeradit, Frances Lau, Sabrina Liao, ByongChan Lim, James Mao |
| 2010 | Frequency domain decomposition of layouts for double dipole lithography. Kanak Agarwal |
| 2010 | Fully X-tolerant, very high scan compression. Peter Wohl, John A. Waicukauski, Frederic Neuveux, Emil Gizdarski |
| 2010 | Gate-level characterization: foundations and hardware security applications. Sheng Wei, Saro Meguerdichian, Miodrag Potkonjak |
| 2010 | Generating parametric models from tabulated data. Sanda Lefteriu, Jan Mohring |
| 2010 | Generation of yield-embedded Pareto-front for simultaneous optimization of yield and performances. Yu Liu, Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya, Yuzi Kanazawa |
| 2010 | Global routing and track assignment for flip-chip designs. Xiaodong Liu, Yifan Zhang, Gary K. Yeap, Chunlei Chu, Jian Sun, Xuan Zeng |
| 2010 | Hardware that produces bounded rather than exact results. Melvin A. Breuer |
| 2010 | Hierarchical hybrid power supply networks. Farinaz Koushanfar |
| 2010 | History-based VLSI legalization using network flow. Minsik Cho, Haoxing Ren, Hua Xiang, Ruchir Puri |
| 2010 | Impact of process variations on emerging memristor. Dimin Niu, Yiran Chen, Cong Xu, Yuan Xie |
| 2010 | In-situ characterization and extraction of SRAM variability. Srivatsan Chellappa, Jia Ni, Xiaoyin Yao, Nathan D. Hindman, Jyothi Velamala, Min Chen, Yu Cao, Lawrence T. Clark |
| 2010 | Instruction cache locking using temporal reuse profile. Yun Liang, Tulika Mitra |
| 2010 | Joint DAC/IWBDA special session engineering biology: fundamentals and applications. Marc D. Riedel, Soha Hassoun, Ron Weiss, Pamela Silver, J. Christopher Anderson, Richard M. Murray |
| 2010 | LATA: a latency and throughput-aware packet processing system. Jilong Kuang, Laxmi N. Bhuyan |
| 2010 | LUT-based FPGA technology mapping for reliability. Jason Cong, Kirill Minkovich |
| 2010 | Lattice-based computation of Boolean functions. Mustafa Altun, Marc D. Riedel |
| 2010 | Leakage-aware dynamic scheduling for real-time adaptive applications on multiprocessor systems. Heng Yu, Bharadwaj Veeravalli, Yajun Ha |
| 2010 | Leveraging UPF-extracted assertions for modeling and formal verification of architectural power intent. Aritra Hazra, Srobona Mitra, Pallab Dasgupta, Ajit Pal, Debabrata Bagchi, Kaustav Guha |
| 2010 | MFTI: matrix-format tangential interpolation for modeling multi-port systems. Yuanzhe Wang, Chi-Un Lei, Grantham K. H. Pang, Ngai Wong |
| 2010 | Medical cyber physical systems. Insup Lee, Oleg Sokolsky |
| 2010 | Model-based functional verification. Kenneth S. Kundert, Henry Chang |
| 2010 | Multi-threaded collision-aware global routing with bounded-length maze routing. Wen-Hao Liu, Wei-Chun Kao, Yih-Lang Li, Kai-Yuan Chao |
| 2010 | NTPT: on the end-to-end traffic prediction in the on-chip networks. Yoshi Shih-Chieh Huang, Kaven Chun-Kai Chou, Chung-Ta King, Shau-Yin Tseng |
| 2010 | Network on chip design and optimization using specialized influence models. Cristinel Ababei |
| 2010 | Networks on Chips: from research to products. Giovanni De Micheli, Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Federico Angiolini, Antonio Pullini |
| 2010 | New model-driven design and generation of multi-facet arbiters part I: from the design model to the architecture model. Jer-Min Jou, Sih-Sian Wu, Yun-Lung Lee, Cheng Chou, Yuan-Long Jeang |
| 2010 | Node addition and removal in the presence of don't cares. Yung-Chih Chen, Chun-Yao Wang |
| 2010 | Non-uniform clock mesh optimization with linear programming buffer insertion. Matthew R. Guthaus, Gustavo Wilke, Ricardo Reis |
| 2010 | Off-chip memory bandwidth minimization through cache partitioning for multi-core platforms. Chenjie Yu, Peter Petrov |
| 2010 | On the costs and benefits of stochasticity in stream processing. Raj R. Nadakuditi, Igor L. Markov |
| 2010 | On-die power grids: the missing link. Eli Chiprout |
| 2010 | Online SystemC emulation acceleration. Scott Sirowy, Chen Huang, Frank Vahid |
| 2010 | Parallel hierarchical cross entropy optimization for on-chip decap budgeting. Xueqian Zhao, Yonghe Guo, Zhuo Feng, Shiyan Hu |
| 2010 | Parallel multigrid preconditioning on graphics processing units (GPUs) for robust power grid analysis. Zhuo Feng, Zhiyu Zeng |
| 2010 | Parallel program performance modeling for runtime optimization of multi-algorithm circuit simulation. Xiaoji Ye, Peng Li |
| 2010 | Pareto sampling: choosing the right weights by derivative pursuit. Amith Singhee, Pamela Castalino |
| 2010 | Performance and power modeling in a multi-programmed multi-core environment. Xi Chen, Chi Xu, Robert P. Dick, Zhuoqing Morley Mao |
| 2010 | Performance yield-driven task allocation and scheduling for MPSoCs under process variation. Lin Huang, Qiang Xu |
| 2010 | Performance-driven analog placement considering boundary constraint. Cheng-Wu Lin, Jai-Ming Lin, Chun-Po Huang, Soon-Jyh Chang |
| 2010 | Post-silicon diagnosis of segments of failing speedpaths due to manufacturing variations. Lin Xie, Azadeh Davoodi, Kewal K. Saluja |
| 2010 | Post-silicon is too late avoiding the $50 million paperweight starts with validated designs. John Goodenough, Rob Aitken |
| 2010 | Post-silicon validation challenges: how EDA and academia can help. Jagannath Keshava, Nagib Hakim, Chinna Prudvi |
| 2010 | Post-silicon validation opportunities, challenges and recent advances. Subhasish Mitra, Sanjit A. Seshia, Nicola Nicolici |
| 2010 | PreDVS: preemptive dynamic voltage scaling for real-time systems using approximation scheme. Weixun Wang, Prabhat Mishra |
| 2010 | Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010 Sachin S. Sapatnekar |
| 2010 | Processor virtualization and split compilation for heterogeneous multicore embedded systems. Albert Cohen, Erven Rohou |
| 2010 | Pulsed-latch aware placement for timing-integrity optimization. Yi-Lin Chuang, Sangmin Kim, Youngsoo Shin, Yao-Wen Chang |
| 2010 | Quality metric evaluation of a physical unclonable function derived from an IC's power distribution system. Ryan Helinski, Dhruva Acharyya, Jim Plusquellic |
| 2010 | Quantifying and coping with parametric variations in 3D-stacked microarchitectures. Serkan Ozdemir, Yan Pan, Abhishek Das, Gokhan Memik, Gabriel H. Loh, Alok N. Choudhary |
| 2010 | QuickYield: an efficient global-search based parametric yield estimation with performance constraints. Fang Gong, Hao Yu, Yiyu Shi, DaeSoo Kim, Junyan Ren, Lei He |
| 2010 | RAMP gold: an FPGA-based architecture simulator for multiprocessors. Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yunsup Lee, Henry Cook, David A. Patterson, Krste Asanovic |
| 2010 | RDE-based transistor-level gate simulation for statistical static timing analysis. Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs |
| 2010 | Real time emulations: foundation and applications. Azalia Mirhoseini, Yousra Alkabani, Farinaz Koushanfar |
| 2010 | Reconfigurable multi-function logic based on graphene P-N junctions. Sansiri Tanachutiwat, Ji Ung Lee, Wei Wang, Chun Yung Sung |
| 2010 | Recovery-driven design: a power minimization methodology for error-tolerant processor modules. Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori |
| 2010 | Reducing the number of lines in reversible circuits. Robert Wille, Mathias Soeken, Rolf Drechsler |
| 2010 | Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation. Jingtong Hu, Chun Jason Xue, Wei-Che Tseng, Yi He, Meikang Qiu, Edwin Hsing-Mean Sha |
| 2010 | Reliability aware power management for dual-processor real-time embedded systems. Ranjani Sridharan, Rabi N. Mahapatra |
| 2010 | Representative path selection for post-silicon timing prediction under variability. Lin Xie, Azadeh Davoodi |
| 2010 | Rewiring for robustness. Manu Jose, Yu Hu, Rupak Majumdar, Lei He |
| 2010 | Robust design methods for hardware accelerators for iterative algorithms in scientific computing. Adam B. Kinsman, Nicola Nicolici |
| 2010 | SCEMIT: a systemc error and mutation injection tool. Peter Lisherness, Kwang-Ting (Tim) Cheng |
| 2010 | SCUD: a fast single-pass L1 cache simulation approach for embedded processors with round-robin replacement policy. Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya, Sri Parameswaran |
| 2010 | SRAM-based NBTI/PBTI sensor system design. Zhenyu Qi, Jiajing Wang, Adam C. Cabe, Stuart N. Wooters, Travis N. Blalock, Benton H. Calhoun, Mircea R. Stan |
| 2010 | Scalable effort hardware design: exploiting algorithmic resilience for energy efficiency. Vinay K. Chippa, Debabrata Mohapatra, Anand Raghunathan, Kaushik Roy, Srimat T. Chakradhar |
| 2010 | Scalable specification mining for verification and diagnosis. Wenchao Li, Alessandro Forin, Sanjit A. Seshia |
| 2010 | Separatrices in high-dimensional state space: system-theoretical tangent computation and application to SRAM dynamic stability analysis. Yong Zhang, Peng Li, Garng M. Huang |
| 2010 | Smart phone power. Johnny John, Chris Riddle |
| 2010 | Speedpath analysis under parametric timing models. Luís Guerra e Silva, Joel R. Phillips, L. Miguel Silveira |
| 2010 | Stacking SRAM banks for ultra low power standby mode operation. Adam C. Cabe, Zhenyu Qi, Mircea R. Stan |
| 2010 | Static timing analysis for flexible TFT circuits. Chao-Hsuan Hsu, Chester Liu, En-Hua Ma, James Chien-Mo Li |
| 2010 | Stochastic computation. Naresh R. Shanbhag, Rami A. Abdallah, Rakesh Kumar, Douglas L. Jones |
| 2010 | Stochastic dominant singular vectors method for variation-aware extraction. Tarek A. El-Moselhy, Luca Daniel |
| 2010 | Synchronization of washing operations with droplet routing for cross-contamination avoidance in digital microfluidic biochips. Yang Zhao, Krishnendu Chakrabarty |
| 2010 | Synthesis and implementation of active mode power gating circuits. Jun Seomun, Insup Shin, Youngsoo Shin |
| 2010 | Synthesis of the optimal 4-bit reversible circuits. Oleg Golubitsky, Sean M. Falconer, Dmitri Maslov |
| 2010 | Synthesis of trustable ICs using untrusted CAD tools. Miodrag Potkonjak |
| 2010 | TSV stress aware timing analysis with applications to 3D-IC layout optimization. Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee, Sung Kyu Lim, David Z. Pan |
| 2010 | The aethereal network on chip after ten years: goals, evolution, lessons, and future. Kees Goossens, Andreas Hansson |
| 2010 | The evolution of SOC interconnect and how NOC fits within it. Bruce Mathewson |
| 2010 | Theoretical analysis of gate level information flow tracking. Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Ryan Kastner |
| 2010 | Thermal aware task sequencing on embedded processors. Sushu Zhang, Karam S. Chatha |
| 2010 | Thermal monitoring of real processors: techniques for sensor allocation and full characterization. Abdullah Nazma Nowroz, Ryan Cochran, Sherief Reda |
| 2010 | Timing analysis of esterel programs on general-purpose multiprocessors. Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury, Samarjit Chakraborty |
| 2010 | Toward efficient large-scale performance modeling of integrated circuits via multi-mode/multi-corner sparse regression. Wangyang Zhang, Tsung-Hao Chen, Ming Yuan Ting, Xin Li |
| 2010 | Towards scalable system-level reliability analysis. Michael Glaß, Martin Lukasiewycz, Christian Haubelt, Jürgen Teich |
| 2010 | Trace-driven optimization of networks-on-chip configurations. Andrew B. Kahng, Bill Lin, Kambiz Samadi, Rohit Sunkam Ramanujam |
| 2010 | Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation. Zhiyu Zeng, Xiaoji Ye, Zhuo Feng, Peng Li |
| 2010 | Transistor sizing of custom high-performance digital circuits with parametric yield considerations. Daniel K. Beece, Jinjun Xiong, Chandu Visweswariah, Vladimir Zolotov, Yifang Liu |
| 2010 | Two-sided single-detour untangling for bus routing. Jin-Tai Yan, Zhi-Wei Chen |
| 2010 | Using introspective software-based testing for post-silicon debug and repair. Kypros Constantinides, Todd M. Austin |
| 2010 | Verification for fault tolerance of the IBM system z microprocessor. Brian W. Thompto, Bodo Hoppe |
| 2010 | Virtual channels vs. multiple physical networks: a comparative analysis. Young-Jin Yoon, Nicola Concer, Michele Petracca, Luca P. Carloni |
| 2010 | Virtual prototyper (ViPro): an early design space exploration and optimization tool for SRAM designers. Satyanand Nalam, Mudit Bhargava, Ken Mai, Benton H. Calhoun |
| 2010 | What input-language is the best choice for high level synthesis (HLS)? Daniel Gajski, Todd M. Austin, Steve Svoboda |
| 2010 | What will make your next design experience a much better one? Thomas Harms, Juan-Antonio Caraballo, Reynold D'Sa, Ruud A. Haring, Derek Urbaniak, Guntram Wolski, James You |
| 2010 | What's cool for the future of ultra low power designs? Nagaraj Ns, John Byler, Koorosh Nazifi, Venugopal Puvvada, Toshiyuki Saito, Alan Gibbons, S. Balajee |
| 2010 | What's smart about the smart grid? Ian A. Hiskens |
| 2010 | Who solves the variability problem? Nagaraj Ns, Juan C. Rey, Jamil Kawa, Robert C. Aitken, Christian Lütkemeyer, Vijay Pitchumani, Andrzej J. Strojwas, Steve Trimberger |
| 2010 | Worst-case response time analysis of resource access models in multi-core systems. Andreas Schranzhofer, Rodolfo Pellizzoni, Jian-Jia Chen, Lothar Thiele, Marco Caccamo |
| 2010 | Xetal-Pro: an ultra-low energy and high throughput SIMD processor. Yifan He, Yu Pu, Richard P. Kleihorst, Zhenyu Ye, Anteneh A. Abbo, Sebastian M. Londono, Henk Corporaal |