DAC A*

198 papers

YearTitle / Authors
2004A SAT-based algorithm for reparameterization in symbolic simulation.
Pankaj Chauhan, Edmund M. Clarke, Daniel Kroening
2004A communication-theoretic design paradigm for reliable SOCs.
Naresh R. Shanbhag
2004A dual-core 64b ultraSPARC microprocessor for dense server applications.
Toshinari Takayanagi, Jinuk Luke Shin, Bruce Petrick, Jeffrey Y. Su, Ana Sonia Leon
2004A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication.
Yuichi Nakamura, Kohei Hosokawa, Ichiro Kuroda, Ko Yoshikawa, Takeshi Yoshimura
2004A fast parasitic extractor based on low-rank multilevel matrix compression for conductor and dielectric modeling in microelectronics and MEMS.
Dipanjan Gope, Swagato Chakraborty, Vikram Jandhyala
2004A frequency relaxation approach for analog/RF system-level simulation.
Xin Li, Yang Xu, Peng Li, Padmini Gopalakrishnan, Lawrence T. Pileggi
2004A general decomposition strategy for verifying register renaming.
Hazem I. Shehata, Mark D. Aagaard
2004A linear fractional transform (LFT) based model for interconnect parametric uncertainty.
Janet Meiling Wang, Omar Hafiz, Jun Li
2004A method for correcting the functionality of a wire-pipelined circuit.
Vidyasagar Nookala, Sachin S. Sapatnekar
2004A method to decompose multiple-output logic functions.
Tsutomu Sasao, Munehiro Matsuura
2004A methodology to improve timing yield in the presence of process variations.
Sreeja Raj, Sarma B. K. Vrudhula, Janet Meiling Wang
2004A new approach to latency insensitive design.
Mario R. Casu, Luca Macchiarulo
2004A new heuristic algorithm for reversible logic synthesis.
Pawel Kerntopf
2004A new state assignment technique for testing and low power.
Sungju Park, Sangwook Cho, Seiyang Yang, Maciej J. Ciesielski
2004A novel approach for flexible and consistent ADL-driven ASIP design.
Gunnar Braun, Achim Nohl, Weihua Sheng, Jianjiang Ceng, Manuel Hohenauer, Hanno Scharwächter, Rainer Leupers, Heinrich Meyr
2004A novel technique to improve noise immunity of CMOS dynamic logic circuits.
Li Ding, Pinaki Mazumder
2004A packing algorithm for non-manhattan hexagon/triangle placement design by using an adaptive o-tree representation.
Jing Li, Tan Yan, Bo Yang, Juebang Yu, Chunhui Li
2004A recursive paradigm to solve Boolean relations.
David Bañeres, Jordi Cortadella, Michael Kishinevsky
2004A robust algorithm for approximate compatible observability don't care (CODC) computation.
Nikhil Saluja, Sunil P. Khatri
2004A scalable soft spot analysis methodology for compound noise effects in nano-meter circuits.
Chong Zhao, Xiaoliang Bai, Sujit Dey
2004A stochastic approach To power grid analysis.
Sanjay Pant, David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda
2004A synthesis flow toward fast parasitic closure for radio-frequency integrated circuits.
Gang Zhang, E. Aykut Dengi, Ronald A. Rohrer, Rob A. Rutenbar, L. Richard Carley
2004A timing-driven module-based chip design flow.
Fan Mo, Robert K. Brayton
2004AMUSE: a minimally-unsatisfiable subformula extractor.
Yoonna Oh, Maher N. Mneimneh, Zaher S. Andraus, Karem A. Sakallah, Igor L. Markov
2004Abstraction of assembler programs for symbolic worst case execution time analysis.
Tobias Schüle, Klaus Schneider
2004Abstraction refinement by controllability and cooperativeness analysis.
Freddy Y. C. Mang, Pei-Hsin Ho
2004Accurate pre-layout estimation of standard cell characteristics.
Hiroaki Yoshida, Kaushik De, Vamsi Boppana
2004Adaptive data partitioning for ambient multimedia.
Xiaoping Hu, Radu Marculescu
2004An Essentially Non-Oscillatory (ENO) high-order accurate Adaptive table model for device modeling.
Baolin Yang, Bruce McGaughy
2004An SoC design methodology using FPGAs and embedded microprocessors.
Nobuyuki Ohba, Kohji Takano
2004An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design.
Sanghamitra Roy, Prithviraj Banerjee
2004An analytical approach for dynamic range estimation.
Bin Wu, Jianwen Zhu, Farid N. Najm
2004An approach to placement-coupled logic replication.
Milos Hrkic, John Lillis, Giancarlo Beraudo
2004An area estimation methodology for FPGA based designs at systemc-level.
Carlo Brandolese, William Fornaciari, Fabio Salice
2004An efficient algorithm for finding empty space for online FPGA placement.
Manish Handa, Ranga Vemuri
2004An efficient finite-domain constraint solver for circuits.
Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Li-C. Wang
2004An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory.
Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik Chae, Ahmed Amine Jerraya
2004An integrated hardware/software approach for run-time scratchpad management.
Francesco Poletti, Paul Marchal, David Atienza, Luca Benini, Francky Catthoor, Jose Manuel Mendias
2004Architecture-level synthesis for automatic interconnect pipelining.
Jason Cong, Yiping Fan, Zhiru Zhang
2004Area-efficient instruction set synthesis for reconfigurable system-on-chip designs.
Philip Brisk, Adam Kaplan, Majid Sarrafzadeh
2004Automated design of operational transconductance amplifiers using reversed geometric programming.
Johan P. Vanderhaegen, Robert W. Brodersen
2004Automated energy/performance macromodeling of embedded software.
Anish Muttreja, Anand Raghunathan, Srivaths Ravi, Niraj K. Jha
2004Automated fixed-point data-type optimization tool for signal processing and communication systems.
Changchun Shi, Robert W. Brodersen
2004Automatic abstraction and verification of verilog models.
Zaher S. Andraus, Karem A. Sakallah
2004Automatic correct scheduling of control flow intensive behavioral descriptions in formal synthesis.
Kai Kapp, Viktor K. Sabelfeld
2004Automatic generation of breakpoint hardware for silicon debug.
Bart Vermeulen, Mohammad Zalfany Urfianto, Sandeep Kumar Goel
2004Automatic generation of equivalent architecture model from functional specification.
Samar Abdi, Daniel Gajski
2004Automatic translation of software binaries onto FPGAs.
Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee
2004Benefits and challenges for platform-based design.
Alberto L. Sangiovanni-Vincentelli, Luca P. Carloni, Fernando De Bernardinis, Marco Sgroi
2004Buffer sizing for clock power minimization subject to general skew constraints.
Kai Wang, Malgorzata Marek-Sadowska
2004Business models in IP, software licensing, and services.
Ellen Sentovich, Raul Camposano, Jim Douglas, Aurangzeb Khan
2004CAD challenges in BioMEMS design.
Jacob White
2004CHIME: coupled hierarchical inductance model evaluation.
Satrajit Gupta, Lawrence T. Pileggi
2004Characterizing embedded applications for instruction-set extensible processors.
Pan Yu, Tulika Mitra
2004Circuit-aware architectural simulation.
SeokWoo Lee, Shidhartha Das, Valeria Bertacco, Todd M. Austin, David T. Blaauw, Trevor N. Mudge
2004Closed-form expressions of distributed RLC interconnects for analysis of on-chip inductance effects.
Yuichi Tanji, Hideki Asai
2004Coding for system-on-chip networks: a unified framework.
Srinivasa R. Sridhara, Naresh R. Shanbhag
2004Combining dictionary coding and LFSR reseeding for test data compression.
Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota
2004Communication-efficient hardware acceleration for fast functional simulation.
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong-Min Kyung
2004Compact thermal modeling for temperature-aware design.
Wei Huang, Mircea R. Stan, Kevin Skadron, Karthik Sankaranarayanan, Shougata Ghosh, Sivakumar Velusamy
2004Competitive strategies for the electronics industry.
Ellen Sentovich, Jaswinder Ahuja, Paul Lippe, Bernie Rosenthal
2004Correct-by-construction layout-centric retargeting of large analog designs.
Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy Hartono, Chuanjin Richard Shi
2004Data compression for improving SPM behavior.
Ozcan Ozturk, Mahmut T. Kandemir, I. Demirkiran, Guangyu Chen, Mary Jane Irwin
2004Debugging HW/SW interface for MPSoC: video encoder system design case study.
Mohamed-Wassim Youssef, Sungjoo Yoo, Arif Sasongko, Yanick Paviot, Ahmed Amine Jerraya
2004Decomposing specifications with concurrent outputs to resolve state coding conflicts in asynchronous logic synthesis.
Hemangee K. Kapoor, Mark B. Josephs
2004Defect tolerant probabilistic design paradigm for nanotechnologies.
Margarida F. Jacome, Chen He, Gustavo de Veciana, Stephen Bijansky
2004Defining coverage views to improve functional coverage analysis.
Sigal Asaf, Eitan Marcus, Avi Ziv
2004Design and implementation of the POWER5 microprocessor.
Joachim G. Clabes, Joshua Friedrich, Mark Sweet, Jack DiLullo, Sam G. Chu, Donald W. Plass, James Dawson, Paul Muench, Larry Powell, Michael S. Floyd, Balaram Sinharoy, Mike Lee, Michael Goulet, James Wagoner, Nicole S. Schwartz, Stephen L. Runyon, Gary Gorman, Phillip J. Restle, Ronald N. Kalla, Joseph McGill, J. Steve Dodson
2004Design and reliability challenges in nanometer technologies.
Shekhar Borkar, Tanay Karnik, Vivek De
2004Design automation for mask programmable fabrics.
Narendra V. Shenoy, Jamil Kawa, Raul Camposano
2004Design optimizations for microprocessors at low temperature.
Arman Vassighi, Ali Keshavarzi, Siva G. Narendra, Gerhard Schrom, Yibin Ye, Seri Lee, Greg Chrysler, Manoj Sachdev, Vivek De
2004Design tools for BioMEMS.
Tom Korsmeyer, Jun Zeng, Ken Greiner
2004Designing robust microarchitectures.
Todd M. Austin
2004Divide-and-concatenate: an architecture level optimization technique for universal hash functions.
Bo Yang, Ramesh Karri, David A. McGrew
2004DyAD: smart routing for networks-on-chip.
Jingcao Hu, Radu Marculescu
2004Dynamic FPGA routing for just-in-time FPGA compilation.
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
2004EDA: this is serious business.
Robert Dahlberg, Kurt Keutzer, R. Bingham, Aart J. de Geus, Walden C. Rhines
2004Efficient equivalence checking with partitions and hierarchical cut-points.
Demos Anastasakis, Lisa McIlwain, Slawomir Pilarski
2004Efficient on-line testing of FPGAs with provable diagnosabilities.
Vinay Verma, Shantanu Dutt, Vishal Suthar
2004Efficient power/ground network analysis for power integrity-driven design methodology.
Su-Wei Wu, Yao-Wen Chang
2004Efficient timing closure without timing driven placement and routing.
Miodrag Vujkovic, David Wadkins, William Swartz, Carl Sechen
2004Enabling energy efficiency in via-patterned gate array devices.
R. Reed Taylor, Herman Schmit
2004Energy characterization of filesystems for diskless embedded systems.
Siddharth Choudhuri, Rabi N. Mahapatra
2004Energy-aware deterministic fault tolerance in distributed real-time embedded systems.
Ying Zhang, Robert P. Dick, Krishnendu Chakrabarty
2004Exploiting input information in a model reduction algorithm for massively coupled parasitic networks.
Luís Miguel Silveira, Joel R. Phillips
2004Exploiting structure in symmetry detection for CNF.
Paul T. Darga, Mark H. Liffiton, Karem A. Sakallah, Igor L. Markov
2004Extending the transaction level modeling approach for fast communication architecture exploration.
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane
2004FITS: framework-based instruction-set tuning synthesis for embedded application specific processors.
Allen C. Cheng, Gary S. Tyson, Trevor N. Mudge
2004FPGA power reduction using configurable dual-Vdd.
Fei Li, Yan Lin, Lei He
2004Fast and accurate parasitic capacitance models for layout-aware.
Anuradha Agarwal, Hemanth Sampath, Veena Yelamanchili, Ranga Vemuri
2004Fast and flexible buffer trees that navigate the physical layout environment.
Charles J. Alpert, Milos Hrkic, Jiang Hu, Stephen T. Quay
2004Fast hazard detection in combinational circuits.
Cheoljoo Jeong, Steven M. Nowick
2004Fast statistical timing analysis handling arbitrary delay correlations.
Michael Orshansky, Arnab Bandyopadhyay
2004First-order incremental block-based statistical timing analysis.
Chandramouli Visweswariah, K. Ravindran, Kerim Kalafala, Steven G. Walker, S. Narayan
2004Flexible architectures for engineering successful SOCs.
Chris Rowen, Steve Leibson
2004Floorplanning optimization with trajectory piecewise-linear model for pipelined interconnects.
Changbo Long, Lucanus J. Simonson, Weiping Liao, Lei He
2004Forest vs. trees: where's the slack?
Paul K. Rodman
2004Heterogeneous MP-SoC: the solution to energy-efficient signal processing.
Tim Kogel, Heinrich Meyr
2004Hierarchical application aware error detection and recovery.
Ravishankar K. Iyer
2004Hierarchical approach to exact symbolic analysis of large analog circuits.
Sheldon X.-D. Tan, Weikun Guo, Zhenyu Qi
2004High level cache simulation for heterogeneous multiprocessors.
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Donald E. Thomas, Faraydon Karim
2004High-level simulation of substrate noise in high-ohmic substrates with interconnect and supply effects.
Geert Van der Plas, Mustafa Badaroglu, Gerd Vandersteen, Petr Dobrovolný, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man
2004Implicit enumeration of structural changes in circuit optimization.
Victor N. Kravets, Prabhakar Kudva
2004Implicit pseudo boolean enumeration algorithms for input vector control.
Kaviraj Chopra, Sarma B. K. Vrudhula
2004Industrial experience with test generation languages for processor verification.
Michael L. Behm, John M. Ludden, Yossi Lichtenstein, Michal Rimon, Michael Vinov
2004Introduction of local memory elements in instruction set extensions.
Partha Biswas, Vinay Choudhary, Kubilay Atasu, Laura Pozzi, Paolo Ienne, Nikil D. Dutt
2004Is statistical timing statistically significant?
Richard Goldman, Kurt Keutzer, Clive Bittlestone, Ahsan Bootehsaz, Shekhar Y. Borkar, E. Chen, Louis Scheffer, Chandramouli Visweswariah
2004LODS: locality-oriented dynamic scheduling for on-chip multiprocessors.
Mahmut T. Kandemir
2004Large-scale full-wave simulation.
Sharad Kapur, David E. Long
2004Large-scale placement by grid-warping.
Zhong Xiu, James D. Z. Ma, Suzanne M. Fowler, Rob A. Rutenbar
2004Leakage aware dynamic voltage scaling for real-time embedded systems.
Ravindra Jejurikar, Cristiano Pereira, Rajesh K. Gupta
2004Leakage in nano-scale technologies: mechanisms, impact and design considerations.
Amit Agarwal, Chris H. Kim, Saibal Mukhopadhyay, Kaushik Roy
2004Leakage-and crosstalk-aware bus encoding for total power reduction.
Harmander Deogun, Rajeev R. Rao, Dennis Sylvester, David T. Blaauw
2004Low voltage swing logic circuits for a Pentium 4 processor integer core.
Daniel J. Deleganes, Micah Barany, George L. Geannopoulos, Kurt Kreitzer, Anant P. Singh, Sapumal B. Wijeratne
2004Mapping a domain specific language to a platform FPGA.
Chidamber Kulkarni, Gordon J. Brebner, Graham Schelle
2004Memory access scheduling and binding considering energy minimization in multi-bank memory systems.
Chun-Gi Lyuh, Taewhan Kim
2004Modeling repeaters explicitly within analytical placement.
Prashant Saxena, Bill Halpin
2004Modular scheduling of guarded atomic actions.
Daniel L. Rosenband, Arvind
2004Multi-profile based code compression.
Eduardo Braulio Wanderley Netto, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo
2004Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources.
Navaratnasothie Selvakkumaran, Abhishek Ranjan, Salil Raje, George Karypis
2004Multiple constant multiplication by time-multiplexed mapping of addition chains.
Peter Tummeltshammer, James C. Hoe, Markus Püschel
2004Noise characterization of static CMOS gates.
Rouwaida Kanj, Timothy Lehner, Bhavna Agrawal, Elyse Rosenbaum
2004Nomadic platform approach for wireless mobile multimedia.
Mark Hopkins
2004Novel sizing algorithm for yield improvement under process variation in nanometer technology.
Seung Hoon Choi, Bipul Chandra Paul, Kaushik Roy
2004ORACLE: optimization with recourse of analog circuits including layout extraction.
Yang Xu, Lawrence T. Pileggi, Stephen P. Boyd
2004Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding.
Kihwan Choi, Ramakrishna Soma, Massoud Pedram
2004On designing via-configurable cell blocks for regular fabrics.
Yajun Ran, Malgorzata Marek-Sadowska
2004On path-based learning and its applications in delay test and diagnosis.
Li-C. Wang, T. M. Mak, Kwang-Ting Cheng, Magdy S. Abadir
2004On test generation for transition faults with minimized peak power dissipation.
Wei Li, Sudhakar M. Reddy, Irith Pomeranz
2004On the generation of scan-based test sets with reachable states for testing under functional operation conditions.
Irith Pomeranz
2004Operating-system controlled network on chip.
Vincent Nollet, Théodore Marescaux, Diederik Verkest, Jean-Yves Mignolet, Serge Vernalde
2004Optical proximity correction (OPC): friendly maze routing.
Li-Da Huang, Martin D. F. Wong
2004Optimal placement of power supply pads and pins.
Min Zhao, Yuhong Fu, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda
2004Parametric yield estimation considering leakage variability.
Rajeev R. Rao, Anirudh Devgan, David T. Blaauw, Dennis Sylvester
2004Passivity-preserving model reduction via a computationally efficient project-and-balance scheme.
Ngai Wong, Venkataramanan Balakrishnan, Cheng-Kok Koh
2004Performance analysis of different arbitration algorithms of the AMBA AHB bus.
Massimo Conti, Marco Caldari, Giovanni B. Vece, Simone Orcioni, Claudio Turchetti
2004Phase correct routing for alternating phase shift masks.
Kevin W. McCullen
2004Placement feedback: a concept and method for better min-cut placements.
Andrew B. Kahng, Sherief Reda
2004Platform based design: does it answer the entire SoC challenge?
Gary Smith
2004Post-layout logic optimization of domino circuits.
Aiqun Cao, Cheng-Kok Koh
2004Power minimization using simultaneous gate sizing, dual-Vdd and dual-Vth assignment.
Ashish Srivastava, Dennis Sylvester, David T. Blaauw
2004Practical repeater insertion for low power: what repeater library do we need?
Xun Liu, Yuantao Peng, Marios C. Papaefthymiou
2004Pre-layout wire length and congestion estimation.
Qinghua Liu, Malgorzata Marek-Sadowska
2004Probabilistic regression suites for functional verification.
Shai Fine, Shmuel Ur, Avi Ziv
2004Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004
Sharad Malik, Limor Fix, Andrew B. Kahng
2004Profile-based optimal intra-task voltage scheduling for hard real-time applications.
Jaewon Seo, Taewhan Kim, Ki-Seok Chung
2004Profile-guided microarchitectural floorplanning for deep submicron processor design.
Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, Sung Kyu Lim
2004Proxy-based task partitioning of watermarking algorithms for reducing energy consumption in mobile devices.
Arun Kejariwal, Sumit Gupta, Alexandru Nicolau, Nikil D. Dutt, Rajesh Gupta
2004Quadratic placement using an improved timing model.
Bernd Obermeier, Frank M. Johannes
2004Quantum logic synthesis by symbolic reachability analysis.
William N. N. Hung, Xiaoyu Song, Guowu Yang, Jin Yang, Marek A. Perkowski
2004Quantum-Dot Cellular Automata (QCA) circuit partitioning: problem modeling and solutions.
Dominic A. Antonelli, Danny Z. Chen, Timothy J. Dysart, Xiaobo Sharon Hu, Andrew B. Kahng, Peter M. Kogge, Richard C. Murphy, Michael T. Niemier
2004Re-synthesis for delay variation tolerance.
Shih-Chieh Chang, Cheng-Tao Hsieh, Kai-Chiang Wu
2004Reducing clock skew variability via cross links.
Anand Rajaram, Jiang Hu, Rabi N. Mahapatra
2004Refining the SAT decision ordering for bounded model checking.
Chao Wang, HoonSang Jin, Gary D. Hachtel, Fabio Somenzi
2004Reliability-driven layout decompaction for electromigration failure avoidance in complex mixed-signal IC designs.
Goeran Jerke, Jens Lienig, Jürgen Scheible
2004Reliable communication in systems on chips.
Giovanni De Micheli
2004Requirement-based design methods for adaptive communications links.
Juan Antonio Carballo, Kevin J. Nowka, Seung-Moon Yoo, Ivan Vo, Clay Cranford, V. Robert Norman
2004Retargetable profiling for rapid, early system-level design space exploration.
Lukai Cai, Andreas Gerstlauer, Daniel Gajski
2004Robust, stable time-domain methods for solving MPDEs of fast/slow systems.
Ting Mei, Jaijeet S. Roychowdhury, Todd S. Coffey, Scott A. Hutchinson, David M. Day
2004Routing architecture exploration for regular fabrics.
V. Kheterpal, Andrzej J. Strojwas, Lawrence T. Pileggi
2004STAC: statistical timing analysis with correlation.
Jiayong Le, Xin Li, Lawrence T. Pileggi
2004SUNMAP: a tool for automatic topology selection and generation for NoCs.
Srinivasan Murali, Giovanni De Micheli
2004Scalable selector architecture for x-tolerant deterministic BIST.
Peter Wohl, John A. Waicukauski, Sanjay Patel
2004Scan-BIST based on transition probabilities.
Irith Pomeranz
2004Security as a new dimension in embedded system design.
Srivaths Ravi, Paul C. Kocher, Ruby B. Lee, Gary McGraw, Anand Raghunathan
2004Selective gate-length biasing for cost-effective runtime leakage control.
Puneet Gupta, Andrew B. Kahng, Puneet Sharma, Dennis Sylvester
2004Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant era.
Anirban Basu, Sheng-Chih Lin, Vineet Wason, Amit Mehrotra, Kaustav Banerjee
2004Sparse transformations and preconditioners for hierarchical 3-D capacitance extraction with multiple dielectrics.
Shu Yan, Vivek Sarin, Weiping Shi
2004Specific scheduling support to minimize the reconfiguration overhead of dynamically reconfigurable hardware.
Javier Resano, Daniel Mozos
2004Static timing analysis using backward signal propagation.
Dongwoo Lee, Vladimir Zolotov, David T. Blaauw
2004Statistical gate delay model considering multiple input switching.
Aseem Agarwal, Florentin Dartu, David T. Blaauw
2004Statistical optimization of leakage power considering process variations using dual-Vth and sizing.
Ashish Srivastava, Dennis Sylvester, David T. Blaauw
2004Statistical timing analysis based on a timing yield model.
Farid N. Najm, Noel Menezes
2004Statistical timing analysis in sequential circuit for on-chip global interconnect pipelining.
Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen
2004Symmetry detection for incompletely specified functions.
Kuo-Hua Wang, Jia-Hung Chen
2004Synthesizing interconnect-efficient low density parity check codes.
Marghoob Mohiyuddin, Amit Prakash, Adnan Aziz, Wayne H. Wolf
2004System design for DSP applications in transaction level modeling paradigm.
Abhijit K. Deb, Axel Jantsch, Johnny Öberg
2004System level design: six success stories in search of an industry.
Francine Bacchini, Pierre G. Paulin, Reinaldo A. Bergamaschi, Raj Pawate, Arie Bernstein, Ramesh Chandra, Mohamed Ben-Romdhane
2004System level leakage reduction considering the interdependence of temperature and leakage.
Lei He, Weiping Liao, Mircea R. Stan
2004Systematic functional coverage metric synthesis from hierarchical temporal event relation graph.
Young-Su Kwon, Young-Il Kim, Chong-Min Kyung
2004The best of both worlds: the efficient asynchronous implementation of synchronous specifications.
Abhijit Davare, Kelvin Lwin, Alex Kondratyev, Alberto L. Sangiovanni-Vincentelli
2004The future of multiprocessor systems-on-chips.
Wayne H. Wolf
2004Theoretical and practical limits of dynamic voltage scaling.
Bo Zhai, David T. Blaauw, Dennis Sylvester, Krisztián Flautner
2004Timing closure for low-FO4 microprocessor design.
David S. Kung
2004Timing closure through a globally synchronous, timing partitioned design methodology.
Anders Edman, Christer Svensson
2004Toward a methodology for manufacturability-driven design rule exploration.
Luigi Capodieci, Puneet Gupta, Andrew B. Kahng, Dennis Sylvester, Jie Yang
2004Toward a systematic-variation aware timing methodology.
Puneet Gupta, Fook-Luen Heng
2004Tradeoffs between date oxide leakage and delay for dual T
Anup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar
2004Trends in the use of re-configurable platforms.
Max Baron
2004Variational delay metrics for interconnect timing analysis.
Kanak Agarwal, Dennis Sylvester, David T. Blaauw, Frank Liu, Sani R. Nassif, Sarma B. K. Vrudhula
2004Verification: what works and what doesn't.
Francine Bacchini, Robert F. Damiano, Bob Bentley, Kurt Baty, Kevin Normoyle, Makoto Ishii, Einat Yogev
2004Verifying a gigabit ethernet switch using SMV.
Yuan Lu, Mike Jorda
2004Virtual memory window for application-specific reconfigurable coprocessors.
Miljan Vuletic, Laura Pozzi, Paolo Ienne
2004Were the good old days all that good?: EDA then and now.
Shishpal Rawat, William H. Joyner Jr., John A. Darringer, Daniel Gajski, Pat O. Pistilli, Hugo De Man, Carl Harris, James Solomon
2004What happened to ASIC?: Go (recon)figure?
Nitin Deo, Behrooz Zahiri, Ivo Bolsens, Jason Cong, Bhusan Gupta, Philip Lopresti, Christopher B. Reynolds, Chris Rowen, Ray Simar
2004When IC yield missed the target, who is at fault?
Andreas J. Strojwas, Michael Campbell, Vassilios Gerousis, Jim Hogan, John Kibarian, Marc Levitt, Walter Ng, Dipu Pramanik, Mark Templeton
2004Will Moore's Law rule in the land of analog?
Rob A. Rutenbar, Anthony R. Bonaccio, Teresa H. Meng, Ernesto Perea, Robert Pitts, Charles G. Sodini, Jim Wieser
2004Worst-case circuit delay taking into account power supply variations.
Dionysios Kouroussis, Rubil Ahmadi, Farid N. Najm