| 2003 | 4G terminals: how are we going to design them? Jan Craninckx, Stéphane Donnay |
| 2003 | A 1.3GHz fifth generation SPARC64 microprocessor. Hisashige Ando, Yuuji Yoshida, Aiichiro Inoue, Itsumi Sugiyama, Takeo Asakawa, Kuniki Morita, Toshiyuki Muta, Tsuyoshi Motokurumada, Seishi Okada, Hideo Yamashita, Yoshihiko Satsukawa, Akihiko Konmoto, Ryouichi Yamashita, Hiroyuki Sugiyama |
| 2003 | A 1.5GHz third generation itanium® 2 processor. Jason Stinson, Stefan Rusu |
| 2003 | A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference. Robert M. Senger, Eric D. Marsman, Michael S. McCorquodale, Fadi H. Gebara, Keith L. Kraver, Matthew R. Guthaus, Richard B. Brown |
| 2003 | A TBR-based trajectory piecewise-linear algorithm for generating accurate low-order models for nonlinear analog circuits and MEMS. Dmitry Vasilyev, Michal Rewienski, Jacob White |
| 2003 | A complexity effective communication model for behavioral modeling of signal processing applications. M. N. V. Satya Kiran, M. N. Jayram, Pradeep Rao, S. K. Nandy |
| 2003 | A cost-driven lithographic correction methodology based on off-the-shelf sizing tools. Puneet Gupta, Andrew B. Kahng, Dennis Sylvester, Jie Yang |
| 2003 | A cost-effective scan architecture for scan testing with non-scan test power and test application cost. Dong Xiang, Shan Gu, Jia-Guang Sun, Yu-Liang Wu |
| 2003 | A fast pseudo-boolean constraint solver. Donald Chai, Andreas Kuehlmann |
| 2003 | A fully-programmable memory management system optimizing queue handling at multi-gigabit rates. George Kornaros, Ioannis Papaefstathiou, Aristides Nikologiannis, Nicholaos Zervos |
| 2003 | A hybrid SAT-based decision procedure for separation logic with uninterpreted functions. Sanjit A. Seshia, Shuvendu K. Lahiri, Randal E. Bryant |
| 2003 | A low-energy chip-set for wireless intercom. M. Josie Ammer, Michael Sheets, Tufan C. Karalar, Mika Kuulusa, Jan M. Rabaey |
| 2003 | A new enhanced constructive decomposition and mapping algorithm. Alan Mishchenko, Xinning Wang, Timothy Kam |
| 2003 | A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory. Michele Borgatti, Lorenzo Cali, Guido De Sandre, Benoit Forêt, David Iezzi, Francesco Lertora, Gilberto Muzzi, Marco Pasotti, Marco Poles, Pier Luigi Rolandi |
| 2003 | A retargetable micro-architecture simulator. Wai Sum Mong, Jianwen Zhu |
| 2003 | A scalable software-based self-test methodology for programmable processors. Li Chen, Srivaths Ravi, Anand Raghunathan, Sujit Dey |
| 2003 | A scan BIST generation method using a markov source and partial bit-fixing. Wei Li, Chaowen Yu, Sudhakar M. Reddy, Irith Pomeranz |
| 2003 | A signal correlation guided ATPG solver and its applications for solving difficult industrial cases. Feng Lu, Li-C. Wang, Kwang-Ting Cheng, John Moondanos, Ziyad Hanna |
| 2003 | A static pattern-independent technique for power grid voltage integrity verification. Dionysios Kouroussis, Farid N. Najm |
| 2003 | A survey of techniques for energy efficient on-chip communication. Vijay Raghunathan, Mani B. Srivastava, Rajesh K. Gupta |
| 2003 | A timing-accurate modeling and simulation environment for networked embedded systems. Franco Fummi, Giovanni Perbellini, Paolo Gallo, Massimo Poncino, Stefano Martini, Fabio Ricciato |
| 2003 | A tool for describing and evaluating hierarchical real-time bus scheduling policies. Trevor Meyerowitz, Claudio Pinello, Alberto L. Sangiovanni-Vincentelli |
| 2003 | A transformation based algorithm for reversible logic synthesis. D. Michael Miller, Dmitri Maslov, Gerhard W. Dueck |
| 2003 | Accurate estimation of total leakage current in scaled CMOS logic circuits based on compact current modeling. Saibal Mukhopadhyay, Arijit Raychowdhury, Kaushik Roy |
| 2003 | Accurate timing analysis by modeling caches, speculation and their interaction. Xianfeng Li, Tulika Mitra, Abhik Roychoudhury |
| 2003 | Advanced techniques for RTL debugging. Yu-Chin Hsu, Bassam Tabbara, Yirng-An Chen, Fur-Shing Tsai |
| 2003 | Algorithms in FastImp: a fast and wideband impedance extraction program for complicated 3-D geometries. Zhenhai Zhu, Ben Song, Jacob White |
| 2003 | An IDF-based trace transformation method for communication refinement. Andy D. Pimentel, Cagkan Erbas |
| 2003 | An O(nlogn) time algorithm for optimal buffer insertion. Weiping Shi, Zhuo Li |
| 2003 | An adaptive window-based susceptance extraction and its efficient implementation. Guoan Zhong, Cheng-Kok Koh, Venkataramanan Balakrishnan, Kaushik Roy |
| 2003 | An algebraic multigrid solver for analytical placement with layout based clustering. Hongyu Chen, Chung-Kuan Cheng, Nan-Chi Chou, Andrew B. Kahng, John F. MacDonald, Peter Suaris, Bo Yao, Zhengyong Zhu |
| 2003 | An arbitrary twoqubit computation In 23 elementary gates or less. Stephen S. Bullock, Igor L. Markov |
| 2003 | An effective capacitance based driver output model for on-chip RLC interconnects. Kanak Agarwal, Dennis Sylvester, David T. Blaauw |
| 2003 | Analog and RF circuit macromodels for system-level analysis. Xin Li, Peng Li, Yang Xu, Lawrence T. Pileggi |
| 2003 | Analysis and minimization techniques for total leakage considering gate oxide leakage. Dongwoo Lee, Wesley Kwong, David T. Blaauw, Dennis Sylvester |
| 2003 | Application of design patterns for hardware design. Robertas Damasevicius, Giedrius Majauskas, Vytautas Stuikys |
| 2003 | Architecting ASIC libraries and flows in nanometer era. Clive Bittlestone, Anthony M. Hill, Vipul Singhal, N. V. Arvind |
| 2003 | Architectural selection of A/D converters. Martin Vogels, Georges G. E. Gielen |
| 2003 | Architecture-level performance evaluation of component-based embedded systems. Jeffry T. Russell, Margarida F. Jacome |
| 2003 | Automated synthesis of efficient binary decoders for retargetable software toolkits. Wei Qin, Sharad Malik |
| 2003 | Automatic application-specific instruction-set extensions under microarchitectural constraints. Kubilay Atasu, Laura Pozzi, Paolo Ienne |
| 2003 | Automatic communication refinement for system level design. Samar Abdi, Dongwan Shin, Daniel Gajski |
| 2003 | Automatic trace analysis for logic of constraints. Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe |
| 2003 | Automating the design of an asynchronous DLX microprocessor. Manish Amde, Ivan Blunno, Christos P. Sotiriou |
| 2003 | Behavioral consistency of C and verilog programs using bounded model checking. Edmund M. Clarke, Daniel Kroening, Karen Yorav |
| 2003 | Blade and razor: cell and interconnect delay analysis using current-based models. John F. Croix, D. F. Wong |
| 2003 | COT - customer owned trouble. Robert Dahlberg, Shishpal Rawat, Jen Bernier, Gina Gloski, Aurangzeb Khan, Kaushik Patel, Paul Ruddy, Naveed A. Sherwani, Ronnie Vasishta |
| 2003 | Characterizing the effects of clock jitter due to substrate noise in discrete-time D/S modulators. Payam Heydari |
| 2003 | Checking satisfiability of a conjunction of BDDs. Robert F. Damiano, James H. Kukula |
| 2003 | Clock-tree power optimization based on RTL clock-gating. Monica Donno, Alessandro Ivaldi, Luca Benini, Enrico Macii |
| 2003 | CoCo: a hardware/software platform for rapid prototyping of code compression technologies. Haris Lekatsas, Jörg Henkel, Srimat T. Chakradhar, Venkata Jakkula, Murugan Sankaradass |
| 2003 | Compiler-generated communication for pipelined FPGA applications. Heidi E. Ziegler, Mary W. Hall, Pedro C. Diniz |
| 2003 | Computation and Refinement of Statistical Bounds on Circuit Delay. Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Sarma B. K. Vrudhula |
| 2003 | Computation of noise spectral density in switched capacitor circuits using the mixed-frequency-time technique. Vinita Vasudevan, M. Ramakrishna |
| 2003 | Constraint synthesis for environment modeling in functional verification. Jun Yuan, Ken Albin, Adnan Aziz, Carl Pixley |
| 2003 | Coverage directed test generation for functional verification using bayesian networks. Shai Fine, Avi Ziv |
| 2003 | Coverage-oriented verification of banias. Alon Gluska |
| 2003 | Crosstalk noise in FPGAs. Yajun Ran, Malgorzata Marek-Sadowska |
| 2003 | Data communication estimation and reduction for reconfigurable systems. Adam Kaplan, Philip Brisk, Ryan Kastner |
| 2003 | Death, taxes and failing chips. Chandu Visweswariah |
| 2003 | Delay and slew metrics using the lognormal distribution. Charles J. Alpert, Frank Liu, Chandramouli V. Kashyap, Anirudh Devgan |
| 2003 | Delay budgeting in sequential circuit with application on FPGA placement. Chao-Yang Yeh, Malgorzata Marek-Sadowska |
| 2003 | Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system. David D. Hwang, Bo-Cheng Lai, Patrick Schaumont, Kazuo Sakiyama, Yi Fan, Shenglin Yang, Alireza Hodjat, Ingrid Verbauwhede |
| 2003 | Design of a 10GHz clock distribution network using coupled standing-wave oscillators. Frank O'Mahony, C. Patrick Yue, Mark Horowitz, S. Simon Wong |
| 2003 | Design of a 17-million gate network processor using a design factory. Gilles-Eric Descamps, Satish Bagalkotkar, Subramaniam Ganesan, Satish Iyengar, Alain Pirson |
| 2003 | Design techniques for sensor appliances: foundations and light compass case study. Jennifer L. Wong, Seapahn Megerian, Miodrag Potkonjak |
| 2003 | Designing and implementing small quantum circuits and algorithms. Ben Travaglione |
| 2003 | Designing fault tolerant systems into SRAM-based FPGAs. Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz Reis |
| 2003 | Designing mega-ASICs in nanogate technologies. David E. Lackey, Paul S. Zuchowski, Jürgen Koehl |
| 2003 | Determining appropriate precisions for signals in fixed-point IIR filters. Joan Carletta, Robert J. Veillette, Frederick W. Krach, Zhengwei Fang |
| 2003 | Distributed sleep transistor network for power reduction. Changbo Long, Lei He |
| 2003 | Dos and don'ts of CTL state coverage estimation. Nikhil Jayakumar, Mitra Purandare, Fabio Somenzi |
| 2003 | Dynamic global buffer planning optimization based on detail block locating and congestion analysis. Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Yici Cai, Chung-Kuan Cheng, Jun Gu |
| 2003 | Dynamic hardware/software partitioning: a first approach. Greg Stitt, Roman L. Lysecky, Frank Vahid |
| 2003 | Efficient compression and application of deterministic patterns in a logic BIST architecture. Peter Wohl, John A. Waicukauski, Sanjay Patel, Minesh B. Amin |
| 2003 | Efficient description of the design space of analog circuits. Maria del Mar Hershenson |
| 2003 | Efficient model order reduction including skin effect. Shizhong Mei, Chirayu S. Amin, Yehea I. Ismail |
| 2003 | Embedded intelligent SRAM. Prabhat Jain, G. Edward Suh, Srinivas Devadas |
| 2003 | Emerging markets: design goes global. Chi-Foon Chan, Deirdre Hanford, Jian Yue Pan, Narendra V. Shenoy, Mahesh Mehendale, A. Vasudevan, Shaojun Wei |
| 2003 | Enabling scheduling analysis of heterogeneous systems with multi-rate data dependencies and rate intervals. Marek Jersak, Rolf Ernst |
| 2003 | Energy reduction techniques for multimedia applications with tolerance to deadline misses. Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya |
| 2003 | Energy-aware MPEG-4 FGS streaming. Kihwan Choi, Kwanho Kim, Massoud Pedram |
| 2003 | Energy-aware design techniques for differential power analysis protection. Luca Benini, Alberto Macii, Enrico Macii, Elvira Omerbegovic, Fabrizio Pro, Massimo Poncino |
| 2003 | Enhancing diagnosis resolution for delay defects based upon statistical timing and statistical fault models. Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou, T. M. Mak |
| 2003 | Exploring regular fabrics to optimize the performance-cost trade-off. Lawrence T. Pileggi, Herman Schmit, Andrzej J. Strojwas, Padmini Gopalakrishnan, V. Kheterpal, Aneesh Koorapaty, Chetan Patel, Vyacheslav Rovner, Kim Yaw Tong |
| 2003 | Extending the lifetime of a network of battery-powered mobile devices by remote processing: a markovian decision-based approach. Peng Rong, Massoud Pedram |
| 2003 | Fast timing-driven partitioning-based placement for island style FPGAs. Pongstorn Maidee, Cristinel Ababei, Kia Bazargan |
| 2003 | Fast, cheap and under control: the next implementation fabric. Abbas El Gamal, Ivo Bolsens, Andy Broom, Christopher Hamlin, Philippe Magarshack, Zvi Or-Bach, Lawrence T. Pileggi |
| 2003 | Force directed mongrel with physical net constraints. Sung-Woo Hur, Tung Cao, Karthik Rajagopal, Yegna Parasuram, Amit Chowdhary, Vladimir Tiourin, Bill Halpin |
| 2003 | Formal verification - prove it or pitch it. Rajesh K. Gupta, Shishpal Rawat, Sandeep K. Shukla, Brian Bailey, Daniel K. Beece, Masahiro Fujita, Carl Pixley, John O'Leary, Fabio Somenzi |
| 2003 | Fractional-N frequency synthesizer design at the transfer function level using a direct closed loop realization algorithm. Charlotte Y. Lau, Michael H. Perrott |
| 2003 | Gain-based technology mapping for discrete-size cell libraries. Bo Hu, Yosinori Watanabe, Alex Kondratyev, Malgorzata Marek-Sadowska |
| 2003 | Generalized cofactoring for logic function evaluation. Yunjian Jiang, Slobodan Matic, Robert K. Brayton |
| 2003 | Global resource sharing for synthesis of control data flow graphs on FPGAs. Seda Ogrenci Memik, Gokhan Memik, Roozbeh Jafari, Eren Kursun |
| 2003 | High level formal verification of next-generation microprocessors. Thomas Schubert |
| 2003 | High-level synthesis of asynchronous systems by data-driven decomposition. Catherine G. Wong, Alain J. Martin |
| 2003 | How to make efficient communication, collaboration, and optimization from system to chip. Akira Matsuzawa |
| 2003 | Hybrid hierarchical timing closure methodology for a high performance and low power DSP. Kaijian Shi, Graig Godwin |
| 2003 | Implications of technology scaling on leakage reduction techniques. Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin |
| 2003 | Improved global routing through congestion estimation. Raia Hadsell, Patrick H. Madden |
| 2003 | Improved indexing for cache miss reduction in embedded systems. Tony Givargis |
| 2003 | Improvements in functional simulation addressing challenges in large, distributed industry projects. Klaus-Dieter Schubert |
| 2003 | Instruction encoding synthesis for architecture exploration using hierarchical processor models. Achim Nohl, Volker Greive, Gunnar Braun, Andreas Hoffmann, Rainer Leupers, Oliver Schliebusch, Heinrich Meyr |
| 2003 | Instruction set compiled simulation: a technique for fast and flexible instruction set simulation. Mehrdad Reshadi, Prabhat Mishra, Nikil D. Dutt |
| 2003 | Interconnect and noise immunity design for the Pentium 4 processor. Rajesh Kumar |
| 2003 | Interprocedural optimizations for improving data cache performance of array-intensive embedded applications. Wei Zhang, Guangyu Chen, Mahmut T. Kandemir, Mustafa Karaköy |
| 2003 | Large-scale SOP minimization using decomposition and functional properties. Alan Mishchenko, Tsutomu Sasao |
| 2003 | Leading-edge and future design challenges - is the classical EDA ready? Gregory S. Spirakis |
| 2003 | Learning from BDDs in SAT-based bounded model checking. Aarti Gupta, Malay K. Ganai, Chao Wang, Zijiang Yang, Pranav Ashar |
| 2003 | Libraries: lifejacket or straitjacket. Carl Sechen, Barbara Chappel, Jim Hogan, Andrew Moore, Tadahiko Nakamura, Gregory A. Northrop, Anjaneya Thakar |
| 2003 | Low-power design methodology for an on-chip bus with adaptive bandwidth capability. Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III |
| 2003 | Making cyclic circuits acyclic. Stephen A. Edwards |
| 2003 | Manipulation and characterization of molecular scale components. Islamshah Amlani, Ruth Zhang, John Tresek, Larry Nagahara, Raymond K. Tsui |
| 2003 | Memory layout techniques for variables utilizing efficient DRAM access modes in embedded system design. Yoonseo Choi, Taewhan Kim |
| 2003 | Microarchitecture evaluation with physical planning. Jason Cong, Ashok Jagannathan, Glenn Reinman, Michail Romesis |
| 2003 | Mixed signals on mixed-signal: the right next technology. Rob A. Rutenbar, David L. Harame, Kurt Johnson, Paul Kempf, Teresa H. Meng, Reza Rofougaran, James Spoto |
| 2003 | Model order reduction of nonuniform transmission lines using integrated congruence transform. Emad Gad, Michel S. Nakhla |
| 2003 | Multilevel floorplanning/placement for large-scale modules using B*-trees. Hsun-Cheng Lee, Yao-Wen Chang, Jer-Ming Hsu, Hannah Honghua Yang |
| 2003 | Multilevel global placement with retiming. Jason Cong, Xin Yuan |
| 2003 | NORM: compact model order reduction of weakly nonlinear systems. Peng Li, Lawrence T. Pileggi |
| 2003 | Nanometer design: place your bets. Andrew B. Kahng, Shekhar Borkar, John M. Cohn, Antun Domic, Patrick Groeneveld, Louis Scheffer, Jean-Pierre Schoellkopf |
| 2003 | New techniques for non-linear behavioral modeling of microwave/RF ICs from simulation and nonlinear microwave measurements. David E. Root, John Wood, Nick Tufillaro |
| 2003 | Non-iterative switching window computation for delay-noise. Bhavana Thudi, David T. Blaauw |
| 2003 | On test data compression and n-detection test sets. Irith Pomeranz, Sudhakar M. Reddy |
| 2003 | On-chip interconnect-aware design and modeling methodology, based on high bandwidth transmission line devices. David Goren, Michael Zelikson, Rachel Gordin, Israel A. Wagner, Anastasia Barger, Alon Amir, Betty Livshitz, Anatoly Sherman, Youri Tretiakov, Robert A. Groves, J. Park, Donald L. Jordan, Sue E. Strang, Raminderpal Singh, Carl E. Dickey, David L. Harame |
| 2003 | On-chip logic minimization. Roman L. Lysecky, Frank Vahid |
| 2003 | On-chip power supply network optimization using multigrid-based technique. Kai Wang, Malgorzata Marek-Sadowska |
| 2003 | Optimal integer delay budgeting on directed acyclic graphs. Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahashi, Majid Sarrafzadeh |
| 2003 | Optimal voltage allocation techniques for dynamically variable voltage processors. Woo-Cheol Kwon, Taewhan Kim |
| 2003 | Optimizations for a simulator construction system supporting reusable components. David A. Penry, David I. August |
| 2003 | Optimum positioning of interleaved repeaters In bidirectional buses. Maged Ghoneima, Yehea I. Ismail |
| 2003 | Parameter variations and impact on circuits and microarchitecture. Shekhar Borkar, Tanay Karnik, Siva G. Narendra, James W. Tschanz, Ali Keshavarzi, Vivek De |
| 2003 | Partial task assignment of task graphs under heterogeneous resource constraints. Radoslaw Szymanek, Krzysztof Kuchcinski |
| 2003 | Performance trade-off analysis of analog circuits by normal-boundary intersection. Guido Stehr, Helmut E. Graeb, Kurt Antreich |
| 2003 | Performance-impact limited area fill synthesis. Yu Chen, Puneet Gupta, Andrew B. Kahng |
| 2003 | Physical synthesis methodology for high performance microprocessors. Yiu-Hing Chan, Prabhakar Kudva, Lisa B. Lacey, Gregory A. Northrop, Thomas E. Rosser |
| 2003 | Piecewise polynomial nonlinear model reduction. Ning Dong, Jaijeet S. Roychowdhury |
| 2003 | Post-route gate sizing for crosstalk noise reduction. Murat R. Becer, David T. Blaauw, Ilan Algor, Rajendran Panda, Chanhee Oh, Vladimir Zolotov, Ibrahim N. Hajj |
| 2003 | Power grid reduction based on algebraic multigrid principles. Haihua Su, Emrah Acar, Sani R. Nassif |
| 2003 | Power network analysis using an adaptive algebraic multigrid approach. Zhengyong Zhu, Bo Yao, Chung-Kuan Cheng |
| 2003 | Power-aware issue queue design for speculative instructions. Tali Moreshet, R. Iris Bahar |
| 2003 | Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003 |
| 2003 | Pushing ASIC performance in a power envelope. Ruchir Puri, Leon Stok, John M. Cohn, David S. Kung, David Z. Pan, Dennis Sylvester, Ashish Srivastava, Sarvesh H. Kulkarni |
| 2003 | Quantum-dot cellular automata: computing by field polarization. Gary H. Bernstein |
| 2003 | RF front end application and technology trends. Pieter W. Hooijmans |
| 2003 | Random walks in a supply network. Haifeng Qian, Sani R. Nassif, Sachin S. Sapatnekar |
| 2003 | Re-use-centric architecture for a fully accelerated testbench environment. Renate Henftling, Andreas Zinn, Matthias Bauer, Martin Zambaldi, Wolfgang Ecker |
| 2003 | Realizable RLCK circuit crunching. Chirayu S. Amin, Masud H. Chowdhury, Yehea I. Ismail |
| 2003 | Realizable parasitic reduction using generalized Y-Delta transformation. Zhanhai Qin, Chung-Kuan Cheng |
| 2003 | Recent advances and future prospects in single-electronics. Christoph Wasshuber |
| 2003 | Reshaping EDA for power. Jan M. Rabaey, Dennis Sylvester, David T. Blaauw, Kerry Bernstein, Jerry Frenkil, Mark Horowitz, Wolfgang Nebel, Takayasu Sakurai, Andrew Yang |
| 2003 | SAT-based unbounded symbolic model checking. Hyeong-Ju Kang, In-Cheol Park |
| 2003 | Scalable modeling and optimization of mode transitions based on decoupled power management architecture. Dexin Li, Qiang Xie, Pai H. Chou |
| 2003 | Schedulers as model-based design elements in programmable heterogeneous multiprocessors. JoAnn M. Paul, Alex Bobrek, Jeffrey E. Nelson, Joshua J. Pieper, Donald E. Thomas |
| 2003 | Seamless multi-radio integration challenges. Uri Barkai |
| 2003 | Seed encoding with LFSRs and cellular automata. Ahmad A. Al-Yamani, Edward J. McCluskey |
| 2003 | Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL. John G. Maneatis, Jaeha Kim, Iain McClatchie, Jay Maxey, Manjusha Shankaradas |
| 2003 | Shatter: efficient symmetry-breaking for boolean satisfiability. Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah |
| 2003 | Simple metrics for slew rate of RC circuits based on two circuit moments. Kanak Agarwal, Dennis Sylvester, David T. Blaauw |
| 2003 | Solving the latch mapping problem in an industrial setting. Kelvin Ng, Mukul R. Prasad, Rajarshi Mukherjee, Jawahar Jain |
| 2003 | State-based power analysis for systems-on-chip. Reinaldo A. Bergamaschi, Yunjian Jiang |
| 2003 | Static analysis of transaction-level models. Giovanni Agosta, Francesco Bruschi, Donatella Sciuto |
| 2003 | Static leakage reduction through simultaneous threshold voltage and state assignment. Dongwoo Lee, David T. Blaauw |
| 2003 | Static noise analysis with noise windows. Ken Tseng, Vinod Kariat |
| 2003 | Statistical estimation of leakage-induced power grid voltage drop considering within-die process variations. Imad A. Ferzli, Farid N. Najm |
| 2003 | Statistical timing for parametric yield prediction of digital integrated circuits. Jochen A. G. Jess, Kerim Kalafala, Srinath R. Naidu, Ralph H. J. M. Otten, Chandramouli Visweswariah |
| 2003 | Support vector machines for analog circuit performance representation. Fernando De Bernardinis, Michael I. Jordan, Alberto L. Sangiovanni-Vincentelli |
| 2003 | Switch-level emulation. Ali Reza Ejlali, Seyed Ghassem Miremadi |
| 2003 | Symbolic analysis of analog circuits with hard nonlinearity. Alicia Manthe, Zhao Li, Chuanjin Richard Shi |
| 2003 | Symbolic representation with ordered function templates. Amit Goel, Gagan Hasteer, Randal E. Bryant |
| 2003 | Synthesizing optimal filters for crosstalk-cancellation for high-speed buses. Jihong Ren, Mark R. Greenstreet |
| 2003 | System-on-chip beyond the nanometer wall. Philippe Magarshack, Pierre G. Paulin |
| 2003 | Temporofunctional crosstalk noise analysis. Donald Chai, Alex Kondratyev, Yajun Ran, Kenneth H. Tseng, Yosinori Watanabe, Malgorzata Marek-Sadowska |
| 2003 | Test application time and volume compression through seed overlapping. Wenjing Rao, Ismet Bayraktaroglu, Alex Orailoglu |
| 2003 | Test cost reduction for SOCs using virtual TAMs and lagrange multipliers. Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski, Krishnendu Chakrabarty |
| 2003 | Test generation for designs with multiple clocks. Xijiang Lin, Rob Thompson |
| 2003 | The synthesis of cyclic combinational circuits. Marc D. Riedel, Jehoshua Bruck |
| 2003 | Timing optimization of FPGA placements by logic replication. Giancarlo Beraudo, John Lillis |
| 2003 | Toward efficient static analysis of finite-precision effects in DSP applications via affine arithmetic modeling. Claire Fang Fang, Rob A. Rutenbar, Markus Püschel, Tsuhan Chen |
| 2003 | Tutorial: basic concepts in quantum circuits. John P. Hayes |
| 2003 | Ultimate low cost analog BIST. Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin |
| 2003 | Using a formal specification and a model checker to monitor and direct simulation. Serdar Tasiran, Yuan Yu, Brannon Batson |
| 2003 | Using embedded infrastructure IP for SOC post-silicon verification. Yu Huang, Wu-Tung Cheng |
| 2003 | Using estimates from behavioral synthesis tools in compiler-directed design space exploration. Byoungro So, Pedro C. Diniz, Mary W. Hall |
| 2003 | Using satisfiability in application-dependent testing of FPGA interconnects. Mehdi Baradaran Tahoori |
| 2003 | Vector potential equivalent circuit based on PEEC inversion. Hao Yu, Lei He |
| 2003 | Verification strategy for integration 3G baseband SoC. Yves Mathys, André Chátelain |
| 2003 | Verilog HDL, powered by PLI: a suitable framework for describing and modeling asynchronous circuits at all levels of abstraction. Arash Saifhashemi, Hossein Pedram |
| 2003 | Wire length prediction based clustering and its application in placement. Bo Hu, Malgorzata Marek-Sadowska |
| 2003 | Xtream-Fit: an energy-delay efficient data memory subsystem for embedded media processing. Anand Ramachandran, Margarida F. Jacome |