DAC A*

170 papers

YearTitle / Authors
2002A comparison of three verification techniques: directed testing, pseudo-random testing and property checking.
Mike Bartley, Darren Galpin, Tim Blackmore
2002A detailed cost model for concurrent use with hardware/software co-design.
Daniel Ragan, Peter Sandborn, Paul Stoaks
2002A factorization-based framework for passivity-preserving model reduction of RLC systems.
Q. Su, Venkataramanan Balakrishnan, Cheng-Kok Koh
2002A fast on-chip profiler memory.
Roman L. Lysecky, Susan Cotterell, Frank Vahid
2002A fast optical propagation technique for modeling micro-optical systems.
Timothy P. Kurzweg, Steven P. Levitan, Jose A. Martinez, Mark Kahrs, Donald M. Chiarulli
2002A fast, inexpensive and scalable hardware acceleration technique for functional simulation.
Srihari Cadambi, Chandra Mulpuri, Pranav Ashar
2002A flexible accelerator for layer 7 networking applications.
Gokhan Memik, William H. Mangione-Smith
2002A framework for evaluating design tradeoffs in packet processing architectures.
Lothar Thiele, Samarjit Chakraborty, Matthias Gries, Simon Künzli
2002A general probabilistic framework for worst case timing analysis.
Michael Orshansky, Kurt Keutzer
2002A hybrid verification approach: getting deep into the design.
Scott Hazelhurst, Osnat Weissberg, Gila Kamhi, Limor Fix
2002A novel synthesis technique for communication controller hardware from declarative data communication protocol specifications.
Robert Siegmund, Dietmar Müller
2002A novel wavelet transform based transient current analysis for fault detection and localization.
Swarup Bhunia, Kaushik Roy, Jaume Segura
2002A physical model for the transient response of capacitively loaded distributed rlc interconnects.
Raguraman Venkatesan, Jeffrey A. Davis, James D. Meindl
2002A practical and efficient method for compare-point matching.
Demos Anastasakis, Robert F. Damiano, Hi-Keung Tony Ma, Ted Stanion
2002A proof engine approach to solving combinational design automation problems.
Gunnar Andersson, Per Bjesse, Byron Cook, Ziyad Hanna
2002A reconfigurable FPGA-based readback signal generator for hard-drive read channel simulator.
Jinghuan Chen, Jaekyun Moon, Kia Bazargan
2002A solenoidal basis method for efficient inductance extraction.
Hemant Mahawar, Vivek Sarin, Weiping Shi
2002A time-domain RF steady-state method for closely spaced tones.
Jaijeet S. Roychowdhury
2002A universal technique for fast and flexible instruction-set architecture simulation.
Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr, Andreas Hoffmann
2002Achieving maximum performance: a method for the verification of interlocked pipeline control logic.
Kerstin Eder, Geoff Barrett
2002Address assignment combined with scheduling in DSP code generation.
Yoonseo Choi, Taewhan Kim
2002Algorithms for simultaneous satisfaction of multiple constraints and objective optimization in a placement flow with application to congestion control.
Ke Zhong, Shantanu Dutt
2002An algorithm for frequency-domain noise analysis in nonlinear systems.
Giorgio Casinovi
2002An algorithm for integrated pin assignment and buffer planning.
Hua Xiang, D. F. Wong, Xiaoping Tang
2002An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits.
Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen
2002An efficient routing database.
Narendra V. Shenoy, William Nicholls
2002An energy saving strategy based on adaptive loop parallelization.
Ismail Kadayif, Mahmut T. Kandemir, Mustafa Karaköy
2002An implication-based method to detect multi-cycle paths in large sequential circuits.
Hiroyuki Higuchi
2002An integer linear programming based approach for parallelizing applications in On-chip multiprocessors.
Ismail Kadayif, Mahmut T. Kandemir, Ugur Sezer
2002An integrated algorithm for memory allocation and assignment in high-level synthesis.
Jaewon Seo, Taewhan Kim, Preeti Ranjan Panda
2002An optimal voltage synthesis technique for a power-efficient satellite application.
Dong-In Kang, Jinwoo Suh, Stephen P. Crago
2002Analog intellectual property: now? Or never?
Mike Brunoli, Masao Hotta, Felicia James, Rudy Koch, Roy McGuffin, Andrew J. Moore
2002Analysis of power consumption on switch fabrics in network routers.
Terry Tao Ye, Giovanni De Micheli, Luca Benini
2002Associative caches in formal software timing analysis.
Fabian Wolf, Jan Staschulat, Rolf Ernst
2002Automated equivalence checking of switch level circuits .
Simon Jolly, Atanas N. Parashkevov, Tim McDougall
2002Automated timing model generation.
Ajay J. Daga, Loa Mize, Subramanyam Sripada, Chris Wolff, Qiuyang Wu
2002Automatic data migration for reducing energy consumption in multi-bank memory systems.
Victor De La Luz, Mahmut T. Kandemir, Ibrahim Kolcu
2002Automatic generation of embedded memory wrapper for multiprocessor SoC.
Ferid Gharsalli, Samy Meftali, Frédéric Rousseau, Ahmed Amine Jerraya
2002Battery-conscious task sequencing for portable devices including voltage/clock scaling.
Daler N. Rakhmatov, Sarma B. K. Vrudhula, Chaitali Chakrabarti
2002Behavioral modeling of (coupled) harmonic oscillators.
Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen
2002Behavioral synthesis via engineering change.
Milenko Drinic, Darko Kirovski
2002CMOS: a paradigm for low power wireless?
Michiel Steyaert, Peter J. Vancorenland
2002Can BDDs compete with SAT solvers on bounded model checking?
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
2002Carbon nanotube field-effect transistors and logic circuits.
Richard Martel, V. Derycke, Jörg Appenzeller, Shalom J. Wind, Phaedon Avouris
2002Challenges and opportunities in electronic textiles modeling and optimization.
Diana Marculescu, Radu Marculescu, Pradeep K. Khosla
2002Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients.
Mustafa Badaroglu, Kris Tiri, Stéphane Donnay, Piet Wambacq, Hugo De Man, Ingrid Verbauwhede, Georges G. E. Gielen
2002Combined BEM/FEM substrate resistance modeling.
Eelco Schrik, N. P. van der Meijs
2002Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver.
Malay K. Ganai, Pranav Ashar, Aarti Gupta, Lintao Zhang, Sharad Malik
2002Communication architecture based power management for battery efficient system design.
Kanishka Lahiri, Sujit Dey, Anand Raghunathan
2002Compiler-directed scratch pad memory hierarchy design and management.
Mahmut T. Kandemir, Alok N. Choudhary
2002Complex library mapping for embedded software using symbolic algebra.
Armita Peymandoust, Giovanni De Micheli, Tajana Simunic
2002Component-based design approach for multicore SoCs.
Wander O. Cesário, Amer Baghdadi, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Mario Diaz-Nava
2002Computer aided design of long-haul optical transmission systems.
James G. Maloney, Brian E. Brewington, Curtis R. Menyuk
2002Congestion-driven codesign of power and signal networks.
Haihua Su, Jiang Hu, Sachin S. Sapatnekar, Sani R. Nassif
2002Constraint-driven communication synthesis.
Alessandro Pinto, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli
2002Coordinated transformations for high-level synthesis of high performance microprocessor blocks.
Sumit Gupta, Nick Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau, Timothy Kam, Michael Kishinevsky, Shai Rotem
2002Coping with buffer delay change due to power and ground noise.
Lauren Hui Chen, Malgorzata Marek-Sadowska, Forrest Brewer
2002Crosstalk noise estimation for noise management.
Paul B. Morton, Wayne Wei-Ming Dai
2002DRG-cache: a data retention gated-ground cache for low power.
Amit Agarwal, Hai Li, Kaushik Roy
2002Deriving a simulation input generator and a coverage metric from a formal specification.
Kanna Shimizu, David L. Dill
2002Design of a high-throughput low-power IS95 Viterbi decoder.
Xun Liu, Marios C. Papaefthymiou
2002Design of an one-cycle decompression hardware for performance increase in embedded systems.
Haris Lekatsas, Jörg Henkel, Venkata Jakkula
2002Design of asynchronous circuits by synchronous CAD tools.
Alex Kondratyev, Kelvin Lwin
2002Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique.
Mohab Anis, Mohamed Mahmoud, Mohamed I. Elmasry, Shawki Areibi
2002Dynamic hardware plugins in an FPGA with partial run-time reconfiguration.
Edson L. Horta, John W. Lockwood, David E. Taylor, David B. Parlour
2002Effective diagnostics through interval unloads in a BIST environment.
Peter Wohl, John A. Waicukauski, Sanjay Patel, Gregory A. Maston
2002Effective safety property checking using simulation-based sequential ATPG.
Shuo Sheng, Koichiro Takayama, Michael S. Hsiao
2002Efficient code synthesis from extended dataflow graphs for multimedia applications.
Hyunok Oh, Soonhoi Ha
2002Efficient state representation for symbolic simulation.
Valeria Bertacco, Kunle Olukotun
2002Efficient stimulus independent timing abstraction model based on a new concept of circuit block transparency.
Martin Foltin, Brian Foutz, Sean Tyler
2002Embedded software-based self-testing for SoC design.
Angela Krstic, Wei-Cheng Lai, Kwang-Ting Cheng, Li Chen, Sujit Dey
2002Embedded test control schemes for compression in SOCs.
Douglas Kay, Sung Chung, Samiha Mourad
2002Embedding infrastructure IP for SOC yield improvement.
Yervant Zorian
2002Energy estimation and optimization of embedded VLIW processors based on instruction clustering.
Andrea Bona, Mariagiovanna Sami, Donatella Sciuto, Vittorio Zaccaria, Cristina Silvano, Roberto Zafalon
2002Energy exploration and reduction of SDRAM memory systems.
Yongsoo Joo, Yongseok Choi, Hojun Shim, Hyung Gyu Lee, Kwanho Kim, Naehyuck Chang
2002Energy-efficient communication protocols.
Carla-Fabiana Chiasserini, Pavan Nuggehalli, Vikram Srinivasan
2002Enhancing test efficiency for delay fault testing using multiple-clocked schemes.
Jing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng, Jennifer Dworak, M. Ray Mercer, Rohit Kapur, Thomas W. Williams
2002Estimation of the likelihood of capacitive coupling noise.
Sarma B. K. Vrudhula, David T. Blaauw, Supamas Sirichotiyakul
2002Exploiting operation level parallelism through dynamically reconfigurable datapaths.
Zhining Huang, Sharad Malik
2002Exploiting shared scratch pad memory space in embedded multiprocessor systems.
Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary
2002False timing path identification using ATPG techniques and delay-based information.
Jing Zeng, Magdy S. Abadir, Jacob A. Abraham
2002False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation.
Jing-Jia Liou, Angela Krstic, Li-C. Wang, Kwang-Ting Cheng
2002Fast and accurate behavioral simulation of fractional-N frequency synthesizers and other PLL/DLL circuits.
Michael H. Perrott
2002Fast three-level logic minimization based on autosymmetry.
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, Linda Pagli
2002Few electron devices: towards hybrid CMOS-SET integrated circuits.
Adrian M. Ionescu, Michel J. Declercq, Santanu Mahapatra, Kaustav Banerjee, Jacques Gautier
2002Floorplanning with alignment and performance constraints.
Xiaoping Tang, D. F. Wong
2002Formal verification methods: getting around the brick wall.
David L. Dill, Nate James, Shishpal Rawat, Gérard Berry, Limor Fix, Harry Foster, Rajeev K. Ranjan, Gunnar Stålmarck, Curt Widdoes
2002Formal verification of module interfaces against real time specifications.
Arindam Chakrabarti, Pallab Dasgupta, P. P. Chakrabarti, Ansuman Banerjee
2002Forward-looking objective functions: concept & applications in high level synthesis.
Jennifer L. Wong, Seapahn Megerian, Miodrag Potkonjak
2002Going mobile: the next horizon for multi-million gate designs in the semi-conductor industry.
Christian Berthet
2002Guaranteed passive balancing transformations for model order reduction.
Joel R. Phillips, Luca Daniel, Luís Miguel Silveira
2002HSpeedEx: a high-speed extractor for substrate noise analysis in complex mixed signal SOC.
Adil Koukab, Catherine Dehollain, Michel J. Declercq
2002Handling special constructs in symbolic simulation.
Alfred Kölbl, James H. Kukula, Kurt Antreich, Robert F. Damiano
2002HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery.
Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Charlie Chung-Ping Chen
2002High-Level specification and automatic generation of IP interface monitors.
Marcio T. Oliveira, Alan J. Hu
2002High-level current macro-model for power-grid analysis.
Srinivas Bodapati, Farid N. Najm
2002High-level synthesis of multiple-precision circuitsindependent of data-objects length.
María C. Molina, José M. Mendías, Román Hermida
2002Hole analysis for functional coverage data.
Oded Lachish, Eitan Marcus, Shmuel Ur, Avi Ziv
2002ILP-based engineering change.
Farinaz Koushanfar, Jennifer L. Wong, Jessica Feng, Miodrag Potkonjak
2002IP delivery for FPGAs using Applets and JHDL.
Michael J. Wirthlin, Brian McMurtrey
2002Implementing asynchronous circuits using a conventional EDA tool-flow.
Christos P. Sotiriou
2002Improving the generality of the fictitious magnetic charge approach to computing inductances in the presence of permeable materials.
Yehia Massoud, Jacob White
2002Layout-aware synthesis of arithmetic circuits.
Junhyung Um, Taewhan Kim
2002Life is CMOS: why chase the life after?
George Sery, Shekhar Borkar, Vivek De
2002Low-cost sequential ATPG with clock-control DFT.
Miron Abramovici, Xiaoming Yu, Elizabeth M. Rudnick
2002Low-swing clock domino logic incorporating dual supply and dual threshold voltages.
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
2002Macro-modeling concepts for the chip electrical interface.
Brian W. Amick, Claude R. Gauthier, Dean Liu
2002Memory optimization in single chip network switch fabrics.
David Whelihan, Herman Schmit
2002Model checking algorithms for analog verification.
Walter Hartong, Lars Hedrich, Erich Barke
2002Model composition for scheduling analysis in platform design.
Kai Richter, Dirk Ziegenbein, Marek Jersak, Rolf Ernst
2002Model design using hierarchical web-based libraries.
Fabrice Bernardi, Jean François Santucci
2002Model order reduction for strictly passive and causal distributed systems.
Luca Daniel, Joel R. Phillips
2002Modeling and analysis of regular symmetrically structured power/ground distribution networks.
Hui Zheng, Lawrence T. Pileggi
2002Multifunctional photonic integration for the agile optical internet.
Edward H. Sargent
2002Nanometer design: what hurts next...?
Robert W. Brodersen, Anthony M. Hill, John Kibarian, Desmond Kirkpatrick, Mark A. Lavin, Mitsumasa Koyanagi
2002On metrics for comparing routability estimation methods for FPGAs.
PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia
2002On output response compression in the presence of unknown output values.
Irith Pomeranz, Sandip Kundu, Sudhakar M. Reddy
2002On the efficacy of simplified 2D on-chip inductance models.
Tao Lin, Michael W. Beattie, Lawrence T. Pileggi
2002Optimal design of delta-sigma ADCs by design space exploration.
Ovidiu Bajdechi, Johan H. Huijsing, Georges G. E. Gielen
2002Osculating Thevenin model for predicting delay and slew of capacitively characterized cells.
Bernard N. Sheehan
2002Petri net modeling of gate and interconnect delays for power estimation.
Ashok K. Murugavel, N. Ranganathan
2002Power estimation in global interconnects and its reduction using a novel repeater optimization methodology.
Pawan Kapur, Gaurav Chandra, Krishna Saraswat
2002Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002
2002RTL c-based methodology for designing and verifying a multi-threaded processor.
Luc Séméria, Renu Mehra, Barry M. Pangrle, Arjuna Ekanayake, Andrew Seawright, Daniel Ng
2002Reduction of SOC test data volume, scan power and testing time using alternating run-length codes.
Anshuman Chandra, Krishnendu Chakrabarty
2002Regularization of hierarchical VHDL-AMS models using bipartite graphs.
Jochen Mades, Manfred Glesner
2002Reliable and energy-efficient digital signal processing.
Naresh R. Shanbhag
2002Remembrance of circuits past: macromodeling by data mining in large analog design spaces.
Hongzhou Liu, Amith Singhee, Rob A. Rutenbar, L. Richard Carley
2002Resynthesis and peephole transformations for the optimization of large-scale asynchronous systems.
Tiberiu Chelcea, Steven M. Nowick
2002Retargetable binary utilities.
Maghsoud Abbaspour, Jianwen Zhu
2002River PLAs: a regular circuit structure.
Fan Mo, Robert K. Brayton
2002S-Tree: a technique for buffered routing tree synthesis.
Milos Hrkic, John Lillis
2002SAT with partial clauses and back-leaps.
Slawomir Pilarski, Gracia Hu
2002Satometer: how much have we searched?
Fadi A. Aloul, Brian D. Sierawski, Karem A. Sakallah
2002Schedulability of event-driven code blocks in real-time embedded systems.
Samarjit Chakraborty, Thomas Erlebach, Simon Künzli, Lothar Thiele
2002Scheduler-based DRAM energy management.
Victor Delaluz, Anand Sivasubramaniam, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2002Self-referential verification of gate-level implementations of arithmetic circuits.
Ying-Tsai Chang, Kwang-Ting Cheng
2002Signal integrity fault analysis using reduced-order modeling.
Amir Attarha, Mehrdad Nourani
2002Software synthesis from synchronous specifications using logic simulation techniques.
Yunjian Jiang, Robert K. Brayton
2002Software-based diagnosis for processors.
Li Chen, Sujit Dey
2002Solving difficult SAT instances in the presence of symmetry.
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah
2002System design methodologies for a wireless security processing platform.
Srivaths Ravi, Anand Raghunathan, Nachiketh R. Potlapally, Murugan Sankaradass
2002System-level performance optimization of the data queueing memory management in high-speed network processors.
Chantal Ykman-Couvreur, Jurgen Lambrecht, Diederik Verkest, Francky Catthoor, Aristides Nikologiannis, George E. Konstantoulakis
2002Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter.
Jan Vandenbussche, Koen Uyttenhove, Erik Lauwers, Michiel Steyaert, Georges G. E. Gielen
2002TCG-S: orthogonal coupling of P
Jai-Ming Lin, Yao-Wen Chang
2002Task scheduling and voltage selection for energy minimization.
Yumin Zhang, Xiaobo Hu, Danny Z. Chen
2002The iCOREtm 520 MHz synthesizable CPU core.
Nick Richardson, Lun Bin Huang, Razak Hossain, Tommy Zounes, Naresh Soni, Julian Lewis
2002The next chip challenge: effective methods for viable mixed technology SoCs.
H. Bernhard Pogge
2002The wearable motherboard: a framework for personalized mobile information processing (PMIP).
Sungmee Park, Kenneth MacKenzie, Sundaresan Jayaraman
2002Time-domain steady-state simulation of frequency-dependent components using multi-interval Chebyshev method.
Baolin Yang, Joel R. Phillips
2002Timed compiled-code simulation of embedded software for performance analysis of SOC design.
Jong-Yeol Lee, In-Cheol Park
2002Timed pattern generation for noise-on-delay calculation.
Seung Hoon Choi, Kaushik Roy, Florentin Dartu
2002Timing model extraction of hierarchical blocks by graph reduction.
Cho W. Moon, Harish Kriplani, Krishna P. Belkhale
2002Tools or users: which is the bigger bottleneck?
Andrew B. Kahng, Ronald Collett, Patrick Groeneveld, Lavi Lev, Nancy Nettleton, Paul K. Rodman, Lambert van den Hoven
2002Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors.
Tanay Karnik, Yibin Ye, James W. Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar
2002Towards global routing with RLC crosstalk constraints.
James D. Z. Ma, Lei He
2002Traffic analysis for on-chip networks design of multimedia applications.
Girish Varatkar, Radu Marculescu
2002Transformation based communication and clock domain refinement for system design.
Ingo Sander, Axel Jantsch
2002Transformation rules for designing CNOT-based quantum circuits.
Kazuo Iwama, Yahiko Kambayashi, Shigeru Yamashita
2002Uncertainty-aware circuit optimization.
Xiaoliang Bai, Chandramouli Visweswariah, Philip N. Strenski
2002Unified tools for SoC embedded systems: mission critical, mission impossible or mission irrelevant?
Gary Smith, Daya Nadamuni, Sharad Malik, Rick Chapman, John Fogelin, Kurt Keutzer, Grant Martin, Brian Bailey
2002Unlocking the design secrets of a 2.29 Gb/s Rijndael processor.
Patrick Schaumont, Henry Kuo, Ingrid Verbauwhede
2002Using embedded FPGAs for SoC yield improvement.
Miron Abramovici, Charles E. Stroud, John Marty Emmert
2002Variable frequency crosstalk noise analysis: : a methodology to guarantee functionality from dc to fmax.
Byron Krauter, David Widiger
2002VeriCDF: a new verification methodology for charged device failures.
Jaesik Lee, Ki-Wook Kim, Sung-Mo Kang
2002Wall street evaluates EDA.
Moshe Gavrielov, Richard Goering, Lucio Lanza, Vishal Saluja, Jay Vleeschhouwer
2002Watermarking integer linear programming solutions.
Seapahn Megerian, Milenko Drinic, Miodrag Potkonjak
2002What's the next EDA driver?
Jan M. Rabaey, Joachim Kunkel, Dennis Brophy, Raul Camposano, Davoud Samani, Larry Lerner, Rick Hetherington
2002Whither (or wither?) ASIC handoff?
Michael Santarini, Sudhakar Jilla, Mark Miller, Tommy Eng, Sandeep Khanna, Kamalesh N. Ruparel, Tom Russell, Kazu Yamada
2002Wrapper/TAM co-optimization, constraint-driven test scheduling, and tester data volume reduction for SOCs.
Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen