| 2001 | A Jörg Henkel, Haris Lekatsas |
| 2001 | A Framework for Low Complexity Static Learning. Emil Gizdarski, Hideo Fujiwara |
| 2001 | A Framework for Object Oriented Hardware Specification, Verification, and Synthesis. Tommy Kuhn, Tobias Oppold, Markus Winterholer, Wolfgang Rosenstiel, Mark Edwards, Yaron Kashai |
| 2001 | A Hardware/Software Co-design Flow and IP Library Based of Simulink Leonardo Maria Reyneri, Franceso Cucinotta, Alessandro Serra, Luciano Lavagno |
| 2001 | A New Gate Delay Model for Simultaneous Switching and Its Applications. Liang-Chi Chen, Sandeep K. Gupta, Melvin A. Breuer |
| 2001 | A New Structural Pattern Matching Algorithm for Technology Mapping. Min Zhao, Sachin S. Sapatnekar |
| 2001 | A New Verification Methodology for Complex Pipeline Behavior. Kazuyoshi Kohno, Nobu Matsumoto |
| 2001 | A Novel Method for Stochastic Nonlinearity Analysis of a CMOS Pipeline ADC. David Goren, Eliyahu Shamsaev, Israel A. Wagner |
| 2001 | A Practical Application of Full-Feature Alternating Phase-Shifting Technology for a Phase-Aware Standard-Cell Design Flow. Michael Sanie, Michel Côté, Philippe Hurat, Vinod Malhotra |
| 2001 | A Practical Methodology for Early Buffer and Wire Resource Allocation. Charles J. Alpert, Jiang Hu, Sachin S. Sapatnekar, Paul Villarrubia |
| 2001 | A Quick Safari Through the Reconfiguration Jungle. Patrick Schaumont, Ingrid Verbauwhede, Kurt Keutzer, Majid Sarrafzadeh |
| 2001 | A Semi-Custom Design Flow in High-Performance Microprocessor Design. Gregory A. Northrop, Pong-Fei Lu |
| 2001 | A Static Estimation Technique of Power Sensitivity in Logic Circuits. Taewhan Kim, Ki-Seok Chung, Chien-Liang Liu |
| 2001 | A Transaction-Based Unified Simulation/Emulation Architecture for Functional Verification. Murali Kudlugi, Soha Hassoun, Charles Selvidge, Duaine Pryor |
| 2001 | A True Single-Phase 8-bit Adiabatic Multiplier. Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou |
| 2001 | A Unified DFT Architecture for Use with IEEE 1149.1 and VSIA/IEEE P1500 Compliant Test Access Controllers. Bulent I. Dervisoglu |
| 2001 | A Universal Client for Distributed Networked Design and Computing. Franc Brglez, Hemang Lavana |
| 2001 | Achieving 550Mhz in an ASIC Methodology. David G. Chinnery, Borivoje Nikolic, Kurt Keutzer |
| 2001 | Address Code Generation for Digital Signal Processors. Sathishkumar Udayanarayanan, Chaitali Chakrabarti |
| 2001 | Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design. Marco Sgroi, Michael Sheets, Andrew Mihal, Kurt Keutzer, Sharad Malik, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli |
| 2001 | Adoption of OPC and the Impact on Design and Layout. Franklin M. Schellenberg, Olivier Toublan, Luigi Capodieci, Bob Socha |
| 2001 | An Advanced Timing Characterization Method Using Mode Dependency. Hakan Yalcin, Robert Palermo, Mohammad Mortazavi, Cyrus Bamji, Karem A. Sakallah, John P. Hayes |
| 2001 | An Algorithm for Bi-Decomposition of Logic Functions. Alan Mishchenko, Bernd Steinbach, Marek A. Perkowski |
| 2001 | An Approach to Incremental Design of Distributed Embedded Systems. Paul Pop, Petru Eles, Traian Pop, Zebo Peng |
| 2001 | An Approach to Test Compaction for Scan Circuits that Enhances At-Speed Testing. Irith Pomeranz, Sudhakar M. Reddy |
| 2001 | An Interconnect Energy Model Considering Coupling Effects. Taku Uchino, Jason Cong |
| 2001 | Analysis of Non-Uniform Temperature-Dependent Interconnect Performance in High Performance ICs. Amir H. Ajami, Kaustav Banerjee, Massoud Pedram, Lukas P. P. P. van Ginneken |
| 2001 | Analysis of On-Chip Inductance Effects using a Novel Performance Optimization Methodology for Distributed RLC Interconnects. Kaustav Banerjee, Amit Mehrotra |
| 2001 | Application of Constraint-Based Heuristics in Collaborative Design. Juan Antonio Carballo, Stephen W. Director |
| 2001 | Automated Pipeline Design. Daniel Kroening, Wolfgang J. Paul |
| 2001 | Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip. Damien Lyonnard, Sungjoo Yoo, Amer Baghdadi, Ahmed Amine Jerraya |
| 2001 | Battery-Aware Static Scheduling for Distributed Real-Time Embedded Systems. Jiong Luo, Niraj K. Jha |
| 2001 | Behavioral Partitioning in the Synthesis of Mixed Analog-Digital Systems. Sree Ganesan, Ranga Vemuri |
| 2001 | Built-In Self-Test for Signal Integrity. Mehrdad Nourani, Amir Attarha |
| 2001 | Chaff: Engineering an Efficient SAT Solver. Matthew W. Moskewicz, Conor F. Madigan, Ying Zhao, Lintao Zhang, Sharad Malik |
| 2001 | Checking Equivalence for Partial Implementations. Christoph Scholl, Bernd Becker |
| 2001 | Circuit-based Boolean Reasoning. Andreas Kuehlmann, Malay K. Ganai, Viresh Paruthi |
| 2001 | Clustered VLIW Architectures with Predicated Switching. Margarida F. Jacome, Gustavo de Veciana, Satish Pillai |
| 2001 | Combining Low-Power Scan Testing and Test Data Compression for System-on-a-Chip. Anshuman Chandra, Krishnendu Chakrabarty |
| 2001 | Computing Logic-Stage Delays Using Circuit Simulation and Symbolic Elmore Analysis. Clayton B. McDonald, Randal E. Bryant |
| 2001 | Concurrent Error Detection of Fault-Based Side-Channel Cryptanalysis of 128-Bit Symmetric Block Ciphers. Ramesh Karri, Kaijie Wu, Piyush Mishra, Yongkook Kim |
| 2001 | Coupling Delay Optimization by Temporal Decorrelation using Dual Threshold Voltage Technique. Ki-Wook Kim, Seong-Ook Jung, Prashant Saxena, C. L. Liu, Sung-Mo Kang |
| 2001 | Coupling-Driven Bus Design for Low-Power Application-Specific Systems. Youngsoo Shin, Takayasu Sakurai |
| 2001 | Creating and Exploiting Flexibility in Steiner Trees. Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh |
| 2001 | Dependency Preserving Probabilistic Modeling of Switching Activity using Bayesian Networks. Sanjukta Bhanja, N. Ranganathan |
| 2001 | Design of Half-Rate Clock and Data Recovery Circuits for Optical Communication Systems. Jafar Savoj, Behzad Razavi |
| 2001 | Detection of Partially Simultaneously Alive Signals in Storage Requirement Estimation for Data Intensive Applications. Per Gunnar Kjeldsberg, Francky Catthoor, Einar J. Aas |
| 2001 | Digital Filter Synthesis Based on Minimal Signed Digit Representation. In-Cheol Park, Hyeong-Ju Kang |
| 2001 | Driver Modeling and Alignment for Worst-Case Delay Noise. Supamas Sirichotiyakul, David T. Blaauw, Chanhee Oh, Rafi Levy, Vladimir Zolotov, Jingyan Zuo |
| 2001 | Dynamic Detection and Removal of Inactive Clauses in SAT with Application in Image Computation. Aarti Gupta, Anubhav Gupta, Zijiang Yang, Pranav Ashar |
| 2001 | Dynamic Management of Scratch-Pad Memory Space. Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh |
| 2001 | Dynamic Power Management in a Mobile Multimedia System with Guaranteed Quality-of-Service. Qinru Qiu, Qing Wu, Massoud Pedram |
| 2001 | Dynamic Voltage Scaling and Power Management for Portable Systems. Tajana Simunic, Luca Benini, Andrea Acquaviva, Peter W. Glynn, Giovanni De Micheli |
| 2001 | Effective Use of Boolean Satisfiability Procedures in the Formal Verification of Superscalar and VLIW Microprocessors. Miroslav N. Velev, Randal E. Bryant |
| 2001 | Efficient DDD-based Symbolic Analysis of Large Linear Analog Circuits. Wim Verhaegen, Georges G. E. Gielen |
| 2001 | Efficient Large-Scale Power Grid Analysis Based on Preconditioned Krylov-Subspace Iterative Methods. Tsung-Hao Chen, Charlie Chung-Ping Chen |
| 2001 | Enabling Alternating Phase Shifted Mask Designs for a Full Logic Gate Level: Design Rules and Design Rule Checking. Lars Liebmann, Jennifer Lund, Fook-Luen Heng, Ioana Graur |
| 2001 | Energy Efficient Fixed-Priority Scheduling for Real-Time Systems on Variable Voltage Processors. Gang Quan, Xiaobo Hu |
| 2001 | Estimation of Speed, Area, and Power of Parameterizable, Soft IP. Jagesh V. Sanghavi, Albert Wang |
| 2001 | Exploring SOI Device Structures and Interconnect Architectures for 3-Dimensional Integration. Rongtian Zhang, Kaushik Roy, Cheng-Kok Koh, David B. Janes |
| 2001 | Factoring and Recognition of Read-Once Functions using Cographs and Normality. Martin Charles Golumbic, Aviad Mintz, Udi Rotics |
| 2001 | False Coupling Interactions in Static Timing Analysis. Ravishankar Arunachalam, Ronald D. Blanton, Lawrence T. Pileggi |
| 2001 | Fast Bit-True Simulation. Holger Keding, Martin Coors, Olaf Lüthje, Heinrich Meyr |
| 2001 | Fast Power/Ground Network Optimization Based on Equivalent Circuit Modeling. Sheldon X.-D. Tan, Chuanjin Richard Shi |
| 2001 | Fast Statistical Timing Analysis By Probabilistic Event Propagation. Jing-Jia Liou, Kwang-Ting Cheng, Sandip Kundu, Angela Krstic |
| 2001 | Fault Characterizations and Design-for-Testability Technique for Detecting I Kaamran Raahemifar, Majid Ahmadi |
| 2001 | Floorplanning with Abutment Constraints and L-Shaped/T-Shaped Blocks based on Corner Block List. Yuchun Ma, Xianlong Hong, Sheqin Dong, Yici Cai, Chung-Kuan Cheng, Jun Gu |
| 2001 | Formal Property Verification by Abstraction Refinement with Formal, Simulation and Hybrid Engines. Dong Wang, Pei-Hsin Ho, Jiang Long, James H. Kukula, Yunshan Zhu, Hi-Keung Tony Ma, Robert F. Damiano |
| 2001 | From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip. Luca Benini, Luca Macchiarulo, Alberto Macii, Enrico Macii, Massimo Poncino |
| 2001 | Functional Correlation Analysis in Crosstalk Induced Critical Paths Identification. Tong Xiao, Malgorzata Marek-Sadowska |
| 2001 | Future Performance Challenges in Nanometer Design. Dennis Sylvester, Himanshu Kaul |
| 2001 | Generating Efficient Tests for Continuous Scan. Sying-Jyan Wang, Sheng-Nan Chiou |
| 2001 | Hardware Metering. Farinaz Koushanfar, Gang Qu |
| 2001 | Hardware/Software Instruction Set Configurability for System-on-Chip Processors. Albert Wang, Earl Killian, Dror E. Maydan, Chris Rowen |
| 2001 | High-Quality Operation Binding for Clustered VLIW Datapaths. Viktor S. Lapinskii, Margarida F. Jacome, Gustavo de Veciana |
| 2001 | High-level Software Energy Macro-modeling. Tat Kee Tan, Anand Raghunathan, Ganesh Lakshminarayana, Niraj K. Jha |
| 2001 | Hypermedia-Aided Design. Darko Kirovski, Milenko Drinic, Miodrag Potkonjak |
| 2001 | IC Design in High-Cost Nanometer-Technologies Era. Wojciech Maly |
| 2001 | Improved Cut Sequences for Partitioning Based Placement. Mehmet Can Yildiz, Patrick H. Madden |
| 2001 | Improved Merging of Datapath Operators using Information Content and Required Precision Analysis. Anmol Mathur, Sanjeev Saluja |
| 2001 | Improving Bus Test Via I Shih-Yu Yang, Christos A. Papachristou, Massood Tabib-Azar |
| 2001 | Inductance 101: Analysis and Design Issues. Kaushik Gala, David T. Blaauw, Junfeng Wang, Vladimir Zolotov, Min Zhao |
| 2001 | Inductance 101: Modeling and Extraction. Michael W. Beattie, Lawrence T. Pileggi |
| 2001 | Input Space Adaptive Design: A High-level Methodology for Energy and Performance Optimization. Weidong Wang, Anand Raghunathan, Ganesh Lakshminarayana, Niraj K. Jha |
| 2001 | Instruction-Level DFT for Testing Processor and IP Cores in System-on-a-Chip. Wei-Cheng Lai, Kwang-Ting Cheng |
| 2001 | Integrated High-Level Synthesis and Power-Net Routing for Digital Design under Switching Noise Constraints. Alex Doboli, Ranga Vemuri |
| 2001 | Integrating Scheduling and Physical Design into a Coherent Compilation Cycle for Reconfigurable Computing Architectures. Kia Bazargan, Seda Ogrenci, Majid Sarrafzadeh |
| 2001 | JouleTrack - A Web Based Tool for Software Energy Profiling. Amit Sinha, Anantha P. Chandrakasan |
| 2001 | LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs. Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshminarayana |
| 2001 | Latency and Latch Count Minimization in Wave Steered Circuits. Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska |
| 2001 | Latency-Driven Design of Multi-Purpose Systems-On-Chip. Seapahn Meguerdichian, Milenko Drinic, Darko Kirovski |
| 2001 | Layout Design Methodologies for Sub-Wavelength Manufacturing. Michael L. Rieger, Jeffrey P. Mayhew, Sridhar Panchapakesan |
| 2001 | Layout-Driven Hot-Carrier Degradation Minimization Using Logic Restructuring Techniques. Chih-Wei Jim Chang, Kai Wang, Malgorzata Marek-Sadowska |
| 2001 | Logic Minimization using Exclusive OR Gates. Valentina Ciriani |
| 2001 | Low-Energy Intra-Task Voltage Scheduling Using Static Timing Analysis. Dongkun Shin, Jihong Kim, Seongsoo Lee |
| 2001 | MetaCores: Design and Optimization Techniques. Seapahn Meguerdichian, Farinaz Koushanfar, Advait M. Mogre, Dusan Petranovic, Miodrag Potkonjak |
| 2001 | MicroNetwork-Based Integration for SOCs. Drew Wingard |
| 2001 | Min/max On-Chip Inductance Models and Delay Metrics. Yi-Chang Lu, Mustafa Celik, Tak Young, Lawrence T. Pileggi |
| 2001 | Mismatch Analysis and Direct Yield Optimization by Spec-Wise Linearization and Feasibility-Guided Search. Frank Schenkel, Michael Pronath, Stephan Zizala, Robert Schwencker, Helmut E. Graeb, Kurt Antreich |
| 2001 | Model Checking of S3C2400X Industrial Embedded SOC Product. Hoon Choi, Byeong-Whee Yun, Yun-Tae Lee, Hyunglae Roh |
| 2001 | Modeling Magnetic Coupling for On-Chip Interconnect. Michael W. Beattie, Lawrence T. Pileggi |
| 2001 | Modeling and Analysis of Differential Signaling for Minimizing Inductive Cross-Talk. Yehia Massoud, Jamil Kawa, Don MacMillen, Jacob White |
| 2001 | Modeling and Minimization of Interconnect Energy Dissipation in Nanometer Technologies. Clark N. Taylor, Sujit Dey, Yi Zhao |
| 2001 | Nuts and Bolts of Core and SoC Verification. Ken Albin |
| 2001 | On Optimum Switch Box Designs for 2-D FPGAs. Hongbing Fan, Jiping Liu, Yu-Liang Wu, Chak-Chung Cheung |
| 2001 | On-Chip Communication Architecture for OC-768 Network Processors. Faraydon Karim, Anh Nguyen, Sujit Dey, Ramesh R. Rao |
| 2001 | One-chip Bluetooth ASIC Challenges. Paul T. M. van Zeijl |
| 2001 | Panel: (When) Will FPGAs Kill ASICs? Rob A. Rutenbar, Max Baron, Thomas Daniel, Rajeev Jayaraman, Zvi Or-Bach, Jonathan Rose, Carl Sechen |
| 2001 | Panel: Is Nanometer Design Under Control? Andrew B. Kahng, Bing J. Sheu, Nancy Nettleton, John M. Cohn, Shekhar Borkar, Louis Scheffer, Ed Cheng, Sang Wang |
| 2001 | Panel: The Electronics Industry Supply Chain: Who Will Do What? Rita Glover, Marc Halpern, Rich Becks, Richard Kubin, Henry Jurgens, Rick Cassidy, Ted Vucurevich |
| 2001 | Panel: The Next HDL: If C++ is the Answer, What was the Question? Rajesh K. Gupta, Shishpal Rawat, Ingrid Verbauwhede, Gérard Berry, Ramesh Chandra, Daniel Gajski, Kris Konigsfeld, Patrick Schaumont |
| 2001 | Panel: What Drives EDA Innovation? Steven E. Schulz, Georgia Marszalek, Greg Hinckley, Gregory S. Spirakis, Karen Vahtra, John A. Darringer, J. George Janac, Handel H. Jones |
| 2001 | Panel: When Will the Analog Design Flow Catch Up with Digital Methodology? Georges G. E. Gielen, Mike Sottak, Mike Murray, Linda Kaye, Maria del Mar Hershenson, Kenneth S. Kundert, Philippe Magarshack, Akria Matsuzawa, Ronald A. Rohrer, Ping Yang |
| 2001 | Panel: Your Core - My Problem? Integration and Verification of IP. Gabe Moretti, Tim Hopes, Ramesh Narayanaswamy, Nanette Collins, Dave Kelf, Tom Anderson, Janick Bergeron, Ashish Dixit, Peter Flake |
| 2001 | Parallelizing DSP Nested Loops on Reconfigurable Architectures using Data Context Switching. Kiran Bondalapati |
| 2001 | Performance-Driven Multi-Level Clustering with Application to Hierarchical FPGA Mapping. Jason Cong, Michail Romesis |
| 2001 | Power-Aware Scheduling under Timing Constraints for Mission-Critical Embedded Systems. Jinfeng Liu, Pai H. Chou, Nader Bagherzadeh, Fadi J. Kurdahi |
| 2001 | Pre-silicon Verification of the Alpha 21364 Microprocessor Error Handling System. Richard Lee, Benjamin Tsien |
| 2001 | Proceedings of the 38th Design Automation Conference, DAC 2001, Las Vegas, NV, USA, June 18-22, 2001 |
| 2001 | Publicly Detectable Techniques for the Protection of Virtual Components. Gang Qu |
| 2001 | Random Limited-Scan to Improve Random Pattern Testing of Scan Circuits. Irith Pomeranz |
| 2001 | Re-Configurable Computing in Wireless. Bill Salefski, Levent Caglar |
| 2001 | Reducing Memory Requirements of Nested Loops for Embedded Systems. J. Ramanujam, Jinpyo Hong, Mahmut T. Kandemir, Amit Narayan |
| 2001 | Reducing the Frequency Gap Between ASIC and Custom Designs: A Custom Perspective. Stephen E. Rich, Matthew J. Parker, Jim Schwartz |
| 2001 | Reticle Enhancement Technology: Implications and Challenges for Physical Design. Warren Grobman, Matt Thompson, Ruoping Wang, Chi-Min Yuan, Ruiqi Tian, Ertugrul Demircan |
| 2001 | Robust Interfaces for Mixed-Timing Systems with Application to Latency-Insensitive Protocols. Tiberiu Chelcea, Steven M. Nowick |
| 2001 | Route Packets, Not Wires: On-Chip Interconnection Networks. William J. Dally, Brian Towles |
| 2001 | SATIRE: A New Incremental Satisfiability Engine. Jesse Whittemore, Joonyoung Kim, Karem A. Sakallah |
| 2001 | Scalable Hybrid Verification of Complex Microprocessors. Maher N. Mneimneh, Fadi A. Aloul, Christopher T. Weaver, Saugata Chatterjee, Karem A. Sakallah, Todd M. Austin |
| 2001 | Semi-Formal Test Generation with Genevieve. Julia Dushina, Mike Benjamin, Daniel Geist |
| 2001 | Signal Representation Guided Synthesis Using Carry-Save Adders For Synchronous Data-path Circuits. Zhan Yu, Meng-Lin Yu, Alan N. Willson Jr. |
| 2001 | Simulation-Based Test Algorithm Generation and Port Scheduling for Multi-Port Memories. Chi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Chih-Wea Wang, Cheng-Wen Wu |
| 2001 | Simultaneous Shield Insertion and Net Ordering under Explicit RLC Noise Constraint. Kevin M. Lepak, Irwan Luwandi, Lei He |
| 2001 | SoC Integration of Reusable Baseband Bluetooth IP. Torbjörn Grahm, Barry Clark |
| 2001 | Speculation Techniques for High Level Synthesis of Control Intensive Designs. Sumit Gupta, Nick Savoiu, Sunwoo Kim, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau |
| 2001 | Speeding Up Control-Dominated Applications through Microarchitectural Customizations in Embedded Processors. Peter Petrov, Alex Orailoglu |
| 2001 | Static Scheduling of Multiple Asynchronous Domains For Functional Verification. Murali Kudlugi, Charles Selvidge, Russell Tessier |
| 2001 | Static Timing Analysis Including Power Supply Noise Effect on Propagation Delay in VLSI Circuits. Geng Bai, Sudhakar Bobba, Ibrahim N. Hajj |
| 2001 | Statistical Design Space Exploration for Application-Specific Unit Synthesis. Davide Bruni, Alessandro Bogliolo, Luca Benini |
| 2001 | Symbolic RTL Simulation. Alfred Kölbl, James H. Kukula, Robert F. Damiano |
| 2001 | System-Level Power/Performance Analysis for Embedded Systems Design. Amit Nandi, Radu Marculescu |
| 2001 | TCG: A Transitive Closure Graph-Based Representation for Non-Slicing Floorplans. Jai-Ming Lin, Yao-Wen Chang |
| 2001 | Teaching Future Verification Engineers: The Forgotten Side of Logic Design. Füsun Özgüner, Duane W. Marhefka, Joanne DeGroat, Bruce Wile, Jennifer Stofer, Lyle Hanrahan |
| 2001 | Technical Visualizations in VLSI Design. Phillip J. Restle |
| 2001 | Technology Mapping for SOI Domino Logic Incorporating Solutions for the Parasitic Bipolar Effect. Shrirang K. Karandikar, Sachin S. Sapatnekar |
| 2001 | Test Strategies for BIST at the Algorithmic and Register-Transfer Levels. Kelly A. Ockunzzi, Christos A. Papachristou |
| 2001 | Test Volume and Application Time Reduction Through Scan Chain Concealment. Ismet Bayraktaroglu, Alex Orailoglu |
| 2001 | Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores. Li Chen, Xiaoliang Bai, Sujit Dey |
| 2001 | Timing Analysis with Crosstalk as Fixpoints on Complete Lattice. Hai Zhou, Narendra V. Shenoy, William Nicholls |
| 2001 | Timing Driven Placement using Physical Net Constraints. Bill Halpin, C. Y. Roger Chen, Naresh Sehgal |
| 2001 | Transformations for the Synthesis and Optimization of Asynchronous Distributed Control. Michael Theobald, Steven M. Nowick |
| 2001 | Two-Dimensional Position Detection System with MEMS Accelerometer for MOUSE Applications. Seungbae Lee, Gi-Joon Nam, Junseok Chae, Hanseup Kim, Alan J. Drake |
| 2001 | Using Conduction Modes Basis Functions for Efficient Electromagnetic Analysis of On-Chip and Off-Chip Interconnect. Luca Daniel, Alberto L. Sangiovanni-Vincentelli, Jacob White |
| 2001 | Using Symbolic Algebra in Algorithmic Level DSP Synthesis. Armita Peymandoust, Giovanni De Micheli |
| 2001 | Using Texture Mapping with Mipmapping to Render a VLSI Layout. Jeff Solomon, Mark Horowitz |
| 2001 | Utilizing Memory Bandwidth in DSP Embedded Processors. Catherine H. Gebotys |
| 2001 | VHDL-Based Design and Design Methodology for Reusable High Performance Direct Digital Frequency Synthesizers. Ireneusz Janiszewski, Bernhard Hoppe, Hermann Meuth |
| 2001 | Validating the Intel Pentium 4 Microprocessor. Bob Bentley |
| 2001 | Watermarking Graph Partitioning Solutions. Gregory Wolfe, Jennifer L. Wong, Miodrag Potkonjak |
| 2001 | Watermarking of SAT using Combinatorial Isolation Lemmas. Rupak Majumdar, Jennifer L. Wong |
| 2001 | Web-based Algorithm Animation. Marc Najork |