| 1986 | A database interface for an integrated CAD system. Christian Jullien, André Leblond, Jacques Lecourvoisier |
| 1986 | A delay test system for high speed logic LSI's. Kuniaki Kishida, F. Shirotori, Y. Ikemoto, Shun Ishiyama, Terumine Hayashi |
| 1986 | A design rule database system to support technology-adaptable applications. Júlio S. Aude, Hilary J. Kahn |
| 1986 | A design utility manager: the ADAM planning engine. David Knapp, Alice C. Parker |
| 1986 | A frame based system for representing knowledge about VLSI design: a proposal. W. Stephen Adolph, Hassan K. Reghbati, Amar Sanmugasunderam |
| 1986 | A heuristic chip-level test generation algorithm. Daniel S. Barclay, James R. Armstrong |
| 1986 | A language for describing rectilinear Steiner tree configurations. Antony P.-C. Ng, Clark D. Thompson, Prabhakar Raghavan |
| 1986 | A linear algorithm to find a rectangular dual of a planar triangulated graph. Jayaram Bhasker, Sartaj Sahni |
| 1986 | A logic verifier based on Boolean comparison. Gotaro Odawara, Masahiro Tomita, Osamu Okuzawa, Tomomichi Ohta, Zhen-quan Zhuang |
| 1986 | A monitor for complex CAD systems. Alberto Di Janni |
| 1986 | A new algorithm for floorplan design. D. F. Wong, C. L. Liu |
| 1986 | A new approach to multi-layer PCB routing with short vias. J. Fernando Naveda, K. C. Chang, David Hung-Chang Du |
| 1986 | A new method for verifying sequential circuits. Kenneth J. Supowit, Steven J. Friedman |
| 1986 | A new routing algorithm and its hardware implementation. Takumi Watanabe, Yoshi Sugiyama |
| 1986 | A new synthesis for the MIMOLA software system. Peter Marwedel |
| 1986 | A parameter-driven router. Vijay S. Bobba, J. W. Smith |
| 1986 | A preprocessor for the via minimization problem. K. C. Chang, David Hung-Chang Du |
| 1986 | A rule-based approach to unifying functional and fault simulation and timing verification. Sumit Ghosh |
| 1986 | A rule-based logic circuit synthesis system for CMOS gate arrays. Takao Saito, Hiroyuki Sugimoto, Masami Yamazaki, Nobuaki Kawato |
| 1986 | A technology independent approach to hierarchical IC layout extraction. Ahsan Bootehsaz, Robert A. Cottrell |
| 1986 | A time and space efficient net extractor. Surendra Nahar, Sartaj Sahni |
| 1986 | A tutorial introduction to the electronic design interchange format (tutorial session). John P. Eurich |
| 1986 | A unified treatment of PLA faults by Boolean differences. Wilfried Daehn |
| 1986 | A version server for computer-aided design data. Randy H. Katz, M. Anwarrudin, Ellis E. Chang |
| 1986 | A workstation-mixed model circuit simulator. Peter Odryna, Kevin Nazareth, Carl Christensen |
| 1986 | Algorithms for global routing. J. G. Xiong |
| 1986 | An accuration delay modeling technique for switch-level timing verification. Seung Ho Hwang, Young Hwan Kim, A. Richard Newton |
| 1986 | An automated database design tool using the ELKA conceptual model. J. Gonzalez-Sustaeta, Alejandro P. Buchmann |
| 1986 | An effective delay analysis system for a large scale computer design. Reiji Toyoshima, Yoshimitsu Takiguchi, Kazumi Matsumoto, Hidetomo Hongou, Mashiro Hashimoto, Ryotaro Kamikawai, Katsuhiko Takizawa |
| 1986 | An effective test generation system for sequential circuits. Ralph Marlett |
| 1986 | An empirical analysis of the performance of a multiprocessor-based circuit simulator. George K. Jacob, A. Richard Newton, Donald O. Pederson |
| 1986 | An expert-system paradigm for design. Forrest Brewer, Daniel Gajski |
| 1986 | An extensive logic simulation method of very large scale computer design. Masayuki Miyoshi, Yoshio Ooshima, Atsushi Sugiyama, Nobuhiko Onizuka, Nobutaka Amano |
| 1986 | An implementation of a state assignment heuristic. Alan J. Coppola |
| 1986 | An industrial world channel router for non-rectangular channels. Charles H. Ng |
| 1986 | An intelligent module generator environment. Paul Six, Luc J. M. Claesen, Jan M. Rabaey, Hugo De Man |
| 1986 | An object-oriented visual simulator for microprogram development. Akira Sugimoto, Shigeru Abe, Masahiro Kuroda, Yukio Kato |
| 1986 | An object-oriented, procedural database for VLSI chip planning. Wayne H. Wolf |
| 1986 | An overview of VHDL language and technology. Moe Shahdad |
| 1986 | Analysis of placement procedures for VLSI standard cell layout. Mark R. Hartoog |
| 1986 | Automated extraction of SPICE circuit models from symbolic gate matrix layout with pruning. R. D. Freeman, S. M. Kang, C. G. Lin-Hendel, M. L. Newby |
| 1986 | Automated layout synthesis in the YASC silicon compiler. David E. Krekelberg, Eugene Shragowitz, Gerald E. Sobelman, Li-Shin Lin |
| 1986 | Automatic generation of self-test programs - a new feature of the MIMOLA design system. Gerd Krüger |
| 1986 | Automatic placement a review of current techniques (tutorial session). Bryan Preas, Patrick G. Karger |
| 1986 | Automating the generation of interactive interfaces. Katherine Hammer, Dan Radin, Tom Rhyne, John Hardin, Tina Timmerman |
| 1986 | CINNAMON: coupled integration and nodal analysis of MOS networks. Luís M. Vidigal, Sani R. Nassif, Stephen W. Director |
| 1986 | Chameleon: a new multi-layer channel router. Douglas Braun, Jeffrey L. Burns, Srinivas Devadas, Hi-Keung Tony Ma, Kartikeya Mayaram, Fabio Romeo, Alberto L. Sangiovanni-Vincentelli |
| 1986 | Comparison of CMOS PLA and polycell representations of control logic. Christine M. Gerveshi |
| 1986 | Computer aided (CA) tools integration and related standards development (panel session). Roger J. Pachter, Robert J. Smith, Ronald Waxman, J. Hines, H. G. Adhead, L. O'Connell, Moe Shahdad, John P. Eurich |
| 1986 | DATAPATH: a CMOS data path silicon assembler. Tom Marshburn, Ivy Lui, Rick Brown, Dan Cheung, Gary Lum, Peter Cheng |
| 1986 | DOSS: a storage system for design data. Shlomo Weiss, Katie Rotzell, Tom Rhyne, Arny Goldfein |
| 1986 | Delay reduction using simulated annealing. Jonathan D. Pincus, Alvin M. Despain |
| 1986 | Design-for-testability of PLA's using statistical cooling. Michiel M. Ligthart, Emile H. L. Aarts, Frans P. M. Beenker |
| 1986 | Dual quadtree representation for VLSI designs. S. K. Nandy, L. V. Ramakrishnan |
| 1986 | Early verification of prototype tooling for IC designs. Pat Lamey |
| 1986 | Effectiveness of heuristics measures for automatic test pattern generation. Sanjay J. Patel, Janak H. Patel |
| 1986 | Efficient placement algorithms optimizing delay for high-speed ECL masterslice LSIs. Yasushi Ogawa, Tatsuki Ishii, Yoichi Shiraishi, Hidekazu Terai, Tokinori Kozawa, Kyoji Yuyama, Kyoji Chiba |
| 1986 | Efficient spare allocation in reconfigurable arrays. Sy-Yen Kuo, W. Kent Fuchs |
| 1986 | Escher - a geometrical layout system for recursively defined circuits. Edmund M. Clarke, Yulin Feng |
| 1986 | Establishment of higher level logic design for very large scale computer. Yooji Tsuchiya, Masato Morita, Yukio Ikariya, Eiichi Tsurumi, Teruo Mori, Tamoatsu Yanagita |
| 1986 | Exploiting parallelism in a switch-level simulation machine. Edward H. Frank |
| 1986 | Floor planning systems (panel session). Howard S. Rifkin, William R. Heller, Steve Law, Misha Burich, Alberto L. Sangiovanni-Vincentelli |
| 1986 | Flow graph representation. Alex Orailoglu, Daniel Gajski |
| 1986 | Flute - a floorplanning agent for full custom VLSI design. Hiroyuki Watanabe, Bryan D. Ackland |
| 1986 | Fundamentals of parallel logic simulation. Robert J. Smith |
| 1986 | GEMS: an automatic layout tool for MIMOLA schematics. Venkat V. Venkataraman, Craig D. Wilcox |
| 1986 | GENERIC: a silicon compiler support language. Jon A. Solworth |
| 1986 | GENIE: a generalized array optimizer for VLSI synthesis. Srinivas Devadas, A. Richard Newton |
| 1986 | Generating essential primes for a Boolean function with multiple-valued inputs. Yue-Sun Kuo, W. K. Chou |
| 1986 | Global forced hierarchical router. John Kessenich, Gary Jackoway |
| 1986 | HAL II: a mixed level hardware logic simulation system. Shigeru Takasaki, Tohru Sasaki, Nobuyoshi Nomizu, Hiroshi Ishikura, Nobuhiko Koike |
| 1986 | HAL: a multi-paradigm approach to automatic data path synthesis. Pierre G. Paulin, John P. Knight, Emil F. Girczyc |
| 1986 | HAPPI: a chip compiler based on double-level-metal technology. Rathin Putatunda, David Smith, Stephen McNeary, James Crabbe |
| 1986 | Hierarchial global wiring for custom chip design. Wing K. Luk, Donald T. Tang, C. K. Wong |
| 1986 | Hierarchical dynamic router. Kaoru Kawamura, Masanobu Umeda, Hiroshi Shiraishi |
| 1986 | IBM perspectives on the electrical design automation industry (keynote address). Robert M. Williams |
| 1986 | Incremental logic synthesis through gate logic structure identification. T. Shinsha, T. Kubo, Y. Sakataya, J. Koshishita, Koichiro Ishihara |
| 1986 | Integrated placement/routing in sliced layouts. Antoni A. Szepieniec |
| 1986 | Knowledge-based optimal IIL generator from conventional logic circuit descriptions. T. Watanabe, T. Masuishi, T. Nishiyama, N. Horie |
| 1986 | Knowlege-based expert systems and their application (tutorial session. William P. Birmingham, Rostam Joobbani, Jin Kim |
| 1986 | Logic synthesis and optimization benchmarks for the 1986 Design Automation Conference. Aart J. de Geus |
| 1986 | MACDAS: multi-level AND-OR circuit synthesis using two-variable function generators. Tsutomu Sasao |
| 1986 | MADMACS: a new VLSI layout macro editor. Patrice Frison, Eric Gautrin |
| 1986 | MAHA: a program for datapath synthesis. Alice C. Parker, Jorge T. Pizarro, Mitch J. Mlinar |
| 1986 | MOS circuit models in Network C. William S. Beckett |
| 1986 | Minplex - a compactor that minimizes the bounding rectangle and individual rectangles in a layout. Sching L. Lin, Jonathan Allen |
| 1986 | Mixed-level fault coverage estimation. Hi-Keung Tony Ma, Alberto L. Sangiovanni-Vincentelli |
| 1986 | Multiprocessor-based placement by simulated annealing. Saul A. Kravitz, Rob A. Rutenbar |
| 1986 | Near-optimal Richard J. Enbody, David Hung-Chang Du |
| 1986 | On fault modeling for dynamic MOS circuits. Hans-Joachim Wunderlich, Wolfgang Rosenstiel |
| 1986 | On the relative placement and the transportation problem for standard-cell layout. Knut M. Just, Jürgen M. Kleinhans, Frank M. Johannes |
| 1986 | Optimal order of the VLSI IC testing sequence. Wojciech Maly |
| 1986 | PEARL: an expert system for power supply layout. Edward J. DeJesus, James P. Callan, Curtis R. Whitehead |
| 1986 | PLEST: a program for area estimation of VLSI integrated circuits. Fadi J. Kurdahi, Alice C. Parker |
| 1986 | Plug-in timing models for an abstract timing verifier. David E. Wallace, Carlo H. Séquin |
| 1986 | Precedent-based manipulation of VLSI structures. Richard H. Lathrop, Robert S. Kirk |
| 1986 | Principles of design automatioon system for very large scale computer design. Yasuhiro Ohno, Masayuki Miyoshi, Norio Yamada, Toshihiko Odaka, Tokinori Kozawa, Kooichiro Ishihara |
| 1986 | Principles of the SYCO compiler. Ahmed Amine Jerraya, Patrick Varinot, Robert Jamier, Bernard Courtois |
| 1986 | Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, NV, USA, June, 1986. Don Thomas |
| 1986 | Reasoning about digital systems using temporal logic. S. Bapat, G. Venkatesh |
| 1986 | Robust test generation algorithm for stuck-open fault in CMOS circuits. Weiwei Mao, Xieting Ling |
| 1986 | Router system for printed wiring boards of very high-speed, very large-scale computers. Toshihiko Tada, Akihiko Hanafusa |
| 1986 | Rules-based object clustering: a data structure for symbolic VLSI synthesis and analysis. Robert P. Larsen |
| 1986 | SCAT - a new statistical timing verifier in a silicon compiler system. Manfred Glesner, Johannes Schuck, R. B. Steck |
| 1986 | SIMMOS: a multiple-delay switch-level simulator. Dan Adler |
| 1986 | SLS - a fast switch level simulator for verification and fault coverage analysis. Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Vijay S. Iyengar, Gabriel M. Silberman |
| 1986 | SOCRATES: a system for automatically synthesizing and optimizing combinational logic. David Gregory, Karen A. Bartlett, Aart J. de Geus, Gary D. Hachtel |
| 1986 | STL - a high level language for simulation and test. John Ivie, Kwok-Woon Larry Lai |
| 1986 | Sehwa: a program for synthesis of pipelines. Nohbyung Park, Alice C. Parker |
| 1986 | Self-testing with correlated faults. David R. Tryon |
| 1986 | Semantics of CAD objects for generalized databases. Dominique Rieu, Gia Toan Nguyen |
| 1986 | Simulated annealing and combinatorial optimization. Surendra Nahar, Sartaj Sahni, Eugene Shragowitz |
| 1986 | Simulating and controlling the effects of transmission line impedance mismatches. Robert E. Canright |
| 1986 | Statistics on logic simulation. Kenneth F. Wong, Mark A. Franklin, Roger D. Chamberlain, Brian L. Shing |
| 1986 | Synthesis of VLSI systems with the CAMAD design aid. Zebo Peng |
| 1986 | Synthesis of concurrent modular controllers from algorithmic descriptions. Rainer Brück, Bernd Kleinjohann, Thomas Kathöfer, Franz J. Rammig |
| 1986 | Technology adaption in logic synthesis. William H. Joyner Jr., Louise Trevillyan, Daniel Brand, Theresa A. Nix, Steven C. Gundersen |
| 1986 | TimberWolf3.2: a new standard cell placement and global routing package. Carl Sechen, Alberto L. Sangiovanni-Vincentelli |
| 1986 | Transistor-level test generation for physical failures in CMOS circuits. Hsi-Ching Shih, Jacob A. Abraham |
| 1986 | Tutorial on parallel processing for design automation applications (tutorial session). J. M. Hancock, S. Dasgupta |
| 1986 | Two-dimensional compaction by "zone refining". Hyunchul Shin, Alberto L. Sangiovanni-Vincentelli, Carlo H. Séquin |
| 1986 | Use of the subscripted DALG in submodule testing with applications in cellular arrays. M. Ladjadj, John F. McDonald, D.-H. Ho, W. Murray Jr. |
| 1986 | Using bottom-up design techniques in the synthesis of digital hardware from abstract behavioral descriptions. Michael C. McFarland |
| 1986 | VLSI CAD tool integration using the Ulysses environment. Michael L. Bushnell, Stephen W. Director |
| 1986 | Vanguard: a chip physical design system. Peter S. Hauge, Ellen J. Yoffa |
| 1986 | Yield of VLSI circuits: myths vs. reality (panel). Andrzej J. Strojwas, Clark Beck, Dennis Buss, Tülin Erdim Mangir, Charles H. Stapper |