DAC A*

138 papers

YearTitle / Authors
1985A behavioral modeling system for cell compilers.
James C. Althoff, Robert D. Shur
1985A case study in process independence.
Natalie Royal, John Hunter, Irene Buchanan
1985A circuit comparison system for bipolar linear LSI.
Takeshi Sakata, Aritoyo Kishimoto
1985A data architecture for an uncertain design and manufacturing environment.
Thomas R. Smith
1985A database management approach to CAD/CAM systems integration.
Yehuda E. Kalay
1985A design by example regular structure generator.
Cyrus Bamji, Charles E. Hauck, Jonathan Allen
1985A fully automatic hierarchical compactor.
George Entenman, Stephen W. Daniel
1985A functional language for description and design of digital systems: sequential constructs.
F. Meshkinpour, Milos D. Ercegovac
1985A functional partitioning expert system for test sequences generation.
C. Delorme, P. Roux, L. Demians d'Archimbaud, Norbert Giambiasi, R. L'Bath, B. MacGee, R. Charroppin
1985A hardware engine for analogue mode simulation of MOS digital circuits.
David M. Lewis
1985A heuristic algorithm for PLA block folding.
Yue-Sun Kuo, C. Chen, T. C. Hu
1985A hierarchical gate array architecture and design methodology.
M. Iachponi, D. Vail, S. Bierly, A. Ignatowski
1985A knowledge based planning system for mechanical assembly usign robots.
Kai-Hsiung Chang, William G. Wee
1985A knowledge based system for selecting a test methodology for a PLA.
Melvin A. Breuer, Xi-an Zhu
1985A method for gridless routing of printed circuit boards.
A. C. Finch, K. J. Mackenzie, G. J. Balsdon, G. Symonds
1985A model of design representation and synthesis.
Robert A. Walker, Donald E. Thomas
1985A module for improving data access and management in an integrated CAD environment.
G. P. Barabino, G. S. Barabino, G. Bisio, Michele Marchesi
1985A new algorithm for third generation circuit simulators: the one-step relaxation method.
B. Hennion, P. Senn, D. Coquelle
1985A routing procedure for mixed array of custom macros and standard cells.
Hidekazu Terai, Michiyoshi Hayase, Tokinori Kozawa
1985A subjective review of compaction (tutorial session).
Y. Eric Cho
1985A technique for distributed execution of design automation tools.
S. C. Hughes, D. B. Lewis, C. J. Rimkus
1985A transistor-level logic-with-timing simulator for MOS circuits.
Thomas J. Schaefer
1985A unified approach to simulation and timing verification at the functional level.
Vighneswara Row Mokkarala, Antony Fan, Ravi Apte
1985ACORN: a local customization approach to DCVS physical design.
Ellen J. Yoffa, Peter S. Hauge
1985ACTAS: an accurate timing analysis system for VLSI.
Michiaki Muraoka, Hirokazu Iida, Hideyuki Kikuchihara, Michio Murakami, Kazuyuki Hirakawa
1985ALLENDE: a procedural language for the hierarchical specification of VLSI layouts.
José Monteiro da Mata
1985ALPS2: a standard cell layout system for double-layer metal technology.
C. P. Hsu, B. N. Tien, K. Chow, R. A. Perry, J. Tang
1985Algorithms for automatic transistor sizing in CMOS digital circuits.
William H. Kao, Nader Fathi, Chia-Hao Lee
1985An abstract machine data structure for non-procedural functional models.
Robert V. Zara, Kevin Rose, Ghulam Nurie, Harish Sarin
1985An adaptive and evolutive tool for describing general hierarchical models, based on frames and demons.
Norbert Giambiasi, B. MacGee, R. L'Bath, L. Demians d'Archimbaud, C. Delorme, P. Roux
1985An algorithm for design rule checking on a multiprocessor.
George E. Bier, Andrew R. Pleszkun
1985An algorithm for one and half layer channel routing.
J. N. Song, Y. K. Chen
1985An analytical algorithm for placement of arbitrarily sized rectangular blocks.
Lu Sha, Robert W. Dutton
1985An architecture design and assessment system for software/hardware codesign.
Connie U. Smith, Geoffrey A. Frank, John L. Cuadrado
1985An automated data path synthesizer for a canonic structure, implementable in VLSI.
Kumar Ramayya, Anshul Kumar, Surendra Prasad
1985An expert systems approach to completing partially routed printed circuit boards.
Robert Leonard Joseph
1985An extensible object-oriented mixed-mod functional simulation system.
Richard H. Lathrop, Robert S. Kirk
1985An object-oriented swicth-level simulator.
C. Roy, Louis-Philippe Demers, Eduard Cerny, Jan Gecsei
1985Analysis of timing failures due to random AC defects in VLSI modules.
Nandakumar N. Tendolkar
1985Auto-interactive schematics to layout translation.
Jonathan B. Rosenberg
1985Automatic generation of digital system schematic diagrams.
Anjali Arya, Anshul Kumar, V. V. Swaminathan, Amit Misra
1985Automatic layout algorithms for function blocks of CMOS gate arrays.
Shigeo Noda, Hitoshi Yoshizawa, Etsuko Fukuda, Haruo Kato, Hiroshi Kawanishi, Takashi Fujii
1985Automatic routing algorithm for VLSI.
Hiroshi Andou, Ichiro Yamamoto, Yuuko Mori, Yutaka Koike, Kimikatsu Shouji, Kazuyuki Hirakawa
1985Building a layered database for design automation.
Robert V. Zara, David R. Henke
1985CADTOOLS: a CAD algorithm development system.
Eric Schell, M. Ray Mercer
1985CMU-CAM system.
Andrzej J. Strojwas
1985Computer aided (CA) tools integration and related standards development in a multi-vendor universe (panel session).
Roger J. Pachter
1985Computer aided design for analog applications (panel session): an assessment.
John Lowell
1985Cost-effective computer-aided manufacturing of prototype parts.
Keith S. Reid-Green
1985Course, video, and manual dexterity (tutorial): tailoring training to CAD users.
Francine S. Frome
1985Custom microcomputers for CAD optimization software.
Raj Abraham
1985Decomposition of logic networks into silicon.
Steven T. Healey, Daniel D. Gajski
1985Design for testability in a silicon compilation environment.
Hingsam S. Fung, Sanford Hirschhorn, R. Kulkarni
1985Development concerns for a software design quality expert system.
Christopher W. Pidgeon, Peter A. Freeman
1985Development of a timing analysis program for multiple clocked network.
Edward Chan
1985Diagrammatic function description of microprocessor and data-flow processor.
Gotaro Odawara, Masahiro Tomita, Ichiro Ogata
1985Early verification of prototype tooling for IC designs (tutorial).
J. P. Simmons Jr.
1985Effective data management for VLSI design.
Paul McLellan
1985Effective use of virtual grid compaction in macro-module generators.
Dwight D. Hill, John P. Fishburn, Mary Diane Palmer Leland
1985Efficient netlist comparison using hierarchy and randomization.
J. Doug Tygar, Ron Ellickson
1985Electrical optimization of PLAs.
Kye S. Hedlund
1985Electronic CAD/CAM-is it revolution or evolution (tutorial session).
Beth W. Tucker
1985Engineering workstation applications to systems design (panel session): life above the IC.
Cecelia Jankowski
1985Experiments with simulated annealing.
Surendra Nahar, Sartaj Sahni, Eugene Shragowitz
1985Functional fault modeling and simulation for VLSI devices.
Anil K. Gupta, James R. Armstrong
1985Future directions for DA machine research (panel session).
Rob A. Rutenbar
1985GAMMA: a fast prototype design, build, and test process.
Louise T. Lemaire
1985Generalised CMOS-a technology independent CMOS IC design style.
Neil Bergmann
1985Generation of layouts from MOS circuit schematics: a graph theoretic approach.
Tak-Kwong Ng, S. Lennart Johnsson
1985Hardware acceleration of gate array layout.
Philip M. Spira, Carl Hage
1985Hierarchical analysis of IC artwork with user defined abstraction rules.
Louis Scheffer, Ronny Soetarman
1985Hierarchical circuit verification.
Yiwan Wong
1985ICHABOD: a data base manager for design automation applications.
Howard B. Schutzman
1985Importance of standards (tutorial session).
Al Lowenstein, Greg Winter
1985Integrated VLSI CAD systems at Digital Equipment Corporation.
Anthony F. Hutchings, Richard J. Bonneau, William M. Fisher
1985Integrated design system for supercomputer SX-1/SX-2.
Shigenobu Suzuki, Kazutoshi Takahashi, Takao Sugimoto, Mikio Kuwata
1985Integrating stochastic performance analysis with system design tools.
Charles W. Rose, Marcus Buchnen, Yatin Trivedi
1985Knowledge-based placement technique for printed wiring boards.
Gotaro Odawara, Kazuhiko Iijima, Kazutoshi Wakabayashi
1985Layering algorithms for single row routing.
SangYong Han, Sartaj Sahni
1985Layla: a VLSI layout language.
Warren E. Cory
1985Layout design-lessons from the Jedi designer (tutorial session).
Susan L. Taylor, Roderic Beresford, Theodore Sabety
1985Linking the behavioral and structural dominis of representation in a synthesis system.
Robert L. Blackburn, Donald E. Thomas
1985Looking for Mr. "Turnkey".
Michael R. Wayne, Susan M. Braun
1985MCNC's vertically integrated symbolic design system.
C. Durward Rogers, Jonathan B. Rosenberg, Stephen W. Daniel
1985MIDAS: integrated CAD for total system design.
W. M. Budney, S. K. Holewa
1985Macromodeling of digital MOS VLSI Circuits.
Mark D. Matson
1985Magic's circuit extractor.
Walter S. Scott, John K. Ousterhout
1985Mechanical design/analysis integration on Apollo workstations.
John A. Pierro, George F. Donnellan
1985Modeling switch-level simulation using data flow.
V. Ashok, Roger L. Costello, P. Sadayappan
1985MuSiC: an event-flow computer for fast simulation of digital systems.
Winfried Hahn, Kristian Fischer
1985Multiple output minimization.
Prathima Agrawal, Vishwani D. Agrawal, Nripendra N. Biswas
1985Near-optimal placement using a quadratic objective function.
John P. Blanks
1985PATEGE: an automatic DC parametric test generation system for series gated ECL circuits.
Takuji Ogihara, Shuichi Saruyama, Shinichi Murai
1985PHIPLA-a new algorithm for logic minimization.
Peter J. M. van Laarhoven, Emile H. L. Aarts, Marc Davio
1985PLA driver selection: an analytic approach.
Fred W. Obermeier, Randy H. Katz
1985PLATYPUS: a PLA test pattern generation tool.
Ruey-Sing Wei, Alberto L. Sangiovanni-Vincentelli
1985PLAYER: a PLA design system for VLSI's.
Yoshiyuki Koseki, Teruhiko Yamada
1985PLINT layout system for VLSI chips.
Hart Anway, Greg Farnham, Rebecca Reid
1985PROTEST: a tool for probabilistic testability analysis.
Hans-Joachim Wunderlich
1985Performance evaluation of FMOSSIM, a concurrent switch-level fault simulator.
Randal E. Bryant, Michael Dd. Schuster
1985Portability in silicon CAE.
John P. Gray, John Hunter
1985Proceedings of the 22nd ACM/IEEE conference on Design automation, DAC 1985, Las Vegas, Nevada, USA, 1985.
Hillel Ofek, Lawrence A. O'Neill
1985RTG: automatic register level test generator.
Semyon Shteingart, Andrew W. Nagle, John Grason
1985Relational and entity-relationship model databases and specialized design files in VLSI design.
Marianne Winslett Wilkins, Richard Berlin, Thomas H. Payne, Gio Wiederhold
1985Resistance calculation from mask artwork data by finite element method.
Erich Barke
1985SWAMI: a flexible logic implementation system.
Christopher Rowen, John L. Hennessy
1985Silicon compilation of gate array bases.
Russel L. Steinweg, Susan J. Aguirre, Kerry Pierce, Scott Nance
1985Simulation-free estimation of speed degradation in NMOS self-testing circuits for CAD applications.
Andrzej Krasniewski, Alexander Albicki
1985Software quality assurance for CAD (tutorial).
E. Ted Grinthal
1985Speed up techniques of logic simulation.
Masayuki Miyoshi, Yoshiharu Kazama, Osamu Tada, Yasuo Nagura, Nobutaka Amano
1985Star's envoling design environment: a user's perspective on CAE.
Gary B. Goates, Patrick M. Hefferan, Robert J. Smith, Randy Harris
1985Switch-level simulation of VLSI using a special-purpose data-driven computer.
Edward H. Frank
1985Symbolic hierarchical artwork generation system.
Stef van Vlierberghe, Jeff Rijmenants, Walter Heyns
1985Symbolic manipulation of Boolean functions using a graphical representation.
Randal E. Bryant
1985Synthesis by delayed binding of decisions.
Jayanth V. Rajan, Donald E. Thomas
1985Synthesis of optimal clocking schemes.
Nohbyung Park, Alice C. Parker
1985Synthesis techniques for digital systems design.
Raul Camposano
1985Systematic and optimized layout of MOS cells.
Gabriele Saucier, Ghislaine Thuau
1985Technology tracking for VLSI layout design tools.
Kung-Chao Chu, Y. Edmund Lien
1985The ADAM advanced design automation system: overview, planner and natural language interface.
John J. Granacki, David Knapp, Alice C. Parker
1985The ITT VLSI design system: CAD integration in a multi-national environment.
N. J. Elias, R. J. Byrne, A. D. Close, Robert M. McDermott
1985The McBOOLE logic minimizer.
Michel R. Dagenais, Vinod K. Agarwal, Nicholas C. Rumin
1985The STE-264 accelerated electronic CAD system.
Patrick M. Hefferan, Robert J. Smith, Val Burdick, Donald L. Nelson
1985The Silc silicon compiler: language and features.
Timothy Blackman, Jeffrey R. Fox, Christopher Rosebrugh
1985The VIVID system approach to technology independence: the matster technology file system.
Phillip Smtih, Stephen W. Daniel
1985The VLSI design automation assistant: what's in a knowledge base.
Thaddeus J. Kowalski, Donald E. Thomas
1985The construction of minimal area power and ground nets for VLSI circuits.
Salim U. Chowdhury, Melvin A. Breuer
1985The impact of technological advances on programmable controller s(tutorial session).
Robert P. Collins, William J. Ketelhut
1985The integration of an advanced gate array router into a fully automated design system.
Robert Dwyer, Stephen Morris, Edward Bard, Daniel Green
1985Timing influenced layout design.
Michael Burstein, Mary N. Youssef
1985Towards a natural language interface for CAD.
Tariq Samad, Stephen W. Director
1985Transistor level test generation for MOS circuits.
Madhukar K. Reddy, Sudhakar M. Reddy, Prathima Agrawal
1985Two-dimensional router for double layer layout.
Malgorzata Marek-Sadowska
1985Unified user interface for a CAD system.
Alberto Di Janni, Margherita Italiano
1985WEAVER: a knowledge-based routing expert.
Rostam Joobbani, Daniel P. Siewiorek
1985Workstations (panel discussion): a complete solution to the VLSI designer?
Prathima Agrawal, Frederick L. Cohen, Chet A. Palesko, Hung-Fai Stephen Law, Mark Miller, Mike Price, David W. Smith, Nicholas P. Van Brunt
1985Yet another silicon compiler.
David E. Krekelberg, Gerald E. Sobelman, Chu S. Jhon
1985Yield analysis modeling.
Steve Perry, Mike Mitchell, David J. Pilling