DAC A*

133 papers

YearTitle / Authors
1982A "greedy" channel router.
Ronald L. Rivest, Charles M. Fiduccia
1982A "non-restrictive" artwork verification program for printed circuit boards.
David Kaplan
1982A Deterministic finite automaton approach to design rule checking for VLSI.
R. Alan Eustace, Amar Mukhopadhyay
1982A bus router for IC layout.
Margaret Lie, Chi-Song Horng
1982A combined force and cut algorithm for hierarchical VLSI layout.
G. J. Wipfler, Manfred Wiesel, Dieter A. Mlynski
1982A consideration of the number of horizontal grids used in the routing of a masterslice layout.
Masayuki Terai, Hajime Kanada, Koji Sato, Toshihiko Yahara
1982A database approach for managing VLSI design data.
Randy H. Katz
1982A database management system for design engineers.
Jack Bennett
1982A depth-first branch-and-bound algorithm for optimal PLA folding.
Werner Grass
1982A design methodology based upon symbolic layout and integrated cad tools.
A. M. Beyls, B. Hennion, Jacques Lecourvoisier, Guy Mazaré, Alain Puissochet
1982A design system approach to data integrity.
William A. Noon, Ken N. Robbins, M. Ted Roberts
1982A fault simulation methodology for VLSI.
John P. Hayes
1982A fault simulator for MOS LSI circuits.
Ajoy K. Bose, Patrick Kozak, Chi-Yuan Lo, Hao N. Nham, Ernesto Pacas-Skewes, Kwok W. Wu
1982A formal method for computer design verification.
Vijay Pitchumani, Edward P. Stabler
1982A functional level modelling language for digital simulation.
P. J. DesMarais, E. S. Y. Shew, Philip S. Wilcox
1982A hardware assisted design rule check architecture.
Larry Seiler
1982A hardware description language for processor based digital systems.
James H. Tracey, Kovvali Surya Kumar
1982A hybrid CAD/CAM system for mechanical applications.
Jeffrey Z. Gingerich, Michael P. Carroll, E. J. Chelius, Po-Kuan Lu
1982A language for a scientific and engineering database system.
Ted M. Sparr
1982A layout synthesis system for NMOS gate-cells.
Joseph F. P. Luhukay, William J. Kubitz
1982A layout system for high precision design of progressive die.
Kazuyuki Inoue, Masahiko Adachi, Toru Funayama
1982A linear-time heuristic for improving network partitions.
Charles M. Fiduccia, Robert M. Mattheyses
1982A logic minimizer for VLSI PLA design.
Bill Teel, Doran Wilde
1982A logic simulation machine.
Miron Abramovici, Ytzhak H. Levendel, Prem R. Menon
1982A low cost, transportable, data management system for LSI/VLSI design.
David C. Smith, Barry S. Wagner
1982A minimum-impact routing algorithm.
Kenneth J. Supowit
1982A new two-dimensional routing algorithm.
Chi-Ping Hsu
1982A placement algorithm for polycell LSI and ITS evaluation.
Takashi Kambe, Toru Chiba, Seiji Kimura, Tsuneo Inufushi, Noboru Okuda, Ikuo Nishioka
1982A retrospective on software engineering in design automation.
Lawrence A. O'Neill
1982A survey of the state-of-the-art of design automation an invited presentation.
Melvin A. Breuer
1982A symbolic design system for integrated circuits.
Kenneth H. Keller, A. Richard Newton, S. Ellis
1982A user interface for architectural design, a case study.
Gregory John Glass
1982A utilitarian approach to CAD.
T. J. Thompson
1982A verification technique for hardware designs.
Fumihiro Maruyama, Takao Uehara, Nobuaki Kawato, Takao Saito
1982ALI: A procedural language to describe VLSI layouts.
Richard J. Lipton, Stephen C. North, Robert Sedgewick, Jacobo Valdes, Gopalakrishnan Vijayan
1982An Interactive Simulation System for structured logic design - ISS.
Takeshi Sakai, Yoshiyuki Tsuchida, Hiroto Yasuura, Yasushi Ooi, Yoshitsugu Ono, Hiroshi Kano, Shinji Kimura, Shuzo Yajima
1982An analytical method for compacting routing area in integrated circuits.
Maciej J. Ciesielski, Edwin Kinnen
1982An efficient variable-cost maze router.
Robert K. Korn
1982An enhancement of lssd to reduce test pattern generation effort and increase fault coverage.
Kewal K. Saluja
1982An interactive drafting system based on two dimensional primitives.
G. Cosmai, Umberto Cugini, Piero Mussio, Amri Napolitano
1982An interactive logic synthesis system based upon AI techniques.
Nobuaki Kawato, Takao Uehara, Sadaki Hirose, Takao Saito
1982An interactive testability analysis program - ITTAP.
Deepak K. Goel, Robert M. McDermott
1982Arbitrarily-sized module location technique in the lop system.
Gotaro Odawara, Kazuhiko Iijima, Tetsuro Kiyomatsu
1982Auto-delay: A program for automatic calculation of delay in LSI/VLSI chips.
Rathin Putatunda
1982Automated conversion of design data for building the IBM 3081.
Vincent J. Freund Jr., J. A. Guerin
1982Automated layout in ASHLAR: An approach to the problems of "General Cell" layout for VLSI.
James E. Hassett
1982Automated partitioning of hierarchically specified digital systems.
Thomas S. Payne, William M. van Cleemput
1982Automated rip-up and reroute techniques.
William A. Dees Jr., Patrick G. Karger
1982Automatic floorplan design.
Ralph H. J. M. Otten
1982Automatic generation of microprocessor test programs.
Catherine Bellon, A. Liothin, Sylvain Sadier, Gabriele Saucier, Raoul Velazco, Francois Grillot, M. Issenman
1982Aw expanded logic equation list for checkout.
Robert P. Larsen, James Allen Luisi, A. K. Singh
1982CGALA-a multi technology Gate Array Layout system.
Lee F. Todd, J. M. Hansen, S. V. Pantulu, John L. Barron, D. J. Gilbert, R. J. Anderson, A. K. Biyani
1982Cellular image processing techniques for VLSI circuit layout validation and routing.
Trevor N. Mudge, Rob A. Rutenbar, Robert M. Lougheed, Daniel E. Atkins
1982Computer system design description.
Yaohan Chu
1982DORA: : CAD interface to automatic diagnostics.
R. W. Allen, M. M. Ervin-Willis, Rodham E. Tulloss
1982Defining and implementing a multilevel design representation with simulation applications.
John A. Nestor, Donald E. Thomas
1982Design automation algorithms: Research and applications.
Richard J. Lipton, J. Daniel Nash
1982Design for testability.
Thomas W. Williams
1982Design of a graphic processor for computer-aided drafting.
Clive K. Liu, Charles M. Eastman
1982Design of command menus for CAD systems.
Lynne A. Price
1982Design verification system for large-scale LSI designs.
Michael Monachino
1982Designer's Workbench: Delivery of cad tools.
Robert Alan Friedenson, J. R. Breiland, T. J. Thompson
1982Designing gate arrays using a silicon compiler.
John P. Gray, Irene Buchanan, Peter Salkeld Robertson
1982Developments in logic network path delay analysis.
Lionel Bening, Thomas A. Lane, Curtis R. Alexander, James E. Smith
1982Digital logic modeling system based on MODLAN.
Adam Pawlak
1982Distributed computation for design aids.
Saul Yermie Levy
1982Electronic Chip-in-Place Test.
Prabhakar Goel, M. T. McMahon
1982Evolution of the engineering design system data base.
Jere L. Sanborn
1982Experiments using interactive color raster graphics for CAD.
Abe R. Shliferstein
1982Formal semantics for the automated derivation of micro-code.
Robert A. Mueller, Joseph Varghese
1982Gate matrix layout of random control logic in a 32-bit CMOS CPU chip adaptable to evolving logic design.
Sung-Mo Kang, Robert H. Krambeck, Hung-Fai Stephen Law
1982Global wiring on a wire routing machine.
Ravi Nair, Se June Hong, Sandy Liles, Ray Villani
1982Hardware support for automatic routing.
Erik Damm, H. Gethöffer
1982Hierarchical top-down layout design method for VLSI chip.
Tohru Adachi, Hitoshi Kitazawa, Mitsuyoshi Nagatani, Tsuneta Sudo
1982IBM 3081 system overview and technology.
Clive A. Collins
1982ICAD/PCB: Integrated computer aided design system for printed circuit boards.
Hiroshi Shiraishi, Mitsuo Ishii, Shoichi Kurita, Masaaki Nagamine
1982Implication algorithms for MOS switch level functional macromodeling implication and testing.
Michael R. Lightner, Gary D. Hachtel
1982Important criteria in selecting engineering work stations.
Fontaine Richardson
1982Interactive design language: A unified approach to hardware simulation, synthesis and documentation.
Leon I. Maissel, Daniel L. Ostapko
1982LAMBDA: A quick, low cost layout design system for master-slice LSI s.
Tsuneo Matsuda, Tomyyuki Fujita, K. Takamizawa, H. Mizumura, H. Nakamura, F. Kitajima, Satoshi Goto
1982Logic simulation for LSI.
Kazuyuki Hirakawa, Noboru Shiraki, Michiaki Muraoka
1982Logical correctness by construction.
Sany M. Leinwand
1982Lyra: A new approach to geometric layout rule checking.
Michael H. Arnold, John K. Ousterhout
1982Making the wire frame solid.
Donald Robbins
1982Measurements of a VLSI design.
John K. Ousterhout, David M. Ungar
1982Modeling polyhedral solids bounded by multi-curved parametric surfaces.
Yehuda E. Kalay
1982Modular description/simulation/synthesis using DDL.
Sajjan G. Shiva, J. A. Covington
1982Object data structures towards distributed graphics processing.
David Grabel
1982On finding most optimal rectangular package plans.
Klim Maling, Steven H. Mueller, William R. Heller
1982On routing for custom integrated circuits.
Zahir A. Syed, Abbas El Gamal, Melvin A. Breuer
1982On routing two-point nets across a channel.
Ron Y. Pinter
1982Operational aspects of design automation for the IBM 3081.
Robert F. Woodward
1982Optimal bipartite folding of PLA.
Jack R. Egan, C. L. Liu
1982Optimal single row router.
Raghunath Raghavan, Sartaj Sahni
1982Optimum placement of two rectangular blocks.
Mandalagiri S. Chandrasekhar, Melvin A. Breuer
1982PAOLA: A tool for topological optimization of large PLAS.
Samuel Chuquillanqui, Tomás Pérez Segovia
1982Parametric pattern router.
Tetsuo Asano
1982Philo-a VLSI design system.
Richard L. Donze, Jacob Sanders, Michael Jenkins, George Sporzynski
1982Proceedings of the 19th Design Automation Conference, DAC '82, Las Vegas, Nevada, USA, June 14-16, 1982
James S. Crabbe, Charles E. Radke, Hillel Ofek
1982Programs for verifying circuit connectivity of mos/lsi mask artwork.
Makoto Takashima, Takashi Mitsuhashi, Toshiaki Chiba, Kenji Yoshida
1982QCADS-a LSI CAD system for minicomputer.
Xian-Long Hong, Ren-kung Yin, Xi-ling Liu
1982Relax: A new circuit for large scale MOS integrated circuits.
Ekachai Lelarasmee, Alberto L. Sangiovanni-Vincentelli
1982Riot - a simple graphical chip assembly tool.
Stephen Trimberger, James A. Rowson
1982Robotics: The new automation tool.
Harold R. Marcotte
1982SAGA: An Experimental Silicon Assembler.
Antoni A. Szepieniec
1982Simplified data structure for "mini-based" turnkey CAD systems.
Joseph Peled
1982Software support for the Yorktown Simulation Engine.
E. Kronstadt, Gregory F. Pfister
1982Special purpose vs. general purpose hardware for da.
T. H. Bruggere
1982Speed and accuracy in digital network simulation based on structural modeling.
Ernst G. Ulrich, Dennis Hebert
1982Synchronous path analysis in MOS circuit simulator.
Vishwani D. Agrawal
1982Techniques for programmable logic array folding.
Gary D. Hachtel, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
1982Test generation for programmable logic arrays.
Pradip Bose, Jacob A. Abraham
1982Testing functional faults in VLSI.
Yinghua Min, Stephen Y. H. Su
1982The "PI" (placement and interconnect) system.
Ronald L. Rivest
1982The 1-2-3 routing algorithm or the single channel 2-step router on 3 interconnection layers.
Walter Heyns
1982The Yorktown Simulation Engine.
Monty Denneau
1982The Yorktown Simulation Engine: Introduction.
Gregory F. Pfister
1982The conlan project: Status and future plans.
Robert Piloty, Dominique Borrione
1982The excell method for efficient geometric access to data.
Markku Tamminen, Reijo Sulonen
1982The planar package planner for system designers.
William R. Heller, Gregory B. Sorkin, Klim Maling
1982The quad-CIF tree: A data structure for hierarchical on-line algorithms.
Gershon Kedem
1982Timing Verification and the Timing Analysis program.
Robert B. Hitchcock Sr.
1982Timing verification system based on delay time hierarchical nature.
Minoru Nomura, Shinichi Sato, Nobuo Takano, Toshinori Aoyama, Akihiko Yamada
1982Top down design and testability of VLSI circuits.
Philippe Basset, Gabriele Saucier
1982Toward CAM-oriented CAD.
Farhad Arbab, Larry Lichten, Michel A. Melkanoff
1982Towards VLSI complexity: The DA algorithm scaling problem: can special DA hardware help?
H. G. Adshead
1982Transmission gate modeling in an existing three-value simulator.
Robert M. McDermott
1982Two-dimensional channel routing and channel intersection problems.
Manfred Wiesel, Dieter A. Mlynski
1982VEEP A VEctor Editor and Preparer.
Stacey J. Gelman
1982VHSIC HDL.
James B. Rawlings
1982VLSI design methodology workshop.
J. Daniel Nash
1982Verification testing.
Edward J. McCluskey
1982Workshop - industrial robotics.
Hriday R. Prasad