| 1981 | A CAD system for logic design based on frames and demons. Takao Saito, Takao Uehara, Nobuaki Kawato |
| 1981 | A CODASYL CAD data base system. Günther Zintl |
| 1981 | A MOS modelling technique for 4-state true-value hierarchical logic simulation or Karnough knowledge. Will Sherwood |
| 1981 | A MOS/LSI oriented logic simulator. Dan Holt, Dave Hutchings |
| 1981 | A State-Machine Synthesizer - SMS. Douglas W. Brown |
| 1981 | A computer-aided-design system for segmented-folded PLA macro-cells. I. Suwa, William J. Kubitz |
| 1981 | A concurrent pattern operation algorithm for VLSI mask data. Tokinori Kozawa, Akira Tsukizoe, Jun'ya Sakemi, Chihei Miura, Tatsuki Ishii |
| 1981 | A critical path delay check system. Ryotaro Kamikawai, Minoru Yamada, Tsuneyo Chiba, Kenichi Furumaya, Yoji Tsuchiya |
| 1981 | A design automation system for electronic switching systems. T. Hosaka, K. Ueda, H. Matsuura |
| 1981 | A dogleg "optimal" channel router with completion enhancements. Michi M. Wada |
| 1981 | A formal method for the specification, analysis, and design of register-transfer level digital logic. Louis J. Hafer, Alice C. Parker |
| 1981 | A high-density multilayer PCB router based on necessary and sufficient conditions for single row routing. Raymond Y. Tsui, Robert J. Smith |
| 1981 | A low cost hierarchical system for VLSI layout and verification. Tom H. Edmondson, Richard M. Jennings |
| 1981 | A maximal resolution guided-probe testing algorithm. Miron Abramovici |
| 1981 | A multiprocessor raster display for interactive graphics system design. Walter M. Anderson |
| 1981 | A parallel bit map processor architecture for DA algorithms. Tom Blank, Mark Stefik, William M. van Cleemput |
| 1981 | A perspective view of the MODCON system. Y. K. Chan |
| 1981 | A preprocessor for channel routing. Ming H. Young, Larry Cooke |
| 1981 | A remote design station for customer Uncommitted Logic Array designs. Frank R. Ramsay |
| 1981 | A set of programs for MOS design. G. Sakauye, Anna Lubiw, J. Royle, R. Epplett, Jeffrey Tweedale, E. S. Y. Shew, E. Attfield, Franc Brglez, Philip S. Wilcox |
| 1981 | A simulator to replace wire rules for high speed computer design. Adrian Hlynka |
| 1981 | A statistical model for net length estimation. Lai-Chering Suen |
| 1981 | A structured approach to selecting a CAD/CAM system. R. I. McNall Jr., R. J. D'Innocenzo |
| 1981 | A technology relative Logic Synthesis and Module Selection system. Gary W. Leive, Donald E. Thomas |
| 1981 | A timing verification system based on extracted MOS/VLSI circuit parameters. Pauline Ng, Wolfram Glauert, Robert Kirk |
| 1981 | A total verification of printed circuit artwork. Manfred A. Ward |
| 1981 | A totally integrated systems approach to design and manufacturing at McDonnell Douglas Corporation. Mike Mills |
| 1981 | A vertically organized computer-aided design data base. Kenneth A. Roberts, Thomas E. Baker, David H. Jerome |
| 1981 | ABLE: A LISP-based layout modeling language with user-definable procedural models for storage/logic array design. Gary B. Goates, Suhas S. Patil |
| 1981 | AIDE - a tool for computer architecture design. D. J. Ellenberger, Ying W. Ng |
| 1981 | Aiming at a general routing strategy. J. Heinisch |
| 1981 | Algorithms for multiple-criterion design of microprogrammed control hardware. Andrew W. Nagle, Alice C. Parker |
| 1981 | An O (N log N) algorithm for Boolean mask operations. Ulrich Lauther |
| 1981 | An algorithm for searching shortest path by propagating wave fronts in four quadrants. Xiong Ji-Guang, Tokinori Kozawa |
| 1981 | An algorithmic pretest development for fault identification in analog networks. Vijay Masurkar |
| 1981 | An automatic/interactive layout planning system for arbitrarily-sized rectangular building blocks. Chi-Song Horng, Margaret Lie |
| 1981 | An integrated computer aided design system for gate array masterslices: Part 1. Logic reorganization system LORES-2. Chiyoji Tanaka, Shinichi Murai, Shunichiro Nakamura, Takuji Ogihara, Masayuki Terai, Kozo Kinoshita |
| 1981 | An integrated computer aided design system for gate array masterslices: Part 2 the layout design system MARS-M3. Chiyoji Tanaka, Shinichi Murai, Hiroo Tsuji, Toshihiko Yahara, Kaoru Okazaki, Masayuki Terai, Reiji Katoh, Mikio Tachibana |
| 1981 | An optimum layer assignment for routing in ICs and PCBs. Maciej J. Ciesielski, Edwin Kinnen |
| 1981 | Application of volumetric modeling to mechanical design and analysis. D. L. Dewhirst, R. C. Hillyard |
| 1981 | Area-time efficient addition in charge based technology. Robert K. Montoye |
| 1981 | Automatic PLA synthesis from a DDL-P description. Sungho Kang, William M. van Cleemput |
| 1981 | Automatic VLSI layout verification. Laurin Williams |
| 1981 | Automatic component placement in an interactive minicomputer environment. Charles F. Shupe |
| 1981 | Automatic generation and characterization of CMOS polycells. C. M. Lee, Basant R. Chawla, S. Just |
| 1981 | Automatic generation of cells for recurrence structures. Avinoam Bilgory, Daniel D. Gajski |
| 1981 | Automatic input and interactive editing systems of logic circuit diagrams. Mitsuo Ishii, Yoshikazu Ito, Michiko Iwasaki, Masanari Yamamoto, Sadao Kodama |
| 1981 | Automatic placement of rectangular blocks with the interconnection channels. R. Malladi, Gilles Serrero, André Verdillon |
| 1981 | Automatic test generation for stuck-open faults in CMOS VLSI. Yacoub M. El-Ziq |
| 1981 | BOLT-a block oriented design specification language. Dan Holt, Steve Sapiro |
| 1981 | CAD for military systems, an essential link to LSI, VLSI and VHSIC technology. Randolph Reitmeyer Jr. |
| 1981 | CELTIC - solving the problems of LSI design with an integrated polycell DA system. G. Martin, J. Berrie, T. Little, D. Mackay, J. McVean, D. Tomsett, L. Weston |
| 1981 | Changing the Government's role in design automation (Position Paper). John M. Gould |
| 1981 | Circuit recognition and verification based on layout information. I. Ablasser, U. Jäger |
| 1981 | Combining graphics and a layout language in a single interactive system. Stephen Trimberger |
| 1981 | Computation of power supply nets in VLSI layout. Hans-Jürgen Rothermel, Dieter A. Mlynski |
| 1981 | Computer-Aided Design, Manufacturing, Assembly and Test (CADMAT). F. C. Bergsten |
| 1981 | Computer-aided computer-aided design: Improving CAD programmer productivity. Stanley Wong |
| 1981 | Contrasts in physical design between LSI and VLSI. William R. Heller |
| 1981 | Creating and updating space occupancy and building plans using interactive graphics. R. A. Scoble |
| 1981 | Current issues in government interest and involvement in CAD. Paul Losleben |
| 1981 | Custom VLSI electrical rule checking in an intelligent terminal. L. V. Corbin |
| 1981 | Data structures for CAD object description. Michel Lacroix, Alain Pirotte |
| 1981 | Defining the bounding edges of a SynthaVision solid model. Robert C. Goldstein |
| 1981 | Design Automation - a perspective (Position Paper). H. Wayne Spence |
| 1981 | Design automation status in Japan. Akihiko Yamada |
| 1981 | Deterministic systems design from functional specifications. Hans Wojtkowiak |
| 1981 | Diagnostic system for large scale logic cards and LSI'S. Susumu Goshima, Yuichi Oka, Tokinori Kozawa, Teruo Mori, Yoshimitsu Takeguchi, Yasuhiro Ohno |
| 1981 | Digital system simulation: Current status and future trends or darwin's theory of simulation. Melvin A. Breuer, Alice C. Parker |
| 1981 | Domain knowledge and the design process. John McDermott |
| 1981 | Efficient Boolean operations on IC masks. James A. Wilmore |
| 1981 | Functional level simulation in FANSIM3 - algorithms, data structures and results. S. Hirschhorn, M. Hommel, C. Bures |
| 1981 | Functional modelling for logic simulation. Peter G. Raeth, John M. Acken, Gary B. Lamont, John M. Borky |
| 1981 | GSP: A logic simulator for LSI. James R. Armstrong, D. E. Devlin |
| 1981 | Geometric modeling technology. William Luts |
| 1981 | Government actions to increase CAD software productivity. Dan C. Nash |
| 1981 | Government interest and involvement in DA from the Sandia viewpoint. Charles W. Gwyn |
| 1981 | Government interest and involvement in design automation development (Panel Discussion). Ronald Waxman, Jonathan Allen, Robert W. Dutton, John M. Gould, Charles W. Gwyn, Paul Losleben, Dan C. Nash, Lawrence Sumney, H. Wayne Spence |
| 1981 | Government interest and involvement in design automation development (Position paper for the Panel Discussion). Jonathan Allen |
| 1981 | Government interest and involvement in design automation development the VHSIC perspective. Larry W. Sumney |
| 1981 | Graphics language / one - IBM Corporate-Wide physical design data format. David R. Lambert |
| 1981 | Hardware description levels and test for complex circuits. Catherine Bellon, Gabriele Saucier, José-Maria Gobbi |
| 1981 | Hierarchical design verification for large digital systems. Tohru Sasaki, Akihiko Yamada, Toshinori Aoyama, Katsutoshi Hasegawa, Shunichi Kato, Shinichi Sato |
| 1981 | INCOD: A system for Interactive Conceptual Data Base Design. Carlo Batini, Maurizio Lenzerini |
| 1981 | Interactive graphics for volume modeling. Robert N. Wolfe, William J. Fitzgerald, Franklin Gracer |
| 1981 | Interactive shape generation and spatial conflict testing. Yehuda E. Kalay |
| 1981 | LSI product quality and fault coverage. Vishwani D. Agrawal, Sharad C. Seth, Prathima Agrawal |
| 1981 | MILD - A cell-based layout system for MOS-LSI. Koji Sato, Takao Nagai, Mikio Tachibana, Hiroyoshi Shimoyama, Masaru Ozaki, Toshihiko Yahara |
| 1981 | MOSSIM: A switch-level simulator for MOS LSI. Randal E. Bryant |
| 1981 | Mechanical design automation in IBM Poughkeepsie. Gilbert W. Curl Jr. |
| 1981 | On logic comparison. Leonard Berman |
| 1981 | On proving the correctness of optimizing transformations in a digital design automation system. Michael C. McFarland |
| 1981 | On the layering problem of multilayer PWB wiring. Shuji Tsukiyama, Ernest S. Kuh, Isao Shirakawa |
| 1981 | On the use of the linear assignment algorithm in module placement. Sheldon B. Akers Jr. |
| 1981 | Optimization of the PLA area. Jean-François Paillotin |
| 1981 | Overview of an Arithmetic Design System. Daniel E. Atkins, Wentai Liu, Shauchi Ong |
| 1981 | PANAMAP-B: A mask verification system for bipolar IC. J. Yoshida, T. Ozaki, Y. Goto |
| 1981 | PAS-CIP: An interactive logic design system. Gotaro Odawara, Satoshi Kurishima, Hiroshi Aoyama, Yasuhiko Kanaya |
| 1981 | PAS-LOP: An automatic module location system for PWB. Gotaro Odawara, Kazuhiko Iijima, Naoto Ichihara, Tetsuro Kiyomatsu |
| 1981 | PODEM-X: An automatic test generation system for VLSI logic structures. Prabhakar Goel, Barry C. Rosales |
| 1981 | PRIMEAIDS: An integrated electrical design environment. Roger Cleghorn |
| 1981 | Partitioning for VLSI placement problems. Arvind M. Patel, L. C. Cote |
| 1981 | Performance of interconnection rip-up and reroute strategies. William A. Dees Jr., Robert J. Smith |
| 1981 | Placement of variable size circuits on LSI masterslices. K. H. Khokhani, Arvind M. Patel, W. Ferguson, J. Sessa, D. Hatton |
| 1981 | Plant design management system (PDMS) in action. |
| 1981 | Position statement - tools for design automation from a university point of view. Robert W. Dutton |
| 1981 | Proceedings of the 18th Design Automation Conference, DAC '81, Nashville, Tennessee, USA, June 29 - July 1, 1981 Robert J. Smith |
| 1981 | Process oriented logic simulation. Sany M. Leinwand |
| 1981 | Random fault analysis. Robert M. McDermott |
| 1981 | Recent developments in representation in the science of design. Charles M. Eastman |
| 1981 | Routing of printed circuit boards. S. Aranoff, Y. Abulaffio |
| 1981 | SHARPS: A hierarchical layout system for VLSI. Toru Chiba, Noboru Okuda, Takashi Kambe, Ikuo Nishioka, Tsuneo Inufushi, Sieji Kimura |
| 1981 | Signal delay in RC tree networks. Paul Penfield Jr., Jorge Rubinstein |
| 1981 | Software engineering applied to computer-aided design (CAD) software development. Dan C. Nash, H. Willman |
| 1981 | Some properties of a probabilistic model for global wiring. D. Wallace, L. Hemachandra |
| 1981 | Structured trace diagnosis for LSSD board testing - an alternative to full fault simulated diagnosis. Frank C. Hsu, Peter Solecky, Robert E. Beaudoin |
| 1981 | Survey of analysis, simulation and modeling for large scale logic circuits. Albert E. Ruehli |
| 1981 | Symbolic simulation for functional verification with ADLIB and SDL. Wendell E. Cory |
| 1981 | TWIGY - a topological algorithm based routing system. Michel T. Doreau, Piotr Koziol |
| 1981 | Test data verification - not just the final step for test data before release for production testing. Peter Solecky, R. L. Panko |
| 1981 | The "gap" between users and designers of CAD/CAM systems: Search for solutions. Joseph Peled, Michael P. Carroll |
| 1981 | The Cell Design System. Dave Franco, Larry Reed |
| 1981 | The Hughes Automated Layout System - automated LSI/VLSI layout based on channel routing. G. Persky, C. Enger, D. M. Selove |
| 1981 | The analog behavior of digital integrated circuits. Lance A. Glasser |
| 1981 | The effects of CAD on the engineering organization (Position paper). Paul Felton |
| 1981 | The generation of Technical Data Drawing Packages by the integration of Design Automation Graphics. Harvey N. Lerman |
| 1981 | The modeling and synthesis of bus systems. Chia-Jeng Tseng, Daniel P. Siewiorek |
| 1981 | The relational/network Hybrid data model for Design Automation Databases. Mark N. Haynie |
| 1981 | The role of engineering in the evolving technology/automation interface. R. P. Lydick |
| 1981 | The role of engineering in the evolving technology/automation interface. Peter E. Barck |
| 1981 | User documentation for Design Automation at TI. Diana Mae Sims, James Crabbe |
| 1981 | Using error latch trace to obtain diagnostic information. Paul M. Almy, Jose L. Rivero |
| 1981 | Vector coding techniques for high speed digital simulation. Howard E. Krohn |
| 1981 | Verification and optimization for LSI & PCB layout. H. Nelson Brady, Robert J. Smith |
| 1981 | Virtual grid symbolic layout. Neil Weste |
| 1981 | What to do when the seat of your pants wears out - the formalization of the VLSI design process. Ed Burdick |