IEEE Symposium on Computer Arithmetic C

32 papers

YearTitle / Authors
201120th IEEE Symposium on Computer Arithmetic, ARITH 2011, Tübingen, Germany, 25-27 July 2011
Elisardo Antelo, David Hough, Paolo Ienne
2011A 1.5 Ghz VLIW DSP CPU with Integrated Floating Point and Fixed Point Instructions in 40 nm CMOS.
Timothy Anderson, Duc Bui, Shriram Moharil, Soujanya Narnur, Mujibur Rahman, Anthony Lell, Eric Biscondi, Ashish Shrivastava, Peter Dent, Mingjian Yan, Hasan Mahmood
2011A Family of High Radix Signed Digit Adders.
Saeid Gorgin, Ghassem Jaberipur
2011A General Approach for Improving RNS Montgomery Exponentiation Using Pre-processing.
Filippo Gandino, Fabrizio Lamberti, Paolo Montuschi, Jean-Claude Bajard
2011A Prescale-Lookup-Postscale Additive Procedure for Obtaining a Single Precision Ulp Accurate Reciprocal.
David W. Matula, Mihai T. Panu
2011Accelerating Computations on FPGA Carry Chains by Operand Compaction.
Thomas B. Preußer, Martin Zabel, Rainer G. Spallek
2011Accelerating Large-Scale HPC Applications Using FPGAs.
Robert G. Dimond, Sébastien Racanière, Oliver Pell
2011Augmented Precision Square Roots and 2-D Norms, and Discussion on Correctly Rounding sqrt(x^2+y^2).
Nicolas Brisebarre, Mioara Joldes, Peter Kornerup, Érik Martin-Dorel, Jean-Michel Muller
2011Automatic Generation of Code for the Evaluation of Constant Expressions at Any Precision with a Guaranteed Error Bound.
Sylvain Chevillard
2011Automatic Generation of Fast and Certified Code for Polynomial Evaluation.
Christophe Mouilleron, Guillaume Revy
2011Bit-Sliced Binary Normal Basis Multiplication.
Billy Bob Brumley, Dan Page
2011Composite Iterative Algorithm and Architecture for q-th Root Calculation.
Álvaro Vázquez, Javier D. Bruguera
2011Efficient SIMD Arithmetic Modulo a Mersenne Number.
Joppe W. Bos, Thorsten Kleinjung, Arjen K. Lenstra, Peter L. Montgomery
2011Fast Ripple-Carry Adders in Standard-Cell CMOS VLSI.
Neil Burgess
2011Flocq: A Unified Library for Proving Floating-Point Algorithms in Coq.
Sylvie Boldo, Guillaume Melquiond
2011Fused Multiply-Add Microarchitecture Comprising Separate Early-Normalizing Multiply and Add Pipelines.
David Raymond Lutz
2011High Degree Toom'n'Half for Balanced and Unbalanced Multiplication.
Marco Bodrato
2011High Intelligence Computing: The New Era of High Performance Computing.
Ralf Fischer
2011How to Square Floats Accurately and Efficiently on the ST231 Integer Processor.
Claude-Pierre Jeannerod, Jingyan Jourdan-Lu, Christophe Monat, Guillaume Revy
2011Latency Sensitive FMA Design.
Sameh Galal, Mark Horowitz
2011On the Fixed-Point Accuracy Analysis and Optimization of FFT Units with CORDIC Multipliers.
Omid Sarbishei, Katarzyna Radecka
2011ROM-less LNS.
Rizalafande Che Ismail, J. Nicholas Coleman
2011Radix-16 Combined Division and Square Root Unit.
Alberto Nannarelli
2011Radix-8 Digit-by-Rounding: Achieving High-Performance Reciprocals, Square Roots, and Reciprocal Square Roots.
J. Adam Butts, Ping Tak Peter Tang, Ron O. Dror, David E. Shaw
2011Self Checking in Current Floating-Point Units.
Daniel Lipetz, Eric Schwarz
2011Short Division of Long Integers.
David Harvey, Paul Zimmermann
2011Teraflop FPGA Design.
Martin Langhammer
2011The Arithmetic Operators You Will Never See in a Microprocessor.
Florent de Dinechin
2011The IBM zEnterprise-196 Decimal Floating-Point Accelerator.
Steven R. Carlough, Adam Collura, Silvia M. Müller, Michael Kroener
2011The POWER7 Binary Floating-Point Unit.
Maarten Boersma, Michael Kroener, Christophe Layer, Petra Leber, Silvia M. Müller, Kerstin Schelm
2011Tight Certification Techniques for Digit-by-Rounding Algorithms with Application to a New 1/sqrt(x) Design.
Ping Tak Peter Tang, J. Adam Butts, Ron O. Dror, David E. Shaw
2011Towards a Quaternion Complex Logarithmic Number System.
Mark G. Arnold, John R. Cowles, Vassilis Paliouras, Ioannis Kouretas