| 1999 | 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 14-16 April 1999, Adelaide, Australia |
| 1999 | A 32-Bit Logarithmic Arithmetic Unit and its Performance Compared to Floating-Point. John N. Coleman, E. I. Chester |
| 1999 | A Comparison of Three Rounding Algorithms for IEEE Floating-Point Multiplication. Guy Even, Peter-Michael Seidel |
| 1999 | A Family of Adders. Simon Knowles |
| 1999 | A Low-Power, High-Speed Implementation of a PowerPC(tm) Microprocessor Vector Extension. Martin S. Schmookler, Michael Putrino, Anh Mather, Jon Tyler, Huy Van Nguyen, Charles Roth, Mukesh Sharma, Mydung N. Pham, Jeff Lent |
| 1999 | A Reverse Converter for the 4-moduli Superset {2 Manish Bhardwaj, Thambipillai Srikanthan, Christopher T. Clarke |
| 1999 | Area x Delay (A T) Efficient Multiplier Based on an Intermediate Hybrid Signed-Digit (HSD-1) Representation. Jeng-Jong J. Lue, Dhananjay S. Phatak |
| 1999 | Arithmetic with Signed Analog Digits. Aryan Saed, Majid Ahmadi, Graham A. Jullien |
| 1999 | Boosting Very-High Radix Division with Prescaling and Selection by Rounding. Paolo Montuschi, Tomás Lang |
| 1999 | Complex Logarithmic Number System Arithmetic Using High-Radix Redundant CORDIC Algorithms. David Lewis |
| 1999 | Computer Arithmetic - A Programmer's Perspective. Richard P. Brent |
| 1999 | Correctness Proofs Outline for Newton-Raphson Based Floating-Point Divide and Square Root Algorithms. Marius A. Cornea-Hasegan, Roger A. Golliver, Peter W. Markstein |
| 1999 | Digit-Recurrence Algorithm for Computing Euclidean Norm of a 3-D Vector. Naofumi Takagi, Seiji Kuwahara |
| 1999 | Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication. Reto Zimmermann |
| 1999 | Floating Point Division and Square Root Algorithms and Implementation in the AMD-K7 Microprocessor. Stuart F. Oberman |
| 1999 | Floating-Point Unit in Standard Cell Design with 116 Bit Wide Dataflow. Guenter Gerwig, Michael Kroener |
| 1999 | High-Speed Inverse Square Roots. Michael J. Schulte, Kent E. Wires |
| 1999 | Intermediate Variable Encodings that Enable Multiplexor-Based Implementations of Two Operand Addition. Dhananjay S. Phatak, Israel Koren |
| 1999 | Interval Sine and Cosine Functions Computation Based on Variable-Precision CORDIC Algorithm. Javier Hormigo, Julio Villalba, Emilio L. Zapata |
| 1999 | Low-Power Division: Comparison among Implementations of Radix 4, 8 and 16. Alberto Nannarelli, Tomás Lang |
| 1999 | Moduli for Testing Implementations of the RSA Cryptosystem. Colin D. Walter |
| 1999 | Montgomery Modular Exponentiation on Reconfigurable Hardware. Thomas Blum |
| 1999 | Multiplications of Floating Point Expansions. Marc Daumas |
| 1999 | Necessary and Sufficient Conditions for Parallel, Constant Time Conversion and Addition. Peter Kornerup |
| 1999 | New Algorithms for Improved Transcendental Functions on IA-64. Shane Story, Ping Tak Peter Tang |
| 1999 | Number-Theoretic Test Generation for Directed Rounding. Michael Parks |
| 1999 | On Infinitely Precise Rounding for Division, Square Root, Reciprocal and Square Root Reciprocal. Cristina Iordache, David W. Matula |
| 1999 | On the Design of High-Radix On-Line Division for Long Precision. Alexandre F. Tenca, Milos D. Ercegovac |
| 1999 | Reduced Latency IEEE Floating-Point Standard Adder Architectures. Andrew Beaumont-Smith, Neil Burgess, S. Lefrere, Cheng-Chew Lim |
| 1999 | Series Approximation Methods for Divide and Square Root in the Power3(TM) Processor. Martin S. Schmookler, Ramesh C. Agarwal, Fred G. Gustavson |
| 1999 | The S/390 G5 Floating Point Unit Supporting Hex and Binary Architectures. Eric M. Schwarz, Ronald M. Smith, Christopher A. Krygowski |
| 1999 | VLSI Costs of Arithmetic Parallelism: A Residue Reverse Conversion Perspectiv. Manish Bhardwaj, Thambipillai Srikanthan, Christopher T. Clarke |
| 1999 | Very-High Radix CORDIC Vectoring with Scalings and Selection by Rounding. Elisardo Antelo, Tomás Lang, Javier D. Bruguera |