PACT B

35 papers

YearTitle / Authors
2009A Task-Centric Memory Model for Scalable Accelerator Architectures.
John H. Kelm, Daniel R. Johnson, Steven S. Lumetta, Matthew I. Frank, Sanjay J. Patel
2009Adaptive Locks: Combining Transactions and Locks for Efficient Concurrency.
Takayuki Usui, Reimer Behrends, Jacob Evans, Yannis Smaragdakis
2009Algorithmic Skeletons within an Embedded Domain Specific Language for the CELL Processor.
Tarik Saidani, Joel Falcou, Claude Tadonki, Lionel Lacassagne, Daniel Etiemble
2009Analytical Modeling of Pipeline Parallelism.
Angeles G. Navarro, Rafael Asenjo, Siham Tabik, Calin Cascaval
2009Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading.
Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González
2009Architecture Support for Improving Bulk Memory Copying and Initialization Performance.
Xiaowei Jiang, Yan Solihin, Li Zhao, Ravishankar R. Iyer
2009Automatic Tuning of Discrete Fourier Transforms Driven by Analytical Modeling.
Basilio B. Fraguela, Yevgen Voronenko, Markus Püschel
2009CPROB: Checkpoint Processing with Opportunistic Minimal Recovery.
Andrew D. Hilton, Neeraj Eswaran, Amir Roth
2009Cache Sharing Management for Performance Fairness in Chip Multiprocessors.
Xing Zhou, Wenguang Chen, Weimin Zheng
2009Chainsaw: Using Binary Matching for Relative Instruction Mix Comparison.
Tipp Moseley, Dirk Grunwald, Ramesh Peri
2009Characterizing the TLB Behavior of Emerging Parallel Workloads on Chip Multiprocessors.
Abhishek Bhattacharjee, Margaret Martonosi
2009Core-Selectability in Chip Multiprocessors.
Hashem Hashemi Najaf-abadi, Niket Kumar Choudhary, Eric Rotenberg
2009DDCache: Decoupled and Delegable Cache Data and Metadata.
Hemayet Hossain, Sandhya Dwarkadas, Michael C. Huang
2009Data Layout Transformation for Enhancing Data Locality on NUCA Chip Multiprocessors.
Qingda Lu, Christophe Alias, Uday Bondhugula, Thomas Henretty, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan, Yongjian Chen, Haibo Lin, Tin-Fook Ngai
2009Exploiting Parallelism with Dependence-Aware Scheduling.
Xiaotong Zhuang, Alexandre E. Eichenberger, Yangchun Luo, Kevin O'Brien, Kathryn M. O'Brien
2009Exploring Phase Change Memory and 3D Die-Stacking for Power/Thermal Friendly, Fast and Durable Memory Architectures.
Wangyuan Zhang, Tao Li
2009FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery.
Marc Lupon, Grigorios Magklis, Antonio González
2009Flextream: Adaptive Compilation of Streaming Applications for Heterogeneous Architectures.
Amir Hormati, Yoonseo Choi, Manjunath Kudlur, Rodric M. Rabbah, Trevor N. Mudge, Scott A. Mahlke
2009ITCA: Inter-task Conflict-Aware CPU Accounting for CMPs.
Carlos Luque, Miquel Moretó, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Mateo Valero
2009Improving Signatures by Locality Exploitation for Transactional Memory.
Ricardo Quislant, Eladio Gutiérrez, Oscar G. Plata, Emilio L. Zapata
2009Interprocedural Load Elimination for Dynamic Optimization of Parallel Programs.
Rajkishore Barik, Vivek Sarkar
2009Mapping Out a Path from Hardware Transactional Memory to Speculative Multithreading.
Leo Porter, Bumyong Choi, Dean M. Tullsen
2009Memory Performance and Cache Coherency Effects on an Intel Nehalem Multiprocessor System.
Daniel Molka, Daniel Hackenberg, Robert Schöne, Matthias S. Müller
2009Oblivious Routing in On-Chip Bandwidth-Adaptive Networks.
Myong Hyon Cho, Mieszko Lis, Keun Sup Shim, Michel A. Kinsy, Tina Wen, Srinivas Devadas
2009PACT 2009, Proceedings of the 18th International Conference on Parallel Architectures and Compilation Techniques, 12-16 September 2009, Raleigh, North Carolina, USA
2009Polyhedral-Model Guided Loop-Nest Auto-Vectorization.
Konrad Trifunovic, Dorit Nuzman, Albert Cohen, Ayal Zaks, Ira Rosen
2009Quantifying the Potential of Program Analysis Peripherals.
Mohit Tiwari, Shashidhar Mysore, Timothy Sherwood
2009Region Based Structure Layout Optimization by Selective Data Copying.
Sandya S. Mannarswamy, Ramaswamy Govindarajan, Rishi Surendran
2009SHIP: Scalable Hierarchical Power Control for Large-Scale Data Centers.
Xiaorui Wang, Ming Chen, Charles Lefurgy, Tom W. Keller
2009SOS: A Software-Oriented Distributed Shared Cache Management Approach for Chip Multiprocessors.
Lei Jin, Sangyeun Cho
2009Soft-OLP: Improving Hardware Cache Performance through Software-Controlled Object-Level Partitioning.
Qingda Lu, Jiang Lin, Xiaoning Ding, Zhao Zhang, Xiaodong Zhang, P. Sadayappan
2009StealthTest: Low Overhead Online Software Testing Using Transactional Memory.
Jayaram Bobba, Weiwei Xiong, Luke Yen, Mark D. Hill, David A. Wood
2009Using Aggressor Thread Information to Improve Shared Cache Management for CMPs.
Wanli Liu, Donald Yeung
2009Zero-Value Caches: Cancelling Loads that Return Zero.
Md. Mafijul Islam, Per Stenström
2009tm_db: A Generic Debugging Library for Transactional Programs.
Maurice Herlihy, Yossi Lev