Éricles Sousa

14 papers C 2Misc 1Journal 4Unranked 6

Year	Rank	Type	Title / Venue / Authors
2021	J	`jnl`	*-Predictable MPSoC execution of real-time control applications using invasive computing. Concurr. Comput. Pract. Exp. Marcel Brand, Michael Witterauf, Éricles Sousa, Alexandru Tanase, Frank Hannig, Jürgen Teich
2018	—	`conf`	Invasive Computing for Predictability of Multiple Non-functional Properties: A Cyber-Physical System Case Study. ASAP Éricles Sousa, Michael Witterauf, Marcel Brand, Alexandru Tanase, Frank Hannig, Jürgen Teich
2018	—	`—`	Memory and interface architectures for invasive tightly coupled processor arrays = Speicher- und Schnittstellenarchitekturen für invasive eng gekoppelte Prozessorfelder. Éricles Sousa
2017	—	`conf`	A reconfigurable memory architecture for system integration of coarse-grained reconfigurable arrays. ReConFig Éricles Sousa, Alexandru Tanase, Frank Hannig, Jürgen Teich
2017	J	`jnl`	Power Density-Aware Resource Management for Heterogeneous Tiled Multicores. IEEE Trans. Computers Heba Khdr, Santiago Pagani, Éricles Sousa, Vahid Lari, Anuj Pathania, Frank Hannig, Muhammad Shafique, Jürgen Teich, Jörg Henkel
2017	—	`conf`	TCPA editor: A design automation environment for a class of coarse-grained reconfigurable arrays. ReConFig Éricles Sousa, Arindam Chakraborty, Alexandru Tanase, Frank Hannig, Jürgen Teich
2016	J	`jnl`	Dark silicon management: an integrated and coordinated cross-layer approach. it Inf. Technol. Santiago Pagani, Lars Bauer, Qingqing Chen, Elisabeth Glocker, Frank Hannig, Andreas Herkersdorf, Heba Khdr, Anuj Pathania, Ulf Schlichtmann, Doris Schmitt-Landsiedel, Mark Sagi, Éricles Sousa, Philipp Wagner, Volker Wenzel, Thomas Wild, Jörg Henkel
2015	—	`conf`	Reconfigurable Buffer Structures for Coarse-Grained Reconfigurable Arrays. IESS Éricles Sousa, Frank Hannig, Jürgen Teich
2015	J	`jnl`	Resource-awareness on heterogeneous MPSoCs for image processing. J. Syst. Archit. Johny Paul, Walter Stechele, Benjamin Oechslein, Christoph Erhardt, Jens Schedel, Daniel Lohmann, Wolfgang Schröder-Preikschat, Manfred Kröhnert, Tamim Asfour, Éricles Sousa, Vahid Lari, Frank Hannig, Jürgen Teich, Artjom Grudnitsky, Lars Bauer, Jörg Henkel
2015	C	`conf`	Runtime Adaptation of Application Execution under Thermal and Power Constraints in Massively Parallel Processor Arrays. SCOPES Éricles Sousa, Frank Hannig, Jürgen Teich, Qingqing Chen, Ulf Schlichtmann
2014	Misc	`conf`	Application-driven reconfiguration of shared resources for timing predictability of MPSoC platforms. ACSSC Deepak Gangadharan, Éricles Sousa, Vahid Lari, Frank Hannig, Jürgen Teich
2014	—	`conf`	Resource-aware Computer Vision Algorithms on Heterogeneous MPSoC Architectures. Joint Workshop of the German Research Training Groups in Computer Science Éricles Sousa
2014	C	`conf`	Runtime Reconfigurable Bus Arbitration for Concurrent Applications on Heterogeneous MPSoC Architectures. DSD Éricles Sousa, Deepak Gangadharan, Frank Hannig, Jürgen Teich
2014	—	`conf`	Self-adaptive harris corner detector on heterogeneous many-core processor. DASIP Johny Paul, Walter Stechele, Éricles Sousa, Vahid Lari, Frank Hannig, Jürgen Teich, Manfred Kröhnert, Tamim Asfour