Zizheng Guo - RankMe

40 papers A* 9A 14C 1Journal 10Unranked 6

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	HeteroLatch: A CPU-GPU Heterogeneous Latch-Aware Timing Analysis Engine. ASP-DAC Xizhe Shi, Zizheng Guo, Yibo Lin, Zuodong Zhang, Yun Liang, Runsheng Wang
2026	—	`conf`	HeteroSTA: A CPU-GPU Heterogeneous Static Timing Analysis Engine with Holistic Industrial Design Support. ASP-DAC Zizheng Guo, Haichuan Liu, Xizhe Shi, Shenglu Hua, Zuodong Zhang, Chunyuan Zhao, Runsheng Wang, Yibo Lin
2025	A*	`conf`	A Systematic Approach for Multi-objective Double-side Clock Tree Synthesis. DAC Xun Jiang, Haoran Lu, Yuxuan Zhao, Jiarui Wang, Zizheng Guo, Heng Wu, Bei Yu, Sung Kyu Lim, Runsheng Wang, Ru Huang, Yibo Lin
2025	J	`jnl`	A Systematic Approach for Multi-objective Double-side Clock Tree Synthesis. CoRR Xun Jiang, Haoran Lu, Yuxuan Zhao, Jiarui Wang, Zizheng Guo, Heng Wu, Bei Yu, Sung Kyu Lim, Runsheng Wang, Ru Huang, Yibo Lin
2025	A	`conf`	DiffCCD: Differentiable Concurrent Clock and Data Optimization. ICCAD Yuhao Ji, Yuntao Lu, Zuodong Zhang, Zizheng Guo, Yibo Lin, Bei Yu
2025	A	`conf`	Differentiable Physical Optimization. ICCAD Yufan Du, Zizheng Guo, Runsheng Wang, Yibo Lin
2025	J	`jnl`	GAP-LA: GPU-Accelerated Performance-Driven Layer Assignment. CoRR Chunyuan Zhao, Zizheng Guo, Zuodong Zhang, Yibo Lin
2025	A*	`conf`	GEM: GPU-Accelerated Emulator-Inspired RTL Simulation. DAC Zizheng Guo, Yanqing Zhang, Runsheng Wang, Yibo Lin, Haoxing Ren
2025	A	`conf`	GPU Acceleration for Versatile Buffer Insertion. ICCAD Yuan Pu, Yuhao Ji, Siying Yu, Zuodong Zhang, Zizheng Guo, Zhuolun He, Yibo Lin, David Z. Pan, Bei Yu
2025	A	`conf`	Handling Latch Loops in Timing Analysis with Improved Complexity and Divergent Loop Detection. DATE Xizhe Shi, Zizheng Guo, Yibo Lin, Runsheng Wang, Ru Huang
2025	J	`jnl`	HeteroSTA: A CPU-GPU Heterogeneous Static Timing Analysis Engine with Holistic Industrial Design Support. CoRR Zizheng Guo, Haichuan Liu, Xizhe Shi, Shenglu Hua, Zuodong Zhang, Chunyuan Zhao, Runsheng Wang, Yibo Lin
2025	A	`conf`	IncreGPUSTA: GPU-Accelerated Incremental Static Timing Analysis for Iterative Design Flows. ICCAD Haichuan Liu, Zizheng Guo, Runsheng Wang, Yibo Lin
2025	—	`conf`	PathGen: An Efficient Parallel Critical Path Generation Algorithm. ASP-DAC Che Chang, Boyang Zhang, Cheng-Hsiang Chiu, Dian-Lun Lin, Yi-Hua Chung, Wan-Luan Lee, Zizheng Guo, Yibo Lin, Tsung-Wei Huang
2025	—	`conf`	iTAP: An Incremental Task Graph Partitioner for Task-parallel Static Timing Analysis. ASP-DAC Boyang Zhang, Che Chang, Cheng-Hsiang Chiu, Dian-Lun Lin, Yang Sui, Chih-Chun Chang, Yi-Hua Chung, Wan-Luan Lee, Zizheng Guo, Yibo Lin, Tsung-Wei Huang
2024	C	`conf`	An Efficient Task-Parallel Pipeline Programming Framework. HPC Asia Cheng-Hsiang Chiu, Zhicheng Xiong, Zizheng Guo, Tsung-Wei Huang, Yibo Lin
2024	J	`jnl`	Dynamic Supply Noise Aware Timing Analysis With JIT Machine Learning Integration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yufei Chen, Zizheng Guo, Runsheng Wang, Ru Huang, Yibo Lin, Cheng Zhuo
2024	A	`conf`	Fusion of Global Placement and Gate Sizing with Differentiable Optimization. ICCAD Yufan Du, Zizheng Guo, Yibo Lin, Runsheng Wang, Ru Huang
2024	A	`conf`	HeLEM-GR: Heterogeneous Global Routing with Linearized Exponential Multiplier Method. ICCAD Chunyuan Zhao, Zizheng Guo, Rui Wang, Zaiwen Wen, Yun Liang, Yibo Lin
2024	A	`conf`	HeteroExcept: A CPU-GPU Heterogeneous Algorithm to Accelerate Exception-aware Static Timing Analysis. ICCAD Zizheng Guo, Zuodong Zhang, Wuxi Li, Tsung-Wei Huang, Xizhe Shi, Yufan Du, Yibo Lin, Runsheng Wang, Ru Huang
2024	A	`conf`	Heterogeneous Static Timing Analysis with Advanced Delay Calculator. DATE Zizheng Guo, Tsung-Wei Huang, Zhou Jin, Cheng Zhuo, Yibo Lin, Runsheng Wang, Ru Huang
2024	A*	`conf`	PowPrediCT: Cross-Stage Power Prediction with Circuit-Transformation-Aware Learning. DAC Yufan Du, Zizheng Guo, Xun Jiang, Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Runsheng Wang, Ru Huang
2023	J	`jnl`	A GPU-Accelerated Framework for Path-Based Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Guannan Guo, Tsung-Wei Huang, Yibo Lin, Zizheng Guo, Sushma Yellapragada, Martin D. F. Wong
2023	J	`jnl`	AVATAR: An Aging- and Variation-Aware Dynamic Timing Analyzer for Error-Efficient Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zuodong Zhang, Zizheng Guo, Yibo Lin, Meng Li, Runsheng Wang, Ru Huang
2023	J	`jnl`	Accelerating Static Timing Analysis Using CPU-GPU Heterogeneous Parallelism. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zizheng Guo, Tsung-Wei Huang, Yibo Lin
2023	J	`jnl`	DREAMPlace 4.0: Timing-Driven Placement With Momentum-Based Net Weighting and Lagrangian-Based Refinement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Peiyu Liao, Dawei Guo, Zizheng Guo, Siting Liu, Yibo Lin, Bei Yu
2023	A*	`conf`	General-Purpose Gate-Level Simulation with Partition-Agnostic Parallelism. DAC Zizheng Guo, Zuodong Zhang, Xun Jiang, Wuxi Li, Yibo Lin, Runsheng Wang, Ru Huang
2023	A	`conf`	Invited Paper: Accelerating Routability and Timing Optimization with Open-Source AI4EDA Dataset CircuitNet and Heterogeneous Platforms. ICCAD Xun Jiang, Zizheng Guo, Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Runsheng Wang, Ru Huang
2022	J	`jnl`	A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zizheng Guo, Mingwei Yang, Tsung-Wei Huang, Yibo Lin
2022	—	`conf`	A Tale of EDA's Long Tail: Long-Tailed Distribution Learning for Electronic Design Automation. MLCAD Zixuan Jiang, Mingjie Liu, Zizheng Guo, Shuhan Zhang, Yibo Lin, David Z. Pan
2022	A*	`conf`	A timing engine inspired graph neural network model for pre-routing slack prediction. DAC Zizheng Guo, Mingjie Liu, Jiaqi Gu, Shuhan Zhang, David Z. Pan, Yibo Lin
2022	A*	`conf`	AVATAR: an aging- and variation-aware dynamic timing analyzer for application-based DVAFS. DAC Zuodong Zhang, Zizheng Guo, Yibo Lin, Runsheng Wang, Ru Huang
2022	A*	`conf`	Differentiable-timing-driven global placement. DAC Zizheng Guo, Yibo Lin
2022	—	`conf`	Efficient Critical Paths Search Algorithm using Mergeable Heap. ASP-DAC Kexing Zhou, Zizheng Guo, Tsung-Wei Huang, Yibo Lin
2022	A	`conf`	EventTimer: Fast and Accurate Event-Based Dynamic Timing Analysis. DATE Zuodong Zhang, Zizheng Guo, Yibo Lin, Runsheng Wang, Ru Huang
2022	A	`conf`	GPU-Accelerated Rectilinear Steiner Tree Generation. ICCAD Zizheng Guo, Feng Gu, Yibo Lin
2022	J	`jnl`	Pipeflow: An Efficient Task-Parallel Pipeline Programming Framework using Modern C++. CoRR Cheng-Hsiang Chiu, Tsung-Wei Huang, Zizheng Guo, Yibo Lin
2021	A*	`conf`	A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs. DAC Zizheng Guo, Tsung-Wei Huang, Yibo Lin
2021	A	`conf`	HeteroCPPR: Accelerating Common Path Pessimism Removal with Heterogeneous CPU-GPU Parallelism. ICCAD Zizheng Guo, Tsung-Wei Huang, Yibo Lin
2021	A*	`conf`	Ultrafast CPU/GPU Kernels for Density Accumulation in Placement. DAC Zizheng Guo, Jing Mai, Yibo Lin
2020	A	`conf`	GPU-Accelerated Static Timing Analysis. ICCAD Zizheng Guo, Tsung-Wei Huang, Yibo Lin