Zizhen Liu

32 papers A* 4A 5Misc 2Journal 16Unranked 5
YearRankTypeTitle / Venue / Authors
2026 J jnl
Analysis of LLM Vulnerability to GPU Soft Errors: An Instruction-Level Fault Injection Study.
CoRR
Duo Chai, Zizhen Liu, Shuhuai Wang, Songwei Pei, Cheng Liu, Huawei Li, Shangguang Wang
2026 J jnl
Lifecycle Cost-Effectiveness Modeling for Redundancy-Enhanced Multi-Chiplet Architectures.
CoRR
Zizhen Liu, Fangzhiyi Wang, Mengdi Wang, Jing Ye, Hayden Kwok-Hay So, Cheng Liu, Huawei Li
2026 J jnl
On the Vulnerability of FHE Computation to Silent Data Corruption.
CoRR
Jianan Mu, Ge Yu, Zhaoxuan Kan, Song Bian, Liang Kong, Zizhen Liu, Cheng Liu, Jing Ye, Huawei Li
2026 J jnl
SRepair: Symbolic Regression-Based Repair for Hardware Design Code.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zizhen Liu, Deheng Yang, Xiaoguang Mao, Jiayu He, Guangda Zhang, Yan Lei, Jiang Wu
2025 J jnl
A fast test compaction method using dedicated Pure MaxSAT solver embedded in DFT flow.
Integr.
Zhiteng Chao, Xindi Zhang, JunYing Huang, Zizhen Liu, Yixuan Zhao, Jing Ye, Shaowei Cai, Huawei Li, Xiaowei Li
2025 A* conf
EPICS: Efficient Parallel Pattern Fault Simulation for Sequential Circuits via Strongly Connected Components.
DAC
Mingjun Wang, Hui Wang, Jianan Mu, Xinyu Zhang, Bin Sun, Yihan Wen, Zizhen Liu, Feng Gu, Jun Gao, Shengwen Liang, Jing Ye, Xiaowei Li, Huawei Li
2025 A conf
ERASER: Efficient RTL FAult Simulation Framework with Trimmed Execution Redundancy.
DATE
Jiaping Tang, Jianan Mu, Silin Liu, Zizhen Liu, Feng Gu, Xinyu Zhang, Leyan Wang, Shengwen Liang, Jing Ye, Huawei Li, Xiaowei Li
2025 J jnl
ERASER: Efficient RTL FAult Simulation Framework with Trimmed Execution Redundancy.
CoRR
Jiaping Tang, Jianan Mu, Silin Liu, Zizhen Liu, Feng Gu, Xinyu Zhang, Leyan Wang, Shenwen Liang, Jing Ye, Huawei Li, Xiaowei Li
2025 — conf
ETPG: Efficient Transition Fault Simulation via Dual-Strategy Pattern Parallelism and Gate Restructuring.
ASP-DAC
Mingjun Wang, Hui Wang, Zizhen Liu, Feng Gu, Jianan Mu, Jiaping Tang, Jun Gao, Huawei Li, Jing Ye, Xiaowei Li
2025 J jnl
Extend IVerilog to Support Batch RTL Fault Simulation.
CoRR
Jiaping Tang, Jianan Mu, Zizhen Liu, Zhiteng Chao, Jing Ye, Huawei Li
2025 Misc conf
HighTPI: A Hierarchical Graph Based Intelligent Method for Test Point Insertion.
VTS
Zhiteng Chao, Bin Sun, Hongqin Lyu, Ge Yu, Minjun Wang, Wenxing Li, Zizhen Liu, Jianan Mu, Shengwen Liang, Jing Ye, Xiaowei Li, Huawei Li
2025 J jnl
InF-ATPG: Intelligent FFR-Driven ATPG with Advanced Circuit Representation Guided Reinforcement Learning.
CoRR
Bin Sun, Rengang Zhang, Zhiteng Chao, Zizhen Liu, Jianan Mu, Jing Ye, Huawei Li
2025 A* conf
MOSS: Multi-Modal Representation Learning on Sequential Circuits.
DAC
Mingjun Wang, Bin Sun, Jianan Mu, Feng Gu, Boyu Han, Tianmeng Yang, Xinyu Zhang, Silin Liu, Yihan Wen, Hui Wang, Jun Gao, Zhiteng Chao, Husheng Han, Zizhen Liu, Shengwen Liang, Jing Ye, Bei Yu, Xiaowei Li, Huawei Li
2025 A* conf
PastATPG: A Hybrid ATPG Framework for Better Test Compaction with Partial Assignment SAT.
DAC
Zhiteng Chao, Xindi Zhang, Xinyu Zhang, Jianan Mu, Zizhen Liu, Shengwen Liang, Shaowei Cai, Jing Ye, Xiaowei Li, Huawei Li
2025 A conf
RIROS: A Parallel RTL Fault SImulation FRamework with TwO-Dimensional Parallelism and Unified Schedule.
ICCAD
Jiaping Tang, Jianan Mu, Zizhen Liu, Ge Yu, Tenghui Hua, Bin Sun, Silin Liu, Jing Ye, Huawei Li
2025 J jnl
RIROS: A Parallel RTL Fault SImulation FRamework with TwO-Dimensional Parallelism and Unified Schedule.
CoRR
Jiaping Tang, Jianan Mu, Zizhen Liu, Ge Yu, Tenghui Hua, Bin Sun, Silin Liu, Jing Ye, Huawei Li
2025 A conf
TESLA: Testability Enhancement for Shift-Left Automation via Multi-LLM Collaboration.
ITC
Zhiteng Chao, Rengang Zhang, Feng Gu, Hongqin Lyu, Bin Sun, Wenxing Li, Zizhen Liu, Jianan Mu, Jing Ye, Xiaowei Li, Huawei Li
2024 — conf
A Static Test Compaction Method Based on GCN Assisted Fault Gate Classification.
ITC-Asia
Zhiteng Chao, Qinluan Dai, Jiale Li, Zizhen Liu, Wenxing Li, Hongqin Lyu, Jing Ye, Huawei Li, Xiaowei Li
2024 — conf
Accelerating Sequential Circuit Simulation with Spatial Locality Enhancement and Redundant Event Reduction.
ATS
Jiaping Tang, Zizhen Liu, Jianan Mu, Feng Gu, Mingjun Wang, Wenxing Li, Jing Ye, Xiaowei Li, Huawei Li
2024 A* conf
Alchemist: A Unified Accelerator Architecture for Cross-Scheme Fully Homomorphic Encryption.
DAC
Jianan Mu, Husheng Han, Shangyi Shi, Jing Ye, Zizhen Liu, Shengwen Liang, Meng Li, Mingzhe Zhang, Song Bian, Xing Hu, Huawei Li, Xiaowei Li
2024 A conf
DDP-Fsim: Efficient and Scalable Fault Simulation for Deterministic Patterns with Two-Dimensional Parallelism.
ICCAD
Feng Gu, Mingjun Wang, Jianan Mu, Zizhen Liu, Jiaping Tang, Hui Wang, Yonghao Wang, Jing Ye, Huawei Li, Xiaowei Li
2024 — conf
Efficient Functional Safety Method for Gate-Level Fine-Grained Digital Circuits with ISO-26262.
ITC-Asia
Mingjun Wang, Hui Wang, Jianan Mu, Zizhen Liu, Jun Gao, Jing Ye, Huawei Li, Xiaowei Li
2024 J jnl
SPFL: A Self-Purified Federated Learning Method Against Poisoning Attacks.
IEEE Trans. Inf. Forensics Secur.
Zizhen Liu, Weiyang He, Chip-Hong Chang, Jing Ye, Huawei Li, Xiaowei Li
2024 J jnl
UAFer: A Unified Model for Class-Agnostic Binary Segmentation With Uncertainty-Aware Feature Reassembly.
IEEE Trans. Circuits Syst. Video Technol.
Zihao Dong, Zizhen Liu, Runmin Cong, Tiyu Fang, Xiuli Shao, Sam Kwong
2023 J jnl
A Cooperative Deception Strategy for Covert Communication in Presence of a Multi-Antenna Adversary.
IEEE Trans. Commun.
Jiangbo Si, Zizhen Liu, Zan Li, Hang Hu, Lei Guan, Chao Wang, Naofal Al-Dhahir
2023 — conf
An Empirical Study of the Inherent Resistance of Knowledge Distillation Based Federated Learning to Targeted Poisoning Attacks.
ATS
Weiyang He, Zizhen Liu, Chip-Hong Chang
2023 J jnl
DHSA: efficient doubly homomorphic secure aggregation for cross-silo federated learning.
J. Supercomput.
Zizhen Liu, Si Chen, Jing Ye, Junfeng Fan, Huawei Li, Xiaowei Li
2023 J jnl
SPFL: A Self-purified Federated Learning Method Against Poisoning Attacks.
CoRR
Zizhen Liu, Weiyang He, Chip-Hong Chang, Jing Ye, Huawei Li, Xiaowei Li
2022 J jnl
DHSA: Efficient Doubly Homomorphic Secure Aggregation for Cross-silo Federated Learning.
CoRR
Zizhen Liu, Si Chen, Jing Ye, Junfeng Fan, Huawei Li, Xiaowei Li
2022 A conf
SASH: Efficient secure aggregation based on SHPRG for federated learning.
UAI
Zizhen Liu, Si Chen, Jing Ye, Junfeng Fan, Huawei Li, Xiaowei Li
2021 J jnl
Efficient Secure Aggregation Based on SHPRG For Federated Learning.
CoRR
Zizhen Liu, Si Chen, Jing Ye, Junfeng Fan, Huawei Li, Xiaowei Li
2020 Misc conf
Sequence Triggered Hardware Trojan in Neural Network Accelerator.
VTS
Zizhen Liu, Jing Ye, Xing Hu, Huawei Li, Xiaowei Li, Yu Hu