Zibin Dai

28 papers C 1Journal 15Unranked 12
YearRankTypeTitle / Venue / Authors
2026 J jnl
DPTM: An Adaptive Scheduler Design Utilizing Timeslot Matching and Release Methods for Concurrent and Multi-task Interleaved Pipelining-oriented CGRA.
ACM Trans. Design Autom. Electr. Syst.
Danping Jiang, Zibin Dai, Yanjiang Liu, Xiaoyu Song, Zhaoxu Zhou
2025 J jnl
CRM_BF: A Low-Overhead, High-Efficient and Reconfigurable Operation Unit Design Approach Using the Customized Reed-Muller Unit For Boolean Functions of Sequence Cipher Algorithms.
ACM Trans. Design Autom. Electr. Syst.
Zhaoxu Zhou, Zihang Huang, Junwei Li, Yanjiang Liu, Zibin Dai
2024 J jnl
RGMU: A High-flexibility and Low-cost Reconfigurable Galois Field Multiplication Unit Design Approach for CGRCA.
ACM Trans. Design Autom. Electr. Syst.
Danping Jiang, Zibin Dai, Yanjiang Liu, Zongren Zhang
2023 J jnl
CBDC-PUF: A Novel Physical Unclonable Function Design Framework Utilizing Configurable Butterfly Delay Chain Against Modeling Attack.
ACM Trans. Design Autom. Electr. Syst.
Yanjiang Liu, Junwei Li, Tongzhou Qu, Zibin Dai
2023 J jnl
Extending the classical side-channel analysis framework to access-driven cache attacks.
Comput. Secur.
Pengfei Guo, Yingjian Yan, Fan Zhang, Chunsheng Zhu, Lichao Zhang, Zibin Dai
2023 J jnl
MA-GRNN:a high-efficient modeling attack approach utilizing generalized regression neural network for XOR arbiter physical unclonable functions.
IEICE Electron. Express
Yanjiang Liu, Gaofeng Huang, Junwei Li, Pengfei Guo, Chunsheng Zhu, Zibin Dai
2023 J jnl
R/B-SecArch: A strong isolated SoC architecture based on red/black concept for secure and efficient cryptographic services.
Microelectron. J.
Pengfei Guo, Yingjian Yan, Zhongyi Zhao, Lichao Zhang, Chunsheng Zhu, Zibin Dai
2022 J jnl
A Comprehensive Evaluation of Integrated Circuits Side-Channel Resilience Utilizing Three-Independent-Gate Silicon Nanowire Field Effect Transistors-Based Current Mode Logic.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yanjiang Liu, Jiaji He, Haocheng Ma, Tongzhou Qu, Zibin Dai
2022 J jnl
A Cost-Sensitive Golden Chip-Free Hardware Trojan Detection Using Principal Component Analysis and Naïve Bayes Classification Algorithm.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yanjiang Liu, Xianzhao Xia, Jingxin Zhong, Pengfei Guo, Chunsheng Zhu, Zibin Dai
2022 J jnl
A Low-Overhead and High-Security Cryptographic Circuit Design Utilizing the TIGFET-Based Three-Phase Single-Rail Pulse Register against Side-Channel Attacks.
ACM Trans. Design Autom. Electr. Syst.
Yanjiang Liu, Tongzhou Qu, Zibin Dai
2022 J jnl
A Performance Model for Reconfigurable Block Cipher Array Utilizing Amdahl's Law.
IEICE Trans. Inf. Syst.
Tongzhou Qu, Zibin Dai, Yanjiang Liu, Lin Chen, Xianzhao Xia
2020 J jnl
PVHArray: An Energy-Efficient Reconfigurable Cryptographic Logic Array With Intelligent Mapping.
IEEE Trans. Very Large Scale Integr. Syst.
Yiran Du, Wei Li, Zibin Dai, Longmei Nan
2019 — conf
An Efficient ASIC Implementation of Public Key Cryptography Algorithm SM2 Based on Module Arithmetic Logic Unit.
ASICON
Danyang Yang, Zibin Dai, Wei Li, Tao Chen
2018 J jnl
A single-supply sub-threshold level shifter with an internal supply feedback loop for multi-voltage applications.
IEICE Electron. Express
Longmei Nan, Xiaoyang Zeng, Wei Li, Zhouchuang Wang, Zibin Dai
2017 J jnl
A highly efficient reconfigurable rotation unit based on an inverse butterfly network.
Frontiers Inf. Technol. Electron. Eng.
Chao Ma, Zibin Dai, Wei Li, Hai-juan Zang
2017 — conf
An area-efficient interconnection network for coarse-grain reconfigurable cryptographic array.
ASICON
Tongzhou Qu, Zibin Dai, Longmei Nan, Wei Li, Anqi Yin
2017 — conf
RC6 architecture-adaptive implementation for coarse-grained reconfiguration array.
ASICON
Anqi Yin, Zibin Dai, Longmei Nan, Wei Li
2015 — conf
A High-Throughput Processor for Dual-Field Elliptic Curve Cryptography with Power Analysis Resistance.
UIC/ATC/ScalCom
Wei Li, Xiaoyang Zeng, Xiao Feng, Zibin Dai
2015 — conf
Fast Parallel Extract-Shift and Parallel Deposit-Shift in General-Purpose Processors.
UIC/ATC/ScalCom
Wei Li, Zhongxiang Chang, Xiao Feng, Zibin Dai
2015 — conf
Study and implementation of cluster hierarchical memory system of multicore cryptographic processor.
ASICON
Junwei Li, Zibin Dai, Wei Li, Tao Chen, Yufei Zhu
2013 J jnl
Design and Implementation of Configurable LFSR Instructions Targeted at Stream Cipher Processing.
J. Circuits Syst. Comput.
Zibin Dai, Longmei Nan, Xuan S. Yang, Xiaonan Li
2011 — conf
Design and application of reusable SoC verification platform.
ASICON
Lulu Feng, Zibin Dai, Wei Li, Jianlei Cheng
2011 — conf
Research on design of a reconfigurable parallel structure targeted at LFSR.
ASICON
Wei Li, Xuan Yang, Zibin Dai
2011 — conf
Research on reconfigurable multiplier unit based on GF[(2
ASICON
Jianbo Xu, Zibin Dai, Yang Xuan, Yang Su
2009 C conf
The Research of NULL Convention Logic Circuit Computing Model Targeted at Block Cipher Processing.
IAS
Yalei Cui, Zibin Dai
2008 — conf
Research and Implementation of a High-Speed Reconfigurable A5 Algorithm.
PACIIA (2)
Wei Li, Zibin Dai, Longmei Nan
2008 — conf
The Research and Implementation of Reconfigurable Processor Architecture for Block Cipher Processing.
ICESS
Zibin Dai, Wei Li, Xiaohui Yang, Tao Chen, Qiao Ren
2007 — conf
Design and Implementation of a High-Speed Reconfigurable Modular Arithmetic Unit.
APPT
Wei Li, Zibin Dai, Tao Chen, Tao Meng, Xuan S. Yang