Zhufei Chu

62 papers A* 2A 7C 2Journal 40Unranked 10
YearRankTypeTitle / Venue / Authors
2026 — conf
DeepCut: Structure-Aware GNN Framework for Efficient Cut Timing Prediction in Logic Synthesis.
ASP-DAC
Lingfeng Zhou, Yilong Zhou, Hao Gong, Zhengyuan Shi, Qiang Xu, Zhufei Chu, Yue Wu, Xiaoyan Yang
2026 J jnl
Enhancing logic optimization of Alliance tool based on directed acyclic graphs.
Integr.
Qiyao He, Zhang Hu, Yinshui Xia, Lunyao Wang, Zhufei Chu
2026 J jnl
GNN-based Path-aware multi-view Circuit Learning for Technology Mapping.
CoRR
Wentao Jiang, Jingxin Wang, Zhang Hu, Zhengyuan Shi, Chengyu Ma, Qiang Xu, Weikang Qian, Zhufei Chu
2025 J jnl
Alignment Unlocks Complementarity: A Framework for Multiview Circuit Representation Learning.
CoRR
Zhengyuan Shi, Jingxin Wang, Wentao Jiang, Chengyu Ma, Ziyang Zheng, Zhufei Chu, Weikang Qian, Qiang Xu
2025 J jnl
DeepCell: Multiview Representation Learning for Post-Mapping Netlists.
CoRR
Zhengyuan Shi, Chengyu Ma, Ziyang Zheng, Lingfeng Zhou, Hongyang Pan, Wentao Jiang, Fan Yang, Xiaoyan Yang, Zhufei Chu, Qiang Xu
2025 A conf
DeepCell: Self-Supervised Multiview Fusion for Circuit Representation Learning.
ICCAD
Zhengyuan Shi, Chengyu Ma, Ziyang Zheng, Lingfeng Zhou, Hongyang Pan, Wentao Jiang, Fan Yang, Xiaoyan Yang, Zhufei Chu, Qiang Xu
2025 J jnl
DeepCircuitX: A Comprehensive Repository-Level Dataset for RTL Code Understanding, Generation, and PPA Analysis.
CoRR
Zeju Li, Changran Xu, Zhengyuan Shi, Zedong Peng, Yi Liu, Yunhao Zhou, Lingfeng Zhou, Chengyu Ma, Jianyuan Zhong, Xi Wang, Jieru Zhao, Zhufei Chu, Xiaoyan Yang, Qiang Xu
2025 A conf
DynamicSAT: Dynamic Configuration Tuning for SAT Solving.
CP
Zhengyuan Shi, Wentao Jiang, Xindi Zhang, Jin Luo, Yun Liang, Zhufei Chu, Qiang Xu
2025 A conf
ELMap: Area-Driven LUT Mapping with $k$-LUT Network Exact Synthesis.
DATE
Hongyang Pan, Keren Zhu, Fan Yang, Zhufei Chu, Xuan Zeng
2025 J jnl
Ferroelectrically gated two-dimensional bismuth oxyselenides for strain-invariant flexible synaptic thin-film transistors.
Sci. China Inf. Sci.
Jie Wen, Fei Xiao, Zheng-Dong Luo, Dongxin Tan, Xuetao Gan, Dawei Zhang, Zhufei Chu, Yinshui Xia, Yan Liu, Genquan Han
2025 J jnl
ForgeEDA: A Comprehensive Multimodal Dataset for Advancing EDA.
CoRR
Zhengyuan Shi, Zeju Li, Chengyu Ma, Yunhao Zhou, Ziyang Zheng, Jiawei Liu, Hongyang Pan, Lingfeng Zhou, Kezhi Li, Jiaying Zhu, Lingwei Yan, Zhiqiang He, Chenhao Xue, Wentao Jiang, Fan Yang, Guangyu Sun, Xiaoyan Yang, Gang Chen, Chuan Shi, Zhufei Chu, Jun Yang, Qiang Xu
2025 J jnl
Implication logic synthesis and optimization methods for memristor-based logic circuits.
Microelectron. J.
Tingting Liu, Zhufei Chu
2025 A* conf
Logic Optimization Meets SAT: A Novel Framework for Circuit-SAT Solving.
DAC
Zhengyuan Shi, Tiebing Tang, Jiaying Zhu, Sadaf Khan, Hui-Ling Zhen, Mingxuan Yuan, Zhufei Chu, Qiang Xu
2025 A* conf
Mixed Structural Choice Operator: Enhancing Technology Mapping with Heterogeneous Representations.
DAC
Zhang Hu, Hongyang Pan, Yinshui Xia, Lunyao Wang, Zhufei Chu
2025 J jnl
Mixed Structural Choice Operator: Enhancing Technology Mapping with Heterogeneous Representations.
CoRR
Zhang Hu, Hongyang Pan, Yinshui Xia, Lunyao Wang, Zhufei Chu
2025 J jnl
OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine-Learning Tasks in Logic Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Liwei Ni, Rui Wang, Miao Liu, Xingyu Meng, Xiaoze Lin, Junfeng Liu, Guojie Luo, Zhufei Chu, Weikang Qian, Xiaoyan Yang, Biwei Xie, Xingquan Li, Huawei Li
2025 J jnl
Rethinking Logic Rewriting: Technology-Aware Subgraph Matching with Exact Synthesis.
ACM Trans. Design Autom. Electr. Syst.
Hongyang Pan, Keren Zhu, Fan Yang, Xuan Zeng, Sen Liu, Yong Xiao, Yun Shao, Zhufei Chu
2024 A conf
A Semi-Tensor Product based Circuit Simulation for SAT-sweeping.
DATE
Hongyang Pan, Ruibing Zhang, Yinshui Xia, Lunyao Wang, Fan Yang, Xuan Zeng, Zhufei Chu
2024 — conf
Area-Aware Logic Mapping for MAGIC based In-Memory Computing.
SMACD
Jiaxiang Pan, Zhufei Chu
2024 J jnl
Artificial neural network models for metal-ferroelectric-insulator-semiconductor ferroelectric tunnel junction memristor.
Microelectron. J.
Tiancheng Li, Erping Li, Huali Duan, Zhufei Chu, Jian Wang, Wenchao Chen
2024 J jnl
EDA-Driven Preprocessing for SAT Solving.
CoRR
Zhengyuan Shi, Tiebing Tang, Sadaf Khan, Hui-Ling Zhen, Mingxuan Yuan, Zhufei Chu, Qiang Xu
2024 J jnl
Erratum to: Large circuit models: opportunities and challenges.
Sci. China Inf. Sci.
Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Ru Huang, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yu Li, Yun Liang, Jinwei Liu, Yi Liu, Yibo Lin, Guojie Luo, Hongyang Pan, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Junchi Yan, Jun Yang, Bei Yu, Mingxuan Yuan, Evangeline F. Y. Young, Xuan Zeng, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, Sunan Zou
2024 — book
FPGA EDA - Design Principles and Implementation
Kaihui Tu, Xifan Tang, Cunxi Yu, Lana Josipovic, Zhufei Chu
2024 J jnl
Large circuit models: opportunities and challenges.
Sci. China Inf. Sci.
Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Ru Huang, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yu Li, Yun Liang, Jinwei Liu, Yi Liu, Yibo Lin, Guojie Luo, Hongyang Pan, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Junchi Yan, Jun Yang, Bei Yu, Mingxuan Yuan, Evangeline F. Y. Young, Xuan Zeng, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, Sunan Zou
2024 J jnl
OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine Learning Tasks in Logic Synthesis.
CoRR
Liwei Ni, Rui Wang, Miao Liu, Xingyu Meng, Xiaoze Lin, Junfeng Liu, Guojie Luo, Zhufei Chu, Weikang Qian, Xiaoyan Yang, Biwei Xie, Xingquan Li, Huawei Li
2024 J jnl
Semi-Tensor Product-Based Exact Synthesis for Logic Rewriting.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hongyang Pan, Yinshui Xia, Lunyao Wang, Zhufei Chu
2024 J jnl
Solid-state non-volatile memories based on vdW heterostructure-based vertical-transport ferroelectric field-effect transistors.
Sci. China Inf. Sci.
Qiyu Yang, Zheng-Dong Luo, Fei Xiao, Junpeng Zhang, Dawei Zhang, Dongxin Tan, Xuetao Gan, Yan Liu, Zhufei Chu, Yinshui Xia, Genquan Han
2024 J jnl
The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.
CoRR
Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yun Liang, Yibo Lin, Jinwei Liu, Yi Liu, Guojie Luo, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Evangeline F. Y. Young, Bei Yu, Mingxuan Yuan, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, Sunan Zou
2023 J jnl
A Semi-Tensor Product Based All Solutions Boolean Satisfiability Solver.
J. Comput. Sci. Technol.
Hongyang Pan, Zhufei Chu
2023 J jnl
A Semi-Tensor Product based Circuit Simulation for SAT-sweeping.
CoRR
Hongyang Pan, Ruibing Zhang, Yinshui Xia, Lunyao Wang, Fan Yang, Xuan Zeng, Zhufei Chu
2023 J jnl
An efficient circuit-based SAT solver and its application in logic equivalence checking.
Microelectron. J.
Kunmei Hu, Zhufei Chu
2023 A conf
DeepGate2: Functionality-Aware Circuit Representation Learning.
ICCAD
Zhengyuan Shi, Hongyang Pan, Sadaf Khan, Min Li, Yi Liu, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Zhufei Chu, Qiang Xu
2023 J jnl
DeepGate2: Functionality-Aware Circuit Representation Learning.
CoRR
Zhengyuan Shi, Hongyang Pan, Sadaf Khan, Min Li, Yi Liu, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Zhufei Chu, Qiang Xu
2023 A conf
Exact Synthesis Based on Semi-Tensor Product Circuit Solver.
DATE
Hongyang Pan, Zhufei Chu
2022 J jnl
2022 roadmap on neuromorphic devices and applications research in China.
Neuromorph. Comput. Eng.
Qing Wan, Changjin Wan, Huaqiang Wu, Yuchao Yang, Xiaohe Huang, Peng Zhou, Lin Chen, Tian-Yu Wang, Yi Li, Kanhao Xue, Yu-Hui He, Xiangshui Miao, Xi Li, Chenchen Xie, Houpeng Chen, Zhitang Song, Hong Wang, Yue Hao, Junyao Zhang, Jia Huang, Zheng Yu Ren, Li Qiang Zhu, Jianyu Du, Chen Ge, Yang Liu, Guanglong Ding, Ye Zhou, Su-Ting Han, Guosheng Wang, Xiao Yu, Bing Chen, Zhufei Chu, Lunyao Wang, Yinshui Xia, Chen Mu, Feng Lin, Chixiao Chen, Bojun Cheng, Yannan Xing, Weitao Zeng, Hong Chen, Lei Yu, Giacomo Indiveri, Ning Qiao
2022 J jnl
Efficient Design of Majority-Logic-Based Approximate Arithmetic Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Zhufei Chu, Chuanhe Shang, Tingting Zhang, Yinshui Xia, Lunyao Wang, Weiqiang Liu
2022 J jnl
Logic Synthesis Optimization Sequence Tuning Using RL-Based LSTM and Graph Isomorphism Network.
IEEE Trans. Circuits Syst. II Express Briefs
Chenghao Yang, Yinshui Xia, Zhufei Chu, Xiaojing Zha
2022 J jnl
Stochastic circuit synthesis via satisfiability.
Integr.
Xiang He, Zhufei Chu
2022 J jnl
The prediction of the quality of results in Logic Synthesis using Transformer and Graph Neural Networks.
CoRR
Chenghao Yang, Yinshui Xia, Zhufei Chu
2021 — conf
An Efficient Demultiplexer Design in Quantum-dot Cellular Automata.
ASICON
Jianguo Ni, Zhufei Chu
2021 J jnl
BCD Adder Designs Based on Three-Input XOR and Majority Gates.
IEEE Trans. Circuits Syst. II Express Briefs
Zhufei Chu, Zeqiang Li, Yinshui Xia, Lunyao Wang, Weiqiang Liu
2021 J jnl
Defect-Tolerant Mapping of CMOL Circuit Targeting Delay Optimization.
J. Comput. Sci. Technol.
Xiaojing Zha, Yinshui Xia, Shang-Luan Xie, Zhufei Chu
2021 — conf
Design of Majority Logic Based 4-bit Approximate Subtractors and its Application in Divider.
ASICON
Chuanhe Shang, Zhufei Chu
2021 J jnl
Inversion Optimization Strategy Based on Primitives with Complement Attributes.
J. Comput. Sci. Technol.
Huiming Tian, Zhufei Chu
2021 A conf
MinSC: An Exact Synthesis-Based Method for Minimal-Area Stochastic Circuits under Relaxed Error Bound.
ICCAD
Xuan Wang, Zhufei Chu, Weikang Qian
2020 J jnl
A High-Performance Design of Generalized Pipeline Cellular Array.
IEEE Comput. Archit. Lett.
Zhufei Chu, Huiming Tian, Zeqiang Li, Yinshui Xia, Lun-Yao Wang
2020 J jnl
Advanced Functional Decomposition Using Majority and Its Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zhufei Chu, Mathias Soeken, Yinshui Xia, Lun-Yao Wang, Giovanni De Micheli
2019 — conf
Area Optimization of MPRM Circuits Using Approximate Computing.
ASICON
Qiuhong Ying, Lun-Yao Wang, Zhufei Chu, Yinshui Xia
2019 C conf
Exact Synthesis of Boolean Functions in Majority-of-Five Forms.
ISCAS
Zhufei Chu, Winston Haaswijk, Mathias Soeken, Yinshui Xia, Lun-Yao Wang, Giovanni De Micheli
2019 J jnl
Multi-objective algebraic rewriting in XOR-majority graphs.
Integr.
Zhufei Chu, Lei Shi, Lun-Yao Wang, Yinshui Xia
2019 — conf
Structural rewriting in XOR-majority graphs.
ASP-DAC
Zhufei Chu, Mathias Soeken, Yinshui Xia, Lun-Yao Wang, Giovanni De Micheli
2019 J jnl
Through-Silicon Via-Based Capacitor and Its Application in LDO Regulator Design.
IEEE Trans. Very Large Scale Integr. Syst.
Libo Qian, Kefang Qian, Xitao He, Zhufei Chu, Yidie Ye, Shi Ge, Yinshui Xia
2018 — conf
Functional decomposition using majority.
ASP-DAC
Zhufei Chu, Mathias Soeken, Yinshui Xia, Giovanni De Micheli
2017 — conf
Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains.
ACM Great Lakes Symposium on VLSI
Zhufei Chu, Xifan Tang, Mathias Soeken, Ana Petkovska, Grace Zgheib, Luca Gaetano Amarù, Yinshui Xia, Paolo Ienne, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2016 J jnl
Efficient power pad assignment for multi-voltage SoC and its application in floorplanning.
Int. J. Circuit Theory Appl.
Zhufei Chu, Yinshui Xia, Lun-Yao Wang, Jian Wang
2016 J jnl
Multi-supply voltage (MSV) driven SoC floorplanning for fast design convergence.
Integr.
Zhufei Chu, Yinshui Xia, Lun-Yao Wang
2014 J jnl
Efficient nonrectangular shaped voltage island aware floorplanning with nonrandomized searching engine.
Microelectron. J.
Zhufei Chu, Yinshui Xia, Lun-Yao Wang, Jian Wang
2014 — conf
Level shifter planning for timing constrained multi-voltage SoC floorplanning.
ACM Great Lakes Symposium on VLSI
Zhufei Chu, Yinshui Xia, Lun-Yao Wang
2013 J jnl
Low Power State Assignment Algorithm for FSMs Considering Peak Current Optimization.
J. Comput. Sci. Technol.
Lun-Yao Wang, Zhufei Chu, Yinshui Xia
2013 — conf
Voltage Drop Aware Power Pad Assignment and Floorplanning for Multi-voltage SoC Designs.
CAD/Graphics
Zhufei Chu, Yinshui Xia, Lun-Yao Wang, Jian Wang
2012 J jnl
Cell Mapping for Nanohybrid Circuit Architecture Using Genetic Algorithm.
J. Comput. Sci. Technol.
Zhufei Chu, Yinshui Xia, Lun-Yao Wang
2010 C conf
A Memetic Approach for Nanoscale Hybrid Circuit Cell Mapping.
DSD
Zhufei Chu, Yinshui Xia, William N. N. Hung, Lun-Yao Wang, Xiaoyu Song