Zhongzhen Tong

17 papers C 1Journal 16
YearRankTypeTitle / Venue / Authors
2026 J jnl
A CIM Macro Embedded With Sign Operations for Parallel Signed Multibit Multiplication-and-Accumulation Using Hybrid Cell Array.
IEEE Trans. Very Large Scale Integr. Syst.
Jin Zhang, Zhongzhen Tong, Qiang Zhao, Chunyu Peng, Wenjuan Lu, Jian Zhou, Xiaoxiao Chen, Zhiting Lin, Xiulong Wu
2026 J jnl
An FD-SOI-Based Compact In-Pixel Computing Architecture Enabling Real-Time Feature Extraction.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yijiao Wang, Jiayao Wu, Yaqi Wang, Zhongzhen Tong, Xinrui Duan, Yiming Shi, Wen Shi, Weisheng Zhao
2025 J jnl
A Novel Radiation-Hardened, Speed and Power Optimized Nonvolatile Latch for Aerospace Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Shixing Li, Chenyi Wang, Zhongzhen Tong, Chao Wang, Bi Wang, Zhaohao Wang
2025 J jnl
A Self-Decryption Pass Transistor Logic-Based In-MRAM Computing Macro Using Hybrid VGSOT-MTJ/GAA-CNTFET.
IEEE Trans. Circuits Syst. I Regul. Pap.
Zhongzhen Tong, Sifan Sun, Kaili Zhang, Chenghang Li, Jiye Yao, Yulong Qiu, Chao Wang, Zhaohao Wang, Ke Zhang, Amara Amara, Xiaoyang Lin, Weisheng Zhao
2025 C conf
Approximate SOT-MRAM for Neural Network Acceleration with Superior Read Performance.
ISCAS
Yulong Qiu, Chao Wang, Zhongzhen Tong, Siyuan Cheng, Yueting Li, Zhaohao Wang
2025 J jnl
In-MRAM Computing Based on Complementary-Sensing Time-Based Readout Circuit Using Hybrid VGSOT-MTJ/GAA-CNTFET.
IEEE Trans. Circuits Syst. II Express Briefs
Zhongzhen Tong, Sifan Sun, Kaili Zhang, Chenghang Li, Daming Zhou, Zhaohao Wang, Xiaoyang Lin, Weisheng Zhao
2024 J jnl
A Charge-Domain Compute-In-Memory Macro With Cell-Embedded DA Conversion and Two-Stage AD Conversion for Bit-Scalable MAC Operation.
IEEE Trans. Circuits Syst. II Express Briefs
Kaili Zhang, Zhongzhen Tong, XinXin Liang, Chengzhi Wang, You Wang, Yue Zhang, Weisheng Zhao, Lang Zeng, Deming Zhang
2024 J jnl
A Computing In-Memory Multibit Multiplication Based on Decoupling and In-Array Storing.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jin Zhang, Zhongzhen Tong, Hao Wang, Xin Wang, Qiang Zhao, Jian Zhou, Jiaqun Wang, Zhiting Lin, Xiulong Wu
2024 J jnl
A High Throughput In-MRAM-Computing Scheme Using Hybrid p-SOT-MTJ/GAA-CNTFET.
IEEE Trans. Circuits Syst. I Regul. Pap.
Zhongzhen Tong, Yilin Xu, Yunlong Liu, Xinrui Duan, Hao Tang, Suteng Zhao, Chenghang Li, Zhiting Lin, Xiulong Wu, Zhaohao Wang, Xiaoyang Lin
2024 J jnl
BSTCIM: A Balanced Symmetry Ternary Fully Digital In-MRAM Computing Macro for Energy Efficiency Neural Network.
IEEE Trans. Circuits Syst. I Regul. Pap.
Zhongzhen Tong, Chenghang Li, Chao Wang, Suteng Zhao, Qianyong Peng, Zhenyu Yan, Siqi Zhang, Daming Zhou, Zhaohao Wang, Xiaoyang Lin, Weisheng Zhao
2024 J jnl
Configurable in-memory computing architecture based on dual-port SRAM.
Microelectron. J.
Yue Zhao, Yunlong Liu, Jian Zheng, Zhongzhen Tong, Xin Wang, Runru Yu, Xiulong Wu, Yongliang Zhou, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Zhiting Lin
2023 J jnl
A Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations and Results Store.
IEEE Trans. Very Large Scale Integr. Syst.
Zhiting Lin, Shaoying Zhang, Qian Jin, Jianping Xia, Yunwei Liu, Kefeng Yu, Jian Zheng, Xiaoming Xu, Xing Fan, Ke Li, Zhongzhen Tong, Xiulong Wu, Wenjuan Lu, Chunyu Peng, Qiang Zhao
2023 J jnl
In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations.
IEEE J. Solid State Circuits
Zhiting Lin, Zhongzhen Tong, Fangming Wang, Jin Zhang, Yue Zhao, Peng Sun, Tian Xu, Cheng Zhang, Xingwei Li, Xiulong Wu, Wenjuan Lu, Chunyu Peng, Qiang Zhao, Junning Chen
2023 J jnl
In-Memory Transposable Multibit Multiplication Based on Diagonal Symmetry Weight Block.
IEEE Trans. Very Large Scale Integr. Syst.
Zhongzhen Tong, Yue Zhao, Jin Zhang, Zhiting Lin, Xiaoyang Lin, Xiulong Wu
2022 J jnl
An offset cancellation technique for SRAM sense amplifier based on relation of the delay and offset.
Microelectron. J.
Yue Zhao, Jinkai Wang, Zhongzhen Tong, Xiulong Wu, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Zhiting Lin
2022 J jnl
Configurable Memory With a Multilevel Shared Structure Enabling In-Memory Computing.
IEEE Trans. Very Large Scale Integr. Syst.
Yue Zhao, Zhiting Lin, Xiulong Wu, Qiang Zhao, Wenjuan Lu, Chunyu Peng, Zhongzhen Tong, Junning Chen
2022 J jnl
In-Memory Multibit Multiplication Based on Bitline Shifting.
IEEE Trans. Circuits Syst. II Express Briefs
Jin Zhang, Zhiting Lin, Xiulong Wu, Zhongzhen Tong, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Hongbiao Wu, Junning Chen