Zhiyuan Yang

15 papers A* 1A 3Misc 1Journal 6Unranked 4
YearRankTypeTitle / Venue / Authors
2024 J jnl
Exploring the Adversarial Frontier: Quantifying Robustness via Adversarial Hypervolume.
CoRR
Ping Guo, Cheng Gong, Xi Lin, Zhiyuan Yang, Qingfu Zhang
2024 J jnl
PuriDefense: Randomized Local Implicit Adversarial Purification for Defending Black-box Query-based Attacks.
CoRR
Ping Guo, Zhiyuan Yang, Xi Lin, Qingchuan Zhao, Qingfu Zhang
2020 J jnl
DRAMsim3: A Cycle-Accurate, Thermal-Capable DRAM Simulator.
IEEE Comput. Archit. Lett.
Shang Li, Zhiyuan Yang, Dhiraj Reddy, Ankur Srivastava, Bruce L. Jacob
2019 J jnl
Enhanced Phase-Driven Q-Learning-Based DRM for Multicore Processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zhiyuan Yang, Caleb Serafy, Tiantao Lu, Ankur Srivastava
2018 — conf
HMCTherm: a cycle-accurate HMC simulator integrated with detailed power and thermal simulation.
MEMSYS
Zhiyuan Yang, Michael Zuzak, Ankur Srivastava
2018 A conf
Value-driven Synthesis for Neural Network ASICs.
ISLPED
Zhiyuan Yang, Ankur Srivastava
2017 — conf
Design Space Modeling and Simulation for Physically Constrained 3D CPUs.
ACM Great Lakes Symposium on VLSI
Caleb Serafy, Zhiyuan Yang, Ankur Srivastava
2017 A* conf
Phase-driven Learning-based Dynamic Reliability Management For Multi-core Processors.
DAC
Zhiyuan Yang, Caleb Serafy, Tiantao Lu, Ankur Srivastava
2017 J jnl
TSV-Based 3-D ICs: Design Methods and Tools.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tiantao Lu, Caleb Serafy, Zhiyuan Yang, Sandeep Kumar Samal, Sung Kyu Lim, Ankur Srivastava
2016 Misc conf
ECO Based Placement and Routing Framework for 3D FPGAs with Micro-fluidic Cooling.
FCCM
Zhiyuan Yang, Caleb Serafy, Ankur Srivastava
2016 — conf
Electromigration-aware placement for 3D-ICs.
ISQED
Tiantao Lu, Zhiyuan Yang, Ankur Srivastava
2016 A conf
Physical Design of 3D FPGAs Embedded with Micro-channel-based Fluidic Cooling.
FPGA
Zhiyuan Yang, Ankur Srivastava
2016 — conf
Post-Placement Optimization for Thermal-Induced Mechanical Stress Reduction.
ISVLSI
Tiantao Lu, Zhiyuan Yang, Ankur Srivastava
2016 J jnl
Thermoelectric Codesign of 3-D CPUs and Embedded Microfluidic Pin-Fin Heatsinks.
IEEE Des. Test
Caleb Serafy, Zhiyuan Yang, Ankur Srivastava, Yuanchen Hu, Yogendra Joshi
2016 A conf
Voltage Noise Induced DRAM Soft Error Reduction Technique for 3D-CPUs.
ISLPED
Tiantao Lu, Caleb Serafy, Zhiyuan Yang, Ankur Srivastava