Zhirui Zong

12 papers C 1Journal 8Unranked 3
YearRankTypeTitle / Venue / Authors
2025 C conf
A PVT-Insensitive 7-Bit Coarse-Fine Ratio-Metric Digital-to-Time Converter for Fractional-N Phase-Locked Loops in 65-nm CMOS.
ISCAS
Shenjian Zhang, Chenming Zhang, Hao Luo, Shengtao Yi, Xuewei Ding, Zhirui Zong
2025 J jnl
An E-Band FMCW Radar Receiver With Arbitrary-Path Spillover Cancellation.
IEEE J. Solid State Circuits
Bolin Chen, Zhirui Zong
2024 J jnl
DS-CIM: A 40nm Asynchronous Dual-Spike Driven, MRAM Compute-In-Memory Macro for Spiking Neural Network.
IEEE Trans. Circuits Syst. I Regul. Pap.
Haotian Fu, Yulong Huang, Tingran Chen, Chenyi Fu, Hongwei Ren, Yue Zhou, Shouzhong Peng, Zhirui Zong, Biao Pan, Bojun Cheng
2023 J jnl
A Low-Spur Fractional-N PLL Based on a Time-Mode Arithmetic Unit.
IEEE J. Solid State Circuits
Zhong Gao, Jingchu He, Martin Fritz, Jiang Gong, Yiyu Shen, Zhirui Zong, Peng Chen, Gerd Spalink, Ben Eitel, Morteza S. Alavi, Robert Bogdan Staszewski, Masoud Babaie
2022 — conf
A 2.6-to-4.1GHz Fractional-N Digital PLL Based on a Time-Mode Arithmetic Unit Achieving -249.4dB FoM and -59dBc Fractional Spurs.
ISSCC
Zhong Gao, Jingchu He, Martin Fritz, Jiang Gong, Yiyu Shen, Zhirui Zong, Peng Chen, Gerd Spalink, Ben Eitel, Ken Yamamoto, Robert Bogdan Staszewski, Morteza S. Alavi, Masoud Babaie
2021 J jnl
A 21-to-41-GHz High-Gain Low Noise Amplifier With Triple-Coupled Technique for Multiband Wireless Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Yiming Yu, Jiahong Zhu, Zhirui Zong, Pan Tang, Huihua Liu, Chenxi Zhao, Yunqiu Wu, Kai Kang
2019 J jnl
A 31-µW, 148-fs Step, 9-bit Capacitor-DAC-Based Constant-Slope Digital-to-Time Converter in 28-nm CMOS.
IEEE J. Solid State Circuits
Peng Chen, Feifei Zhang, Zhirui Zong, Suoping Hu, Teerachot Siriburanon, Robert Bogdan Staszewski
2019 — conf
A 77/79-GHz Frequency Generator in 16-nm CMOS for FMCW Radar Applications Based on a 26-GHz Oscillator with Co-Generated Third Harmonic.
ESSCIRC
Feng-Wei Kuo, Zhirui Zong, Huan-Neng Ron Chen, Lan-Chou Cho, Chewnpu Jou, Mark Chen, Robert Bogdan Staszewski
2019 J jnl
A Low-Noise Fractional- ${N}$ Digital Frequency Synthesizer With Implicit Frequency Tripling for mm-Wave Applications.
IEEE J. Solid State Circuits
Zhirui Zong, Peng Chen, Robert Bogdan Staszewski
2019 J jnl
A Supply Pushing Reduction Technique for LC Oscillators Based on Ripple Replication and Cancellation.
IEEE J. Solid State Circuits
Yue Chen, Yao-Hong Liu, Zhirui Zong, Johan Dijkhuis, Guido Dolmans, Robert Bogdan Staszewski, Masoud Babaie
2017 — conf
A 15-μW, 103-fs step, 5-bit capacitor-DAC-based constant-slope digital-to-time converter in 28nm CMOS.
A-SSCC
Peng Chen, Feifei Zhang, Zhirui Zong, Hao Zheng, Teerachot Siriburanon, Robert Bogdan Staszewski
2016 J jnl
A 60 GHz Frequency Generator Based on a 20 GHz Oscillator and an Implicit Multiplier.
IEEE J. Solid State Circuits
Zhirui Zong, Masoud Babaie, Robert Bogdan Staszewski