Zhimin Zhang

28 papers A* 2A 3B 1C 1Journal 9Unranked 12
YearRankTypeTitle / Venue / Authors
2026 J jnl
JPnR: A Length-Matching Placement and Routing Framework for Single-Flux-Quantum Circuits.
IEEE Trans. Computers
Rongliang Fu, Minglei Zhou, Siyan Chen, Xinda Chen, JunYing Huang, Xiaochun Ye, Zhimin Zhang, Tsung-Yi Ho
2025 — conf
A GCN Accelerator with Unified Architecture.
ICA3PP (1)
Meng Wu, Mingyu Yan, Lei Deng, Wenming Li, Zhimin Zhang, Xiaochun Ye, Dongrui Fan
2025 A conf
JBSA: A Bit-Serial Accelerator for Deep Neural Networks Using Superconducting SFQ Logic.
ICS
Yang Su, Sheng Li, Huilong Jiang, Haofei Yin, Rongliang Fu, JunYing Huang, Xiaochun Ye, Zhimin Zhang, Jie Ren, Xiaoping Gao, Tsung-Yi Ho, Dongrui Fan
2024 — conf
Accelerating Mini-batch HGNN Training by Reducing CUDA Kernels.
ICA3PP (3)
Meng Wu, Jingkai Qiu, Mingyu Yan, Wenming Li, Yang Zhang, Zhimin Zhang, Xiaochun Ye, Dongrui Fan
2024 J jnl
Accelerating Mini-batch HGNN Training by Reducing CUDA Kernels.
CoRR
Meng Wu, Jingkai Qiu, Mingyu Yan, Wenming Li, Yang Zhang, Zhimin Zhang, Xiaochun Ye, Dongrui Fan
2024 A conf
JPlace: A Clock-Aware Length-Matching Placement for Rapid Single-Flux-Quantum Circuits.
DATE
Siyan Chen, Rongliang Fu, JunYing Huang, Zhimin Zhang, Xiaochun Ye, Tsung-Yi Ho, Dongrui Fan
2023 J jnl
Characterizing and Understanding Defense Methods for GNNs on GPUs.
IEEE Comput. Archit. Lett.
Meng Wu, Mingyu Yan, Xiaocheng Yang, Wenming Li, Zhimin Zhang, Xiaochun Ye, Dongrui Fan
2023 J jnl
Design of a Compact Superconducting RSFQ Register File.
IEEE Trans. Circuits Syst. I Regul. Pap.
Kuozhong Zhang, Zhimin Zhang, Guang-Ming Tang, Xiaochun Ye
2023 — conf
JRouter: A Multi-Terminal Hierarchical Length-Matching Router under Planar Manhattan Routing Model for RSFQ Circuits.
ACM Great Lakes Symposium on VLSI
Xinda Chen, Rongliang Fu, JunYing Huang, Huawei Cao, Zhimin Zhang, Xiaochun Ye, Tsung-Yi Ho, Dongrui Fan
2021 — conf
Equivalence Checking for Superconducting RSFQ Logic Circuits.
ACM Great Lakes Symposium on VLSI
Rongliang Fu, JunYing Huang, Zhimin Zhang
2020 J jnl
Characterizing and Understanding GCNs on GPU.
IEEE Comput. Archit. Lett.
Mingyu Yan, Zhaodong Chen, Lei Deng, Xiaochun Ye, Zhimin Zhang, Dongrui Fan, Yuan Xie
2020 J jnl
Characterizing and Understanding GCNs on GPU.
CoRR
Mingyu Yan, Zhaodong Chen, Lei Deng, Xiaochun Ye, Zhimin Zhang, Dongrui Fan, Yuan Xie
2020 — conf
Design Automation Methodology from RTL to Gate-level Netlist and Schematic for RSFQ Logic Circuits.
ACM Great Lakes Symposium on VLSI
Rongliang Fu, Zhimin Zhang, Guang-Ming Tang, JunYing Huang, Xiaochun Ye, Dongrui Fan, Ninghui Sun
2020 A* conf
HyGCN: A GCN Accelerator with Hybrid Architecture.
HPCA
Mingyu Yan, Lei Deng, Xing Hu, Ling Liang, Yujing Feng, Xiaochun Ye, Zhimin Zhang, Dongrui Fan, Yuan Xie
2020 J jnl
HyGCN: A GCN Accelerator with Hybrid Architecture.
CoRR
Mingyu Yan, Lei Deng, Xing Hu, Ling Liang, Yujing Feng, Xiaochun Ye, Zhimin Zhang, Dongrui Fan, Yuan Xie
2019 A* conf
Alleviating Irregularity in Graph Analytics Acceleration: a Hardware/Software Co-Design Approach.
MICRO
Mingyu Yan, Xing Hu, Shuangchen Li, Abanti Basak, Han Li, Xin Ma, Itir Akgun, Yujing Feng, Peng Gu, Lei Deng, Xiaochun Ye, Zhimin Zhang, Dongrui Fan, Yuan Xie
2019 A conf
Balancing Memory Accesses for Energy-Efficient Graph Analytics Accelerators.
ISLPED
Mingyu Yan, Xing Hu, Shuangchen Li, Itir Akgun, Han Li, Xin Ma, Lei Deng, Xiaochun Ye, Zhimin Zhang, Dongrui Fan, Yuan Xie
2019 — conf
Instruction Vulnerability Test and Code Optimization Against DVFS Attack.
ITC-Asia
JunYing Huang, Jing Ye, Xiaochun Ye, Da Wang, Dongrui Fan, Huawei Li, Xiaowei Li, Zhimin Zhang
2019 C conf
iATPG: Instruction-level Automatic Test Program Generation for Vulnerabilities under DVFS attack.
IOLTS
Kuozhong Zhang, JunYing Huang, Jing Ye, Xiaochun Ye, Da Wang, Dongrui Fan, Huawei Li, Xiaowei Li, Zhimin Zhang
2018 J jnl
A Non-Stop Double Buffering Mechanism for Dataflow Architecture.
J. Comput. Sci. Technol.
Xu Tan, Xiaowei Shen, Xiaochun Ye, Da Wang, Dongrui Fan, Lunkai Zhang, Wenming Li, Zhimin Zhang, Zhimin Tang
2018 — conf
High-Performance and Energy-Efficient Fault Tolerance Scheduling Algorithm Based on Improved TMR for Heterogeneous System.
ISPA/IUCC/BDCloud/SocialCom/SustainCom
Shigan Yu, Zhimin Tang, Xiaochun Ye, Zhimin Zhang, Dongrui Fan, Zhiying
2018 — conf
WEAVER: An Energy Efficient, General-Purpose Acceleration Architecture for String Operations in Big Data Applications.
ISPA/IUCC/BDCloud/SocialCom/SustainCom
Wenming Li, Xiaochun Ye, Da Wang, Hao Zhang, Dongdong Wu, Zhimin Zhang, Dongrui Fan
2017 J jnl
An Efficient Network-on-Chip Router for Dataflow Architecture.
J. Comput. Sci. Technol.
Xiaowei Shen, Xiaochun Ye, Xu Tan, Da Wang, Lunkai Zhang, Wenming Li, Zhimin Zhang, Dongrui Fan, Ninghui Sun
2016 — conf
A framework for energy-efficient optimization on multi-cores.
IGSC
Yatao Zhu, Xiaochun Ye, Da Wang, Wenming Li, Yang Zhang, Dongrui Fan, Zhimin Zhang, Zhimin Tang
2016 — conf
An energy-efficient bandwidth allocation method for single-chip heterogeneous processor.
IGSC
Yatao Zhu, Shuai Zhang, Xiaochun Ye, Da Wang, Xu Tan, Dongrui Fan, Zhimin Zhang, Hongliang Li
2016 — conf
Memory partition for SIMD in streaming dataflow architectures.
IGSC
Xiaowei Shen, Xiaochun Ye, Xu Tan, Da Wang, Zhimin Zhang, Zhimin Tang, Dongrui Fan
2016 B conf
POSTER: An Optimization of Dataflow Architectures for Scientific Applications.
PACT
Xiaowei Shen, Xiaochun Ye, Xu Tan, Da Wang, Zhimin Zhang, Dongrui Fan, Zhimin Tang
2005 — conf
SoC Leakage Power Reduction Algorithm by Input Vector Control.
SoC
Xiaotao Chang, Dongrui Fan, Yinhe Han, Zhimin Zhang