Zhibo Wang

17 papers A* 1C 3Journal 6Unranked 7
YearRankTypeTitle / Venue / Authors
2019 J jnl
A 130-nm Ferroelectric Nonvolatile System-on-Chip With Direct Peripheral Restore Architecture for Transient Computing System.
IEEE J. Solid State Circuits
Yongpan Liu, Fang Su, Yixiong Yang, Zhibo Wang, Yiqun Wang, Zewei Li, Xueqing Li, Ryuji Yoshimura, Takashi Naiki, Takashi Tsuwa, Takahiko Saito, Zhongjun Wang, Koji Taniuchi, Huazhong Yang
2019 J jnl
A 2.2-GHz Configurable Direct Digital Frequency Synthesizer Based on LUT and Rotation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yixiong Yang, Xin Shi, Fang Su, Zhibo Wang, Pei Yang, Huazhong Yang, Yongpan Liu
2019 J jnl
A 3.77TOPS/W Convolutional Neural Network Processor With Priority-Driven Kernel Optimization.
IEEE Trans. Circuits Syst. II Express Briefs
Jinshan Yue, Yongpan Liu, Zhe Yuan, Zhibo Wang, Qingwei Guo, Jinyang Li, Chengmo Yang, Huazhong Yang
2019 — conf
A 65nm 0.39-to-140.3TOPS/W 1-to-12b Unified Neural Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1 × Higher TOPS/mm
ISSCC
Jinshan Yue, Ruoyang Liu, Wenyu Sun, Zhe Yuan, Zhibo Wang, Yung-Ning Tu, Yi-Ju Chen, Ao Ren, Yanzhi Wang, Meng-Fan Chang, Xueqing Li, Huazhong Yang, Yongpan Liu
2019 — conf
A Sparse-Adaptive CNN Processor with Area/Performance balanced N-Way Set-Associate PE Arrays Assisted by a Collision-Aware Scheduler.
A-SSCC
Zhe Yuan, Jingyu Wang, Yixiong Yang, Jinshan Yue, Zhibo Wang, Xiaoyu Feng, Yanzhi Wang, Xueqing Li, Huazhong Yang, Yongpan Liu
2019 — conf
AERIS: area/energy-efficient 1T2R ReRAM based processing-in-memory neural network system-on-a-chip.
ASP-DAC
Jinshan Yue, Yongpan Liu, Fang Su, Shuangchen Li, Zhe Yuan, Zhibo Wang, Wenyu Sun, Xueqing Li, Huazhong Yang
2018 C conf
A 2-GHz Direct Digital Frequency Synthesizer Based on LUT and Rotation.
ISCAS
Yixiong Yang, Zhibo Wang, Pei Yang, Meng-Fan Chang, Mon-Shu Ho, Huazhong Yang, Yongpan Liu
2018 A* conf
NEOFog: Nonvolatility-Exploiting Optimizations for Fog Computing.
ASPLOS
Kaisheng Ma, Xueqing Li, Mahmut Taylan Kandemir, Jack Sampson, Vijaykrishnan Narayanan, Jinyang Li, Tongda Wu, Zhibo Wang, Yongpan Liu, Yuan Xie
2018 — conf
Sticker: A 0.41-62.1 TOPS/W 8Bit Neural Network Processor with Multi-Sparsity Compatible Convolution Arrays and Online Tuning Acceleration for Fully Connected Layers.
VLSI Circuits
Zhe Yuan, Jinshan Yue, Huanrui Yang, Zhibo Wang, Jinyang Li, Yixiong Yang, Qingwei Guo, Xueqing Li, Meng-Fan Chang, Huazhong Yang, Yongpan Liu
2017 J jnl
A 65-nm ReRAM-Enabled Nonvolatile Processor With Time-Space Domain Adaption and Self-Write-Termination Achieving > 4× Faster Clock Frequency and > 6× Higher Restore Speed.
IEEE J. Solid State Circuits
Zhibo Wang, Yongpan Liu, Albert Lee, Fang Su, Chieh-Pu Lo, Zhe Yuan, Jinyang Li, Chien-Chen Lin, Wei-Hao Chen, Hsiao-Yun Chiu, Wei-En Lin, Ya-Chin King, Chrong Jung Lin, Pedram Khalili Amiri, Kang-Lung Wang, Meng-Fan Chang, Huazhong Yang
2017 J jnl
A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors.
IEEE J. Solid State Circuits
Albert Lee, Chieh-Pu Lo, Chien-Chen Lin, Wei-Hao Chen, Kuo-Hsiang Hsu, Zhibo Wang, Fang Su, Zhe Yuan, Qi Wei, Ya-Chin King, Chrong Jung Lin, Hochul Lee, Pedram Khalili Amiri, Kang-Lung Wang, Yu Wang, Huazhong Yang, Yongpan Liu, Meng-Fan Chang
2016 — conf
4.7 A 65nm ReRAM-enabled nonvolatile processor with 6× reduction in restore time and 4× higher clock frequency using adaptive data retention and self-write-termination nonvolatile logic.
ISSCC
Yongpan Liu, Zhibo Wang, Albert Lee, Fang Su, Chieh-Pu Lo, Zhe Yuan, Chien-Chen Lin, Qi Wei, Yu Wang, Ya-Chin King, Chrong Jung Lin, Pedram Khalili, Kang-Lung Wang, Meng-Fan Chang, Huazhong Yang
2016 — conf
A compare-and-select error tolerant scheme for nonvolatile processors.
NANOARCH
Zhibo Wang, Rui Hua, Yongpan Liu, Huazhong Yang
2016 C conf
Design of nonvolatile processors and applications.
VLSI-SoC
Fang Su, Zhibo Wang, Jinyang Li, Meng-Fan Chang, Yongpan Liu
2015 C conf
An energy-efficient heterogeneous dual-core processor for Internet of Things.
ISCAS
Zhibo Wang, Yongpan Liu, Yinan Sun, Yang Li, Daming Zhang, Huazhong Yang
2015 — conf
Design exploration of inrush current aware controller for nonvolatile processor.
NVMSA
Yongpan Liu, Fang Su, Zhibo Wang, Huazhong Yang
2015 J jnl
Multistage Function Speculation Adders.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yinan Sun, Yongpan Liu, Zhibo Wang, Huazhong Yang