Zhi Li

19 papers C 2Journal 16Unranked 1
YearRankTypeTitle / Venue / Authors
2026 J jnl
A 0.31-V 16-Kb 9T SRAM With Enhanced Sensing Margin and Read Performance for Low-Power Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Pengyuan Zhao, Huidong Zhao, Linnan Li, Zhi Li, Minglong Jia, Xiang Li, Shushan Qiao
2026 J jnl
Low-power non-redundant transition sense amplifier based flip-flops with conditional pre-charge and completion detection.
IEICE Electron. Express
Xuelong Zhao, Zhi Li, Jiliang Liu, Linnan Li, Ye Zhao, Huidong Zhao, Shushan Qiao
2025 C conf
A 230-nA Quiescent Current and Enhanced Transient Performance DC-DC Converter with Suppressed Under/Overshoot for IoT SoCs.
ISCAS
Zhi Li, Huidong Zhao, Zhenhao Huang, Linnan Li, Shushan Qiao
2025 J jnl
A Self-Calibrated Unified Voltage-and-Frequency Regulator System Design Based on Universal Logic Line Circuit.
IEEE Trans. Very Large Scale Integr. Syst.
Jiliang Liu, Huidong Zhao, Zhi Li, Kangning Wang, Shushan Qiao
2025 C conf
AO-EDC: An Accuracy-Oriented Error Detection and Correction Scheme for DVFS System Based on Propagation Detection at Half-Path Points.
ISCAS
Zitao Liang, Jiliang Liu, Kangning Wang, Linnan Li, Zhi Li, Huidong Zhao, Shushan Qiao
2025 J jnl
Accelerating Unstructured Sparse DNNs via Multilevel Partial Sum Reduction and PE Array-Level Load Balancing.
IEEE Trans. Very Large Scale Integr. Syst.
Chendong Xia, Qiang Li, Zhi Li, Bing Li, Huidong Zhao, Shushan Qiao
2025 J jnl
An SRAM-based chunked computing-in-memory macro with a multi-slope voltage-time-digital converting ADC for efficient MAC operations.
IEICE Electron. Express
Xiaofeng Li, Yi Zhan, Zhi Li, Shukao Dou, Heng You, Yumei Zhou, Shushan Qiao
2025 J jnl
Body-Biased Hybrid Sense Amplifier With High Offset Tolerance for Low-Voltage SRAMs.
IEEE Trans. Circuits Syst. II Express Briefs
Minglong Jia, Pengyuan Zhao, Linnan Li, Xiang Li, Zhi Li, Huidong Zhao, Shushan Qiao
2025 J jnl
Erratum: A low-overhead in-situ timing-error prediction technique with wide-voltage-range transition-detector for variation-tolerant digital circuits [IEICE Electronics Express Vol. 20 (2023) No. 11 pp. 20230145].
IEICE Electron. Express
Kangning Wang, Huidong Zhao, Jiliang Liu, Jialu Yin, Zhi Li, Shushan Qiao
2025 J jnl
ITP-PAD: A Timing Monitoring Mechanism for AVS Systems Using Intersection Timing Prediction and Path Activation Detection.
IEEE Trans. Circuits Syst. II Express Briefs
Kangning Wang, Huidong Zhao, Zhi Li, Jiliang Liu, Shushan Qiao
2024 — conf
A 0.5V 18.6nW Bandgap Voltage Reference with A Low-Leakage Sample / Hold Circuit.
ICTA
Gaigai Zhao, Zhi Li, Linnan Li, Zhenhao Huang, Huidong Zhao, Shushan Qiao
2024 J jnl
A dynamic voltage scaling circuit design based on critical path replica and time warning techniques.
IEICE Electron. Express
Ji-liang Liu, Kangning Wang, Jia-lu Yin, Xue-long Zhao, Zhi Li, Hui-dong Zhao, Shushan Qiao
2024 J jnl
An Ultra-Low Leakage and Wide-Range Voltage Level Shifter for Low-Power Digital CMOS VLSIs.
IEEE Trans. Circuits Syst. II Express Briefs
Ang Yuan, Huidong Zhao, Xiao Wang, Zhi Li, Shushan Qiao
2024 J jnl
An Ultra-Low-Power Static Contention-Free 25-Transistor True Single-Phase-Clocked Flip-Flop in 55 nm CMOS.
IEEE Access
Jiliang Liu, Huidong Zhao, Zhi Li, Kangning Wang, Shushan Qiao
2023 J jnl
A capacitor-coupled stacked-based sense amplifier with enhanced offset tolerance for low power SRAM.
IEICE Electron. Express
Pengyuan Zhao, Huidong Zhao, Jialu Yin, Zhi Li, Shushan Qiao
2023 J jnl
A low-overhead in-situ timing-error prediction technique with wide-voltage-range transition-detector for variation-tolerant digital circuits.
IEICE Electron. Express
Kangning Wang, Huidong Zhao, Jiliang Liu, Jialu Yin, Zhi Li, Shushan Qiao
2023 J jnl
A novel high-speed low-power sense-amplifier-based flip-flop for digital circuits application.
IEICE Electron. Express
Ang Yuan, Huidong Zhao, Zhi Li, Shushan Qiao
2022 J jnl
A fully integrated RC oscillator with adaptive-body-biasing.
IEICE Electron. Express
Zhi Li, Huidong Zhao, Jialu Yin, Shushan Qiao, Yumei Zhou
2022 J jnl
A two-dimension half-select free 12T SRAM cell with enhanced write ability and read stability for bit-interleaving architecture.
IEICE Electron. Express
Jialu Yin, Jia Yuan, Zhi Li, Shushan Qiao