Zhi-Wei Chen

65 papers A* 1A 3B 2C 9Misc 2Journal 11Unranked 35
YearRankTypeTitle / Venue / Authors
2025 J jnl
Multi-step spatio-temporal passenger flow prediction based on a dual-layer convolutional long short-term memory model with residual correction.
Appl. Intell.
Zhi-Wei Chen, Xiao-Lan Jiang, Li-Jun Tian, Peng Wu
2022 J jnl
A connectivity-based method for detecting clumpy structures in molecular clouds.
Astron. Comput.
Y. Jiang, Sheng Zheng, Z. Jiang, S. Zeng, Zhi-Wei Chen, Xiangyun Zeng, Xiao-YuLuo, Yao Huang
2019 J jnl
A novel authentication scheme for anonymity and digital rights management based on elliptic curve cryptography.
Int. J. Electron. Secur. Digit. Forensics
Cheng-Chi Lee, Chun-Ta Li, Zhi-Wei Chen, Shun-Der Chen, Yan-Ming Lai
2018 J jnl
A Biometric-Based Authentication and Anonymity Scheme for Digital Rights Management System.
Inf. Technol. Control.
Cheng-Chi Lee, Chun-Ta Li, Zhi-Wei Chen, Yan-Ming Lai
2018 J jnl
An improved E-DRM scheme for mobile environments.
J. Inf. Secur. Appl.
Cheng-Chi Lee, Chun-Ta Li, Zhi-Wei Chen, Yan-Ming Lai, Jiann-Cherng Shieh
2014 — conf
MicroApp: Architecting Web Application for Non-uniform Trustworthiness in Cloud Computing Environment.
SERE (Companion)
Yen-Chun Hsu, Yu-Sung Wu, Tsung-Han Tsai, Yi Pin Chiu, Chih-Hung Lin, Zhi-Wei Chen
2013 — ch.
A Type-2 FML-Based Fuzzy Ontology for Dietary Assessment.
On the Power of Fuzzy Markup Language
Mei-Hui Wang, Chang-Shing Lee, Zhi-Wei Chen, Hani Hagras, Su-E Kuo, Hui-Ching Kuo, Hui-Hua Cheng
2013 — conf
Assignment of adjustable delay buffers for clock skew minimization in multi-voltage mode designs.
ACM Great Lakes Symposium on VLSI
Jin-Tai Yan, Zhi-Wei Chen
2013 C conf
Post-layout redundant wire insertion for fixing min-delay violations.
ISCAS
Jin-Tai Yan, Zhi-Wei Chen
2013 J jnl
Probabilistic Fatigue Assessment Based on Bayesian Learning for Wind-Excited Long-Span Bridges Installed with WASHMS.
Int. J. Distributed Sens. Networks
Zhi-Wei Chen, Xiao-Ming Wang
2013 J jnl
Routability-constrained multi-bit flip-flop construction for clock power reduction.
Integr.
Zhi-Wei Chen, Jin-Tai Yan
2013 — conf
Timing-constrained replacement using spare cells for design changes.
ACM Great Lakes Symposium on VLSI
Zhi-Wei Chen, Jin-Tai Yan
2013 — ch.
Type-2 Fuzzy Set and Fuzzy Ontology for Diet Application.
Advances in Type-2 Fuzzy Sets and Systems
Chang-Shing Lee, Mei-Hui Wang, Chin-Yuan Hsu, Zhi-Wei Chen
2013 J jnl
Video-Driven Creation of Virtual Avatars by Component-based Transferring of Facial Expressions.
J. Inf. Sci. Eng.
Cheng-Chin Chiang, Zhi-Wei Chen, Chen-Ning Yang
2012 — conf
Density-reduction-oriented layer assignment for rectangle escape routing.
ACM Great Lakes Symposium on VLSI
Jin-Tai Yan, Jun-Min Chung, Zhi-Wei Chen
2012 — conf
Direction-constrained layer assignment for rectangle escape routing.
SoCC
Jin-Tai Yan, Zhi-Wei Chen
2012 C conf
Efficient assignment of inter-die signals for die-stacking SiP design.
ISCAS
Jin-Tai Yan, Chia-Han Kao, Ming-Chien Huang, Zhi-Wei Chen
2012 J jnl
New optimal layer assignment for bus-oriented escape routing.
Integr.
Jin-Tai Yan, Zhi-Wei Chen
2012 C conf
Post-layout OPE-predicted redundant wire insertion for clock skew minimization.
ICCD
Jin-Tai Yan, Zhi-Wei Chen
2012 — conf
Top-down-based symmetrical buffered clock routing.
ACM Great Lakes Symposium on VLSI
Jin-Tai Yan, Ming-Chien Huang, Zhi-Wei Chen
2012 — conf
Utilization of multi-bit flip-flops for clock power reduction.
ICECS
Zhi-Wei Chen, Jin-Tai Yan
2011 B conf
Genetic fuzzy markup language for diet application.
FUZZ-IEEE
Chang-Shing Lee, Mei-Hui Wang, Zhi-Wei Chen, Chin-Yuan Hsu, Su-E Kuo, Hui-Ching Kuo, Hui-Hua Cheng, Akio Naito
2011 — conf
New optimal layer assignment for bus-oriented escape routing.
ACM Great Lakes Symposium on VLSI
Jin-Tai Yan, Zhi-Wei Chen
2011 — conf
Obstacle-aware length-matching bus routing.
ISPD
Jin-Tai Yan, Zhi-Wei Chen
2011 A conf
Obstacle-aware multiple-source rectilinear Steiner tree with electromigration and IR-drop avoidance.
DATE
Jin-Tai Yan, Zhi-Wei Chen
2011 C conf
Pre-assignment RDL routing via extraction of maximal net sequence.
ICCD
Jin-Tai Yan, Zhi-Wei Chen
2011 Misc conf
RePEF - A system for Restoring Packed Executable File for malware analysis.
ICMLC
Te-En Wei, Zhi-Wei Chen, Chin-Wei Tien, Jain-Shing Wu, Hahn-Ming Lee, Albert B. Jeng
2011 — conf
Simultaneous escape routing based on routability-driven net ordering.
SoCC
Jin-Tai Yan, Tung-Yen Sung, Zhi-Wei Chen
2011 A conf
Timing-constrained I/O buffer placement for flip-chip designs.
DATE
Zhi-Wei Chen, Jin-Tai Yan
2010 J jnl
Extending 3D Lucas-Kanade tracking with adaptive templates for head pose estimation.
Mach. Vis. Appl.
Zhi-Wei Chen, Cheng-Chin Chiang, Zi-Tian Hsieh
2010 C conf
Low-cost low-power bypassing-based multiplier design.
ISCAS
Jin-Tai Yan, Zhi-Wei Chen
2010 — conf
Obstacle-aware longest path using rectangular pattern detouring in routing grids.
ASP-DAC
Jin-Tai Yan, Ming-Ching Jhong, Zhi-Wei Chen
2010 — conf
Ordered escape routing via routability-driven pin assignment.
ACM Great Lakes Symposium on VLSI
Jin-Tai Yan, Chung-Wei Ke, Zhi-Wei Chen
2010 B conf
Property and application of fuzzy ontology for dietary assessment.
FUZZ-IEEE
Mei-Hui Wang, Chang-Shing Lee, Zhi-Wei Chen, Chi-Fang Lo, Su-E Kuo, Hui-Ching Kuo, Hui-Hua Cheng
2010 — conf
Resource-constrained timing-driven link insertion for critical delay reduction.
ACM Great Lakes Symposium on VLSI
Jin-Tai Yan, Zhi-Wei Chen
2010 — conf
Routability-driven RDL routing with pin reassignment.
SoCC
Jin-Tai Yan, Ke-Chyuan Chen, Zhi-Wei Chen
2010 C conf
Routability-driven flip-flop merging process for clock power reduction.
ICCD
Zhi-Wei Chen, Jin-Tai Yan
2010 — conf
Routability-driven partitioning-based IO assignment for flip-chip designs.
APCCAS
Jin-Tai Yan, Kai-Ping Lu, Zhi-Wei Chen
2010 Misc conf
The research of sampling frequency for A DC servo motor speed control system based on neural networks.
ICNC
Ming-Hui Chu, Yi-Wei Chen, Yuan Kang, Zhi-Wei Chen
2010 — conf
Thermal via planning for temperature reduction in 3D ICs.
SoCC
Jin-Tai Yan, Yu-Cheng Chang, Zhi-Wei Chen
2010 A* conf
Two-sided single-detour untangling for bus routing.
DAC
Jin-Tai Yan, Zhi-Wei Chen
2010 C conf
Width-constrained wire sizing for non-tree interconnections.
ISCAS
Zhi-Wei Chen, Jin-Tai Yan
2009 C conf
Accurate Transformation-based Timing Analysis for RC Non-tree Circuits.
ISCAS
Zhi-Wei Chen, Jin-Tai Yan, Hsing-Lin Ko
2009 — conf
Continuous K-Nearest Neighbor Query over Moving Objects in Road Networks.
APWeb/WAIM
Yuan-Ko Huang, Zhi-Wei Chen, Chiang Lee
2009 — conf
IO connection assignment and RDL routing for flip-chip designs.
ASP-DAC
Jin-Tai Yan, Zhi-Wei Chen
2009 — conf
Low-power multiplier design with row and column bypassing.
SoCC
Jin-Tai Yan, Zhi-Wei Chen
2009 — conf
RDL pre-assignment routing for flip-chip designs.
ACM Great Lakes Symposium on VLSI
Jin-Tai Yan, Zhi-Wei Chen
2009 — conf
Redundant wire insertion for yield improvement.
ACM Great Lakes Symposium on VLSI
Jin-Tai Yan, Zhi-Wei Chen
2008 — conf
Electromigration-aware rectilinear Steiner tree construction for analog circuits.
APCCAS
Jin-Tai Yan, Zhi-Wei Chen
2008 — conf
Flexible escape routing for flip-chip designs.
ICECS
Jin-Tai Yan, Zhi-Wei Chen
2008 — conf
Simultaneous assignment of power pads and wires for reliability-driven hierarchical power quad-grids.
ICECS
Jin-Tai Yan, Zhi-Wei Chen
2008 — conf
Thermal-driven white space redistribution for block-level floorplans.
ICECS
Jin-Tai Yan, Zhi-Wei Chen, Yi-Hsiang Chou, Shun-Hua Lin, Herming Chiueh
2008 — conf
Timing-constrained yield-driven redundant via insertion.
APCCAS
Jin-Tai Yan, Zhi-Wei Chen, Bo-Yi Chiang, Yu-Min Lee
2008 — conf
Timing-driven multi-layer Steiner tree construction with obstacle avoidance.
APCCAS
Jin-Tai Yan, Zhi-Wei Chen
2007 C conf
Area-Driven Decoupling Capacitance Allocation in Noise-Aware Floorplan for Signal Integrity.
ISCAS
Jin-Tai Yan, Zhi-Wei Chen, Ming-Yuen Wu
2007 — conf
Area-driven decoupling capacitance allocation based on space sensitivity analysis for signal integrity.
SoCC
Jin-Tai Yan, Zhi-Wei Chen, Ming-Yuen Wu
2007 — conf
Routability-Driven Track Routing for Coupling Capacitance Reduction.
ICECS
Jin-Tai Yan, Zhi-Wei Chen, Kuen-Ming Lin
2007 — conf
Timing-Driven Steiner Tree Construction with Wire Sizing, Buffer Insertion and Obstacle Avoidance.
ICECS
Jin-Tai Yan, Shi-Qin Huang, Zhi-Wei Chen
2006 — conf
Area-Driven White Space Distribution for Detailed Floorplan Design.
ICECS
Jin-Tai Yan, Zhi-Wei Chen, Ming-Yuen Wu
2006 A conf
Design and implementation of a reconfigurable hardware for secure embedded systems.
AsiaCCS
Kuen-Cheng Chiang, Zhi-Wei Chen, Jean Jyh-Jiun Shann
2006 — conf
In this paper, an approach for deaf-people.
ICPR (2)
Zhi-Wei Chen, Yu-Cheng Lin, Cheng-Chin Chiang
2006 — conf
Optimal Network Analysis in Hierarchical Power Quad-Grids.
APCCAS
Jin-Tai Yan, Zhi-Wei Chen, Chia-Wei Wu, Ming-Yuen Wu
2006 — conf
Yield-Driven Redundant Via Insertion Based on Probabilistic Via-Connection Analysis.
ICECS
Jin-Tai Yan, Bo-Yi Chiang, Zhi-Wei Chen
2005 J jnl
Data classification with radial basis function networks based on a novel kernel density estimation algorithm.
IEEE Trans. Neural Networks
Yen-Jen Oyang, Shien-Ching Hwang, Yu-Yen Ou, Chien-Yu Chen, Zhi-Wei Chen
2005 — conf
Region-Based Color Correction of Images.
ICITA (1)
Chin-Hao Hsu, Zhi-Wei Chen, Cheng-Chin Chiang