Zhi-Hui Kong

37 papers C 7Journal 16Unranked 14
YearRankTypeTitle / Venue / Authors
2024 C conf
The Initialization Factor: Understanding its Impact on Active Learning for Analog Circuit Design.
ISCAS
Sezin Kircali Ata, Zhi-Hui Kong, Anusha James, Lile Cai, Kiat Seng Yeo, Khin Mi Mi Aung, Chuan Sheng Foo, Ashish James
2024 — conf
Towards Safe and Efficient Analog Circuit Design: Active Learning for Feasibility Region Exploration.
APCCAS
Sezin Kircali Ata, Zhi-Hui Kong, Anusha James, Lile Cai, Kiat Seng Yeo, Khin Mi Mi Aung, Chuan Sheng Foo, Ashish James
2019 J jnl
An 8T SRAM With On-Chip Dynamic Reliability Management and Two-Phase Write Operation in 28-nm FDSOI.
IEEE J. Solid State Circuits
Zhao Chuan Lee, M. Sultan M. Siddiqui, Zhi-Hui Kong, Tony Tae-Hyoung Kim
2017 J jnl
A High-Efficiency 6.78-MHz Full Active Rectifier With Adaptive Time Delay Control for Wireless Power Transmission.
IEEE Trans. Very Large Scale Integr. Syst.
Xiaoyin Bai, Zhi-Hui Kong, Liter Siek
2016 — conf
An 8T SRAM with BTI-Aware Stability Monitor and two-phase write operation for cell stability improvement in 28-nm FDSOI.
ESSCIRC
Zhao Chuan Lee, M. Sultan M. Siddiqui, Zhi-Hui Kong, Tony Tae-Hyoung Kim
2015 — conf
A 57 to 66 GHz novel six-port correlator.
ASICON
Peng Siew Chew, Kiat Seng Yeo, Kaixue Ma, Zhi-Hui Kong
2015 J jnl
Highly Reliable Spin-Transfer Torque Magnetic RAM-Based Physical Unclonable Function With Multi-Response-Bits Per Cell.
IEEE Trans. Inf. Forensics Secur.
Le Zhang, Xuanyao Fong, Chip-Hong Chang, Zhi-Hui Kong, Kaushik Roy
2015 J jnl
Optimizating Emerging Nonvolatile Memories for Dual-Mode Applications: Data Storage and Key Generator.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Le Zhang, Xuanyao Fong, Chip-Hong Chang, Zhi-Hui Kong, Kaushik Roy
2015 C conf
Statistical analysis and design of 6T SRAM cell for physical unclonable function with dual application modes.
ISCAS
Le Zhang, Chip-Hong Chang, Zhi-Hui Kong, Chao Qun Liu
2014 J jnl
A Monolithically Integrated Pressure/Oxygen/Temperature Sensing SoC for Multimodality Intracranial Neuromonitoring.
IEEE J. Solid State Circuits
Wai Pan Chan, Margarita Narducci, Yuan Gao, Ming-Yuan Cheng, Jia Hao Cheong, Arup K. George, Daw Don Cheam, Siew Chong Leong, Maria Ramona B. Damalerio, Ruiqi Lim, Ming-Ling Tsai, Abdur R. A. Rahman, Mi Kyoung Park, Zhi-Hui Kong, Rao Jai Prashanth, Minkyu Je
2014 J jnl
Exploiting Process Variations and Programming Sensitivity of Phase Change Memory for Reconfigurable Physical Unclonable Functions.
IEEE Trans. Inf. Forensics Secur.
Le Zhang, Zhi-Hui Kong, Chip-Hong Chang, Alessandro Cabrini, Guido Torelli
2014 C conf
Highly reliable memory-based Physical Unclonable Function using Spin-Transfer Torque MRAM.
ISCAS
Le Zhang, Xuanyao Fong, Chip-Hong Chang, Zhi-Hui Kong, Kaushik Roy
2014 — conf
Leakage-resilient memory-based physical unclonable function using phase change material.
ICCST
Le Zhang, Chip-Hong Chang, Alessandro Cabrini, Guido Torelli, Zhi-Hui Kong
2013 J jnl
A High Speed Low Power CAM With a Parity Bit and Power-Gated ML Sensing.
IEEE Trans. Very Large Scale Integr. Syst.
Anh-Tuan Do, Shoushun Chen, Zhi-Hui Kong, Kiat Seng Yeo
2013 C conf
A current-mode stimulator circuit with two-step charge balancing background calibration.
ISCAS
Anh-Tuan Do, Yung Sern Tan, Gordon M. Xiong, Cleo Choong, Zhi-Hui Kong, Kiat Seng Yeo
2013 J jnl
NBTI/PBTI-Aware WWL Voltage Control for Half-Selected Cell Stability Improvement.
IEEE Trans. Circuits Syst. II Express Briefs
Zhao Chuan Lee, Kam Chew Leong, Zhi-Hui Kong, Tony Tae-Hyoung Kim
2013 C conf
PCKGen: A Phase Change Memory based cryptographic key generator.
ISCAS
Le Zhang, Zhi-Hui Kong, Chip-Hong Chang
2012 — conf
CMOS-MEMS capacitive sensors for intra-cranial pressure monitoring: Sensor fabrication & system design.
ISOCC
Arup K. George, Wai Pan Chan, Margarita Sofia Narducci, Zhi-Hui Kong, Minkyu Je
2012 — conf
NBTI/PBTI-aware wordline voltage control with no boosted supply for stability improvement of half-selected SRAM cells.
ISOCC
Zhao Chuan Lee, Kim Ming Ho, Zhi-Hui Kong, Tony T. Kim
2012 — conf
Recent progress in silicon-based millimeter-wave power amplifier.
APCCAS
Jiang An Han, Zhi-Hui Kong, Kaixue Ma, Kiat Seng Yeo
2011 — conf
A comparative study of state-of-the-art low-power CAM match-line sense amplifier designs.
ACM Great Lakes Symposium on VLSI
Anh-Tuan Do, Xiaoliang Tan, Shoushun Chen, Zhi-Hui Kong, Kiat Seng Yeo
2011 C conf
A low-power CAM with efficient power and delay trade-off.
ISCAS
Anh-Tuan Do, Shoushun Chen, Zhi-Hui Kong, Kiat Seng Yeo
2011 — conf
A new match line sensing technique in Content Addressable Memory.
COOL Chips
Xiaoliang Tan, Anh-Tuan Do, Shoushun Chen, Kiat Seng Yeo, Zhi-Hui Kong
2011 J jnl
An 8T Differential SRAM With Improved Noise Margin for Bit-Interleaving in 65 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Anh-Tuan Do, Jeremy Yung Shern Low, Joshua Yung Lih Low, Zhi-Hui Kong, Xiaoliang Tan, Kiat Seng Yeo
2011 J jnl
Design and Sensitivity Analysis of a New Current-Mode Sense Amplifier for Low-Power SRAM.
IEEE Trans. Very Large Scale Integr. Syst.
Anh-Tuan Do, Zhi-Hui Kong, Kiat Seng Yeo, Jeremy Yung Shern Low
2011 — conf
Impacts of NBTI/PBTI on SRAM VMIN and design techniques for SRAM VMIN improvement.
ISOCC
Tony Tae-Hyoung Kim, Zhi-Hui Kong
2010 C conf
A 16Kb 10T-SRAM with 4x read-power reduction.
ISCAS
Zhi-Hui Kong, Anh-Tuan Do
2010 — conf
An 8T SRAM cell with column-based dynamic supply voltage for bit-interleaving.
APCCAS
Anh-Tuan Do, Kiat Seng Yeo, Jeremy Yung Shern Low, Joshua Yung Lih Low, Zhi-Hui Kong
2010 J jnl
Criterion to Evaluate Input-Offset Voltage of a Latch-Type Sense Amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap.
Anh-Tuan Do, Zhi-Hui Kong, Kiat Seng Yeo
2010 J jnl
Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing.
IEEE Trans. Very Large Scale Integr. Syst.
Ning Zhu, Wang Ling Goh, Weija Zhang, Kiat Seng Yeo, Zhi-Hui Kong
2010 — conf
Low IR drop and low power parallel CAM design using gated power transistor technique.
APCCAS
Anh-Tuan Do, Shoushun Chen, Zhi-Hui Kong, Kiat Seng Yeo
2008 — conf
A full current-mode sense amplifier for low-power SRAM applications.
APCCAS
Anh-Tuan Do, Jeremy Yung Shern Low, Zhi-Hui Kong, Kiat Seng Yeo, Joshua Yung Low Yung Lih
2008 — conf
Body-bootstrapped-buffer circuit for CMOS static power reduction.
APCCAS
Liang-Yu Loy, Weija Zhang, Zhi-Hui Kong, Wang Ling Goh, Kiat Seng Yeo
2008 J jnl
Hybrid-Mode SRAM Sense Amplifiers: New Approach on Transistor Sizing.
IEEE Trans. Circuits Syst. II Express Briefs
Anh-Tuan Do, Zhi-Hui Kong, Kiat Seng Yeo
2008 J jnl
Integrated Circuit Design Research Ranking for Worldwide Universities.
J. Circuits Syst. Comput.
Kiat Seng Yeo, Zhi-Hui Kong, Nukala Nishant, Haitao Fu, Wei Zeng
2008 J jnl
Spicesoft: Automated Tool for Sensitivity Analysis, Performance Analysis, and Inverse Performance Analysis of Digital Circuits.
J. Circuits Syst. Comput.
Kiat Seng Yeo, Zhi-Hui Kong
2005 J jnl
An Ultra Low-power Current-mode Sense Amplifier for Sram Applications.
J. Circuits Syst. Comput.
Zhi-Hui Kong, Kiat Seng Yeo, Chip-Hong Chang